diff --git a/.clang-format b/.clang-format index badfc1ba440af..10dc5a9a61b3e 100644 --- a/.clang-format +++ b/.clang-format @@ -203,11 +203,13 @@ ForEachMacros: - 'for_each_matching_node' - 'for_each_matching_node_and_match' - 'for_each_member' - - 'for_each_memblock' + - 'for_each_mem_region' - 'for_each_memblock_type' - 'for_each_memcg_cache_index' - 'for_each_mem_pfn_range' + - '__for_each_mem_range' - 'for_each_mem_range' + - '__for_each_mem_range_rev' - 'for_each_mem_range_rev' - 'for_each_migratetype_order' - 'for_each_msi_entry' @@ -271,6 +273,7 @@ ForEachMacros: - 'for_each_registered_fb' - 'for_each_requested_gpio' - 'for_each_requested_gpio_in_range' + - 'for_each_reserved_mem_range' - 'for_each_reserved_mem_region' - 'for_each_rtd_codec_dais' - 'for_each_rtd_codec_dais_rollback' @@ -426,6 +429,7 @@ ForEachMacros: - 'rbtree_postorder_for_each_entry_safe' - 'rdma_for_each_block' - 'rdma_for_each_port' + - 'rdma_umem_for_each_dma_block' - 'resource_list_for_each_entry' - 'resource_list_for_each_entry_safe' - 'rhl_for_each_entry_rcu' diff --git a/.gitignore b/.gitignore index 162bd2b67bdf6..d01cda8e11779 100644 --- a/.gitignore +++ b/.gitignore @@ -152,3 +152,6 @@ x509.genkey # Clang's compilation database file /compile_commands.json + +# Documentation toolchain +sphinx_*/ diff --git a/.mailmap b/.mailmap index 0894a8b4ba7d3..1e14566a3d56c 100644 --- a/.mailmap +++ b/.mailmap @@ -133,6 +133,7 @@ James Ketrenos Jan Glauber Jan Glauber Jan Glauber +Jarkko Sakkinen Jason Gunthorpe Jason Gunthorpe Jason Gunthorpe @@ -197,6 +198,7 @@ Maciej W. Rozycki Marcin Nowakowski Marc Zyngier Mark Brown +Mark Starovoytov Mark Yao Martin Kepplinger Martin Kepplinger diff --git a/CREDITS b/CREDITS index 32ee70a7562ee..cb02b9923a526 100644 --- a/CREDITS +++ b/CREDITS @@ -191,6 +191,10 @@ N: Krishna Balasubramanian E: balasub@cis.ohio-state.edu D: Wrote SYS V IPC (part of standard kernel since 0.99.10) +B: Robert Baldyga +E: r.baldyga@hackerion.com +D: Samsung S3FWRN5 NCI NFC Controller + N: Chris Ball E: chris@printf.net D: Former maintainer of the MMC/SD/SDIO subsystem. @@ -1942,6 +1946,10 @@ S: Post Office Box 611311 S: San Jose, California 95161-1311 S: USA +N: Hartmut Knaack +E: knaack.h@gmx.de +D: IIO subsystem and drivers + N: Thorsten Knabe E: Thorsten Knabe E: Thorsten Knabe diff --git a/Documentation/ABI/obsolete/sysfs-selinux-checkreqprot b/Documentation/ABI/obsolete/sysfs-selinux-checkreqprot index 49ed9c8fd1e56..ed6b52ca210ff 100644 --- a/Documentation/ABI/obsolete/sysfs-selinux-checkreqprot +++ b/Documentation/ABI/obsolete/sysfs-selinux-checkreqprot @@ -15,7 +15,7 @@ Description: actual protection), and Android and Linux distributions have been explicitly writing a "0" to /sys/fs/selinux/checkreqprot during initialization for some time. Support for setting checkreqprot to 1 - will be removed in a future kernel release, at which point the kernel + will be removed no sooner than June 2021, at which point the kernel will always cease using checkreqprot internally and will always check the actual protections being applied upon mmap/mprotect calls. The checkreqprot selinuxfs node will remain for backward compatibility diff --git a/Documentation/ABI/stable/sysfs-bus-mhi b/Documentation/ABI/stable/sysfs-bus-mhi new file mode 100644 index 0000000000000..ecfe7662f8d0d --- /dev/null +++ b/Documentation/ABI/stable/sysfs-bus-mhi @@ -0,0 +1,21 @@ +What: /sys/bus/mhi/devices/.../serialnumber +Date: Sept 2020 +KernelVersion: 5.10 +Contact: Bhaumik Bhatt +Description: The file holds the serial number of the client device obtained + using a BHI (Boot Host Interface) register read after at least + one attempt to power up the device has been done. If read + without having the device power on at least once, the file will + read all 0's. +Users: Any userspace application or clients interested in device info. + +What: /sys/bus/mhi/devices/.../oem_pk_hash +Date: Sept 2020 +KernelVersion: 5.10 +Contact: Bhaumik Bhatt +Description: The file holds the OEM PK Hash value of the endpoint device + obtained using a BHI (Boot Host Interface) register read after + at least one attempt to power up the device has been done. If + read without having the device power on at least once, the file + will read all 0's. +Users: Any userspace application or clients interested in device info. diff --git a/Documentation/ABI/stable/sysfs-class-infiniband b/Documentation/ABI/stable/sysfs-class-infiniband index 96dfe1926b76e..87b11f91b4256 100644 --- a/Documentation/ABI/stable/sysfs-class-infiniband +++ b/Documentation/ABI/stable/sysfs-class-infiniband @@ -258,23 +258,6 @@ Description: userspace ABI compatibility of umad & issm devices. -What: /sys/class/infiniband_cm/ucmN/ibdev -Date: Oct, 2005 -KernelVersion: v2.6.14 -Contact: linux-rdma@vger.kernel.org -Description: - (RO) Display Infiniband (IB) device name - - -What: /sys/class/infiniband_cm/abi_version -Date: Oct, 2005 -KernelVersion: v2.6.14 -Contact: linux-rdma@vger.kernel.org -Description: - (RO) Value is incremented if any changes are made that break - userspace ABI compatibility of ucm devices. - - What: /sys/class/infiniband_verbs/uverbsN/ibdev What: /sys/class/infiniband_verbs/uverbsN/abi_version Date: Sept, 2005 diff --git a/Documentation/ABI/stable/sysfs-driver-dma-idxd b/Documentation/ABI/stable/sysfs-driver-dma-idxd index 1af9c41752135..b441838809355 100644 --- a/Documentation/ABI/stable/sysfs-driver-dma-idxd +++ b/Documentation/ABI/stable/sysfs-driver-dma-idxd @@ -116,6 +116,12 @@ Description: The maximum number of bandwidth tokens that may be in use at one time by operations that access low bandwidth memory in the device. +What: /sys/bus/dsa/devices/dsa/cmd_status +Date: Aug 28, 2020 +KernelVersion: 5.10.0 +Contact: dmaengine@vger.kernel.org +Description: The last executed device administrative command's status/error. + What: /sys/bus/dsa/devices/wq./group_id Date: Oct 25, 2019 KernelVersion: 5.6.0 @@ -170,6 +176,20 @@ Contact: dmaengine@vger.kernel.org Description: The number of entries in this work queue that may be filled via a limited portal. +What: /sys/bus/dsa/devices/wq./max_transfer_size +Date: Aug 28, 2020 +KernelVersion: 5.10.0 +Contact: dmaengine@vger.kernel.org +Description: The max transfer sized for this workqueue. Cannot exceed device + max transfer size. Configurable parameter. + +What: /sys/bus/dsa/devices/wq./max_batch_size +Date: Aug 28, 2020 +KernelVersion: 5.10.0 +Contact: dmaengine@vger.kernel.org +Description: The max batch size for this workqueue. Cannot exceed device + max batch size. Configurable parameter. + What: /sys/bus/dsa/devices/engine./group_id Date: Oct 25, 2019 KernelVersion: 5.6.0 diff --git a/Documentation/ABI/stable/sysfs-kernel-notes b/Documentation/ABI/stable/sysfs-kernel-notes new file mode 100644 index 0000000000000..2c76ee9e67f74 --- /dev/null +++ b/Documentation/ABI/stable/sysfs-kernel-notes @@ -0,0 +1,5 @@ +What: /sys/kernel/notes +Date: July 2009 +Contact: +Description: The /sys/kernel/notes file contains the binary representation + of the running vmlinux's .notes section. diff --git a/Documentation/ABI/testing/sysfs-bus-dfl b/Documentation/ABI/testing/sysfs-bus-dfl new file mode 100644 index 0000000000000..23543be904f2a --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-dfl @@ -0,0 +1,15 @@ +What: /sys/bus/dfl/devices/dfl_dev.X/type +Date: Aug 2020 +KernelVersion: 5.10 +Contact: Xu Yilun +Description: Read-only. It returns type of DFL FIU of the device. Now DFL + supports 2 FIU types, 0 for FME, 1 for PORT. + Format: 0x%x + +What: /sys/bus/dfl/devices/dfl_dev.X/feature_id +Date: Aug 2020 +KernelVersion: 5.10 +Contact: Xu Yilun +Description: Read-only. It returns feature identifier local to its DFL FIU + type. + Format: 0x%x diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_24x7 b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_24x7 index e82fc37be8022..2273627df1906 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_24x7 +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_24x7 @@ -1,3 +1,28 @@ +What: /sys/bus/event_source/devices/hv_24x7/format +Date: September 2020 +Contact: Linux on PowerPC Developer List +Description: Read-only. Attribute group to describe the magic bits + that go into perf_event_attr.config for a particular pmu. + (See ABI/testing/sysfs-bus-event_source-devices-format). + + Each attribute under this group defines a bit range of the + perf_event_attr.config. All supported attributes are listed + below. + + chip = "config:16-31" + core = "config:16-31" + domain = "config:0-3" + lpar = "config:0-15" + offset = "config:32-63" + vcpu = "config:16-31" + + For example, + + PM_PB_CYC = "domain=1,offset=0x80,chip=?,lpar=0x0" + + In this event, '?' after chip specifies that + this value will be provided by user while running this event. + What: /sys/bus/event_source/devices/hv_24x7/interface/catalog Date: February 2014 Contact: Linux on PowerPC Developer List diff --git a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci index 3ca4e554d2f92..6a023b42486c6 100644 --- a/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci +++ b/Documentation/ABI/testing/sysfs-bus-event_source-devices-hv_gpci @@ -1,3 +1,34 @@ +What: /sys/bus/event_source/devices/hv_gpci/format +Date: September 2020 +Contact: Linux on PowerPC Developer List +Description: Read-only. Attribute group to describe the magic bits + that go into perf_event_attr.config for a particular pmu. + (See ABI/testing/sysfs-bus-event_source-devices-format). + + Each attribute under this group defines a bit range of the + perf_event_attr.config. All supported attributes are listed + below. + + counter_info_version = "config:16-23" + length = "config:24-31" + partition_id = "config:32-63" + request = "config:0-31" + sibling_part_id = "config:32-63" + hw_chip_id = "config:32-63" + offset = "config:32-63" + phys_processor_idx = "config:32-63" + secondary_index = "config:0-15" + starting_index = "config:32-63" + + For example, + + processor_core_utilization_instructions_completed = "request=0x94, + phys_processor_idx=?,counter_info_version=0x8, + length=8,offset=0x18" + + In this event, '?' after phys_processor_idx specifies this value + this value will be provided by user while running this event. + What: /sys/bus/event_source/devices/hv_gpci/interface/collect_privileged Date: February 2014 Contact: Linux on PowerPC Developer List @@ -41,3 +72,10 @@ Contact: Linux on PowerPC Developer List Description: A number indicating the latest version of the gpci interface that the kernel is aware of. + +What: /sys/devices/hv_gpci/cpumask +Date: October 2020 +Contact: Linux on PowerPC Developer List +Description: read only + This sysfs file exposes the cpumask which is designated to make + HCALLs to retrieve hv-gpci pmu event counter data. diff --git a/Documentation/ABI/testing/sysfs-bus-fsi b/Documentation/ABI/testing/sysfs-bus-fsi index 320697bdf41dd..d148214181a1b 100644 --- a/Documentation/ABI/testing/sysfs-bus-fsi +++ b/Documentation/ABI/testing/sysfs-bus-fsi @@ -36,3 +36,11 @@ Contact: linux-fsi@lists.ozlabs.org Description: Provides a means of reading/writing a 32 bit value from/to a specified FSI bus address. + +What: /sys/bus/platform/devices/../cfam_reset +Date: Sept 2020 +KernelVersion: 5.10 +Contact: linux-fsi@lists.ozlabs.org +Description: + Provides a means of resetting the cfam that is attached to the + FSI device. diff --git a/Documentation/ABI/testing/sysfs-bus-iio b/Documentation/ABI/testing/sysfs-bus-iio index 5c62bfb0f3f57..a9d51810a3bad 100644 --- a/Documentation/ABI/testing/sysfs-bus-iio +++ b/Documentation/ABI/testing/sysfs-bus-iio @@ -40,6 +40,7 @@ Description: buffered samples and events for device X. What: /sys/bus/iio/devices/iio:deviceX/sampling_frequency +What: /sys/bus/iio/devices/iio:deviceX/in_intensity_sampling_frequency What: /sys/bus/iio/devices/iio:deviceX/buffer/sampling_frequency What: /sys/bus/iio/devices/triggerX/sampling_frequency KernelVersion: 2.6.35 @@ -49,12 +50,13 @@ Description: resulting sampling frequency. In many devices this parameter has an effect on input filters etc. rather than simply controlling when the input is sampled. As this - effects data ready triggers, hardware buffers and the sysfs + affects data ready triggers, hardware buffers and the sysfs direct access interfaces, it may be found in any of the - relevant directories. If it effects all of the above + relevant directories. If it affects all of the above then it is to be found in the base device directory. What: /sys/bus/iio/devices/iio:deviceX/sampling_frequency_available +What: /sys/bus/iio/devices/iio:deviceX/in_intensity_sampling_frequency_available What: /sys/bus/iio/devices/iio:deviceX/in_proximity_sampling_frequency_available What: /sys/.../iio:deviceX/buffer/sampling_frequency_available What: /sys/bus/iio/devices/triggerX/sampling_frequency_available @@ -374,6 +376,9 @@ What: /sys/bus/iio/devices/iio:deviceX/in_velocity_sqrt(x^2+y^2+z^2)_scale What: /sys/bus/iio/devices/iio:deviceX/in_illuminance_scale What: /sys/bus/iio/devices/iio:deviceX/in_countY_scale What: /sys/bus/iio/devices/iio:deviceX/in_angl_scale +What: /sys/bus/iio/devices/iio:deviceX/in_intensity_x_scale +What: /sys/bus/iio/devices/iio:deviceX/in_intensity_y_scale +What: /sys/bus/iio/devices/iio:deviceX/in_intensity_z_scale KernelVersion: 2.6.35 Contact: linux-iio@vger.kernel.org Description: @@ -401,21 +406,21 @@ Description: Hardware applied calibration offset (assumed to fix production inaccuracies). -What /sys/bus/iio/devices/iio:deviceX/in_voltageY_calibscale -What /sys/bus/iio/devices/iio:deviceX/in_voltageY_supply_calibscale -What /sys/bus/iio/devices/iio:deviceX/in_voltageY_i_calibscale -What /sys/bus/iio/devices/iio:deviceX/in_voltageY_q_calibscale -What /sys/bus/iio/devices/iio:deviceX/in_voltage_i_calibscale -What /sys/bus/iio/devices/iio:deviceX/in_voltage_q_calibscale -What /sys/bus/iio/devices/iio:deviceX/in_voltage_calibscale -What /sys/bus/iio/devices/iio:deviceX/in_accel_x_calibscale -What /sys/bus/iio/devices/iio:deviceX/in_accel_y_calibscale -What /sys/bus/iio/devices/iio:deviceX/in_accel_z_calibscale -What /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_calibscale -What /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_calibscale -What /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_calibscale -what /sys/bus/iio/devices/iio:deviceX/in_illuminance0_calibscale -what /sys/bus/iio/devices/iio:deviceX/in_proximity0_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_supply_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_i_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_voltageY_q_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_voltage_i_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_voltage_q_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_voltage_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_accel_x_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_accel_y_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_accel_z_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_x_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_y_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_anglvel_z_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_illuminance0_calibscale +What: /sys/bus/iio/devices/iio:deviceX/in_proximity0_calibscale What: /sys/bus/iio/devices/iio:deviceX/in_pressureY_calibscale What: /sys/bus/iio/devices/iio:deviceX/in_pressure_calibscale What: /sys/bus/iio/devices/iio:deviceX/in_illuminance_calibscale @@ -483,7 +488,8 @@ Description: If a discrete set of scale values is available, they are listed in this attribute. -What /sys/bus/iio/devices/iio:deviceX/out_voltageY_hardwaregain +What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_hardwaregain +What: /sys/bus/iio/devices/iio:deviceX/in_intensity_hardwaregain What: /sys/bus/iio/devices/iio:deviceX/in_intensity_red_hardwaregain What: /sys/bus/iio/devices/iio:deviceX/in_intensity_green_hardwaregain What: /sys/bus/iio/devices/iio:deviceX/in_intensity_blue_hardwaregain @@ -494,6 +500,13 @@ Description: Hardware applied gain factor. If shared across all channels, _hardwaregain is used. +What: /sys/bus/iio/devices/iio:deviceX/in_intensity_hardwaregain_available +KernelVersion: 5.10 +Contact: linux-iio@vger.kernel.org +Description: + Lists all available hardware applied gain factors. Shared across all + channels. + What: /sys/.../in_accel_filter_low_pass_3db_frequency What: /sys/.../in_magn_filter_low_pass_3db_frequency What: /sys/.../in_anglvel_filter_low_pass_3db_frequency @@ -750,9 +763,9 @@ What: /sys/.../events/in_voltageY_raw_thresh_falling_value What: /sys/.../events/in_tempY_raw_thresh_rising_value What: /sys/.../events/in_tempY_raw_thresh_falling_value What: /sys/.../events/in_illuminance0_thresh_falling_value -what: /sys/.../events/in_illuminance0_thresh_rising_value -what: /sys/.../events/in_proximity0_thresh_falling_value -what: /sys/.../events/in_proximity0_thresh_rising_value +What: /sys/.../events/in_illuminance0_thresh_rising_value +What: /sys/.../events/in_proximity0_thresh_falling_value +What: /sys/.../events/in_proximity0_thresh_rising_value What: /sys/.../events/in_illuminance_thresh_rising_value What: /sys/.../events/in_illuminance_thresh_falling_value KernelVersion: 2.6.37 @@ -832,11 +845,11 @@ What: /sys/.../events/in_tempY_thresh_rising_hysteresis What: /sys/.../events/in_tempY_thresh_falling_hysteresis What: /sys/.../events/in_tempY_thresh_either_hysteresis What: /sys/.../events/in_illuminance0_thresh_falling_hysteresis -what: /sys/.../events/in_illuminance0_thresh_rising_hysteresis -what: /sys/.../events/in_illuminance0_thresh_either_hysteresis -what: /sys/.../events/in_proximity0_thresh_falling_hysteresis -what: /sys/.../events/in_proximity0_thresh_rising_hysteresis -what: /sys/.../events/in_proximity0_thresh_either_hysteresis +What: /sys/.../events/in_illuminance0_thresh_rising_hysteresis +What: /sys/.../events/in_illuminance0_thresh_either_hysteresis +What: /sys/.../events/in_proximity0_thresh_falling_hysteresis +What: /sys/.../events/in_proximity0_thresh_rising_hysteresis +What: /sys/.../events/in_proximity0_thresh_either_hysteresis KernelVersion: 3.13 Contact: linux-iio@vger.kernel.org Description: @@ -1013,7 +1026,7 @@ What: /sys/.../events/in_activity_running_thresh_falling_en KernelVersion: 3.19 Contact: linux-iio@vger.kernel.org Description: - Enables or disables activitity events. Depending on direction + Enables or disables activity events. Depending on direction an event is generated when sensor ENTERS or LEAVES a given state. What: /sys/.../events/in_activity_still_thresh_rising_value @@ -1333,6 +1346,7 @@ Description: standardised CIE Erythemal Action Spectrum. UV index values range from 0 (low) to >=11 (extreme). +What: /sys/.../iio:deviceX/in_intensity_integration_time What: /sys/.../iio:deviceX/in_intensity_red_integration_time What: /sys/.../iio:deviceX/in_intensity_green_integration_time What: /sys/.../iio:deviceX/in_intensity_blue_integration_time @@ -1342,7 +1356,8 @@ KernelVersion: 3.12 Contact: linux-iio@vger.kernel.org Description: This attribute is used to get/set the integration time in - seconds. + seconds. If shared across all channels of a given type, + _integration_time is used. What: /sys/.../iio:deviceX/in_velocity_sqrt(x^2+y^2+z^2)_integration_time KernelVersion: 4.0 @@ -1564,6 +1579,8 @@ What: /sys/bus/iio/devices/iio:deviceX/in_concentration_ethanol_raw What: /sys/bus/iio/devices/iio:deviceX/in_concentrationX_ethanol_raw What: /sys/bus/iio/devices/iio:deviceX/in_concentration_h2_raw What: /sys/bus/iio/devices/iio:deviceX/in_concentrationX_h2_raw +What: /sys/bus/iio/devices/iio:deviceX/in_concentration_o2_raw +What: /sys/bus/iio/devices/iio:deviceX/in_concentrationX_o2_raw What: /sys/bus/iio/devices/iio:deviceX/in_concentration_voc_raw What: /sys/bus/iio/devices/iio:deviceX/in_concentrationX_voc_raw KernelVersion: 4.3 @@ -1740,3 +1757,20 @@ KernelVersion: 5.5 Contact: linux-iio@vger.kernel.org Description: One of the following thermocouple types: B, E, J, K, N, R, S, T. + +What: /sys/bus/iio/devices/iio:deviceX/in_temp_object_calibambient +What: /sys/bus/iio/devices/iio:deviceX/in_tempX_object_calibambient +KernelVersion: 5.10 +Contact: linux-iio@vger.kernel.org +Description: + Calibrated ambient temperature for object temperature + calculation in milli degrees Celsius. + +What: /sys/bus/iio/devices/iio:deviceX/in_intensity_x_raw +What: /sys/bus/iio/devices/iio:deviceX/in_intensity_y_raw +What: /sys/bus/iio/devices/iio:deviceX/in_intensity_z_raw +KernelVersion: 5.10 +Contact: linux-iio@vger.kernel.org +Description: + Unscaled light intensity according to CIE 1931/DIN 5033 color space. + Units after application of scale are nano nanowatts per square meter. diff --git a/Documentation/ABI/testing/sysfs-bus-iio-accel-adxl372 b/Documentation/ABI/testing/sysfs-bus-iio-accel-adxl372 new file mode 100644 index 0000000000000..47e34f865ca1b --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-accel-adxl372 @@ -0,0 +1,7 @@ +What: /sys/bus/iio/devices/triggerX/name = "adxl372-devX-peak" +KernelVersion: +Contact: linux-iio@vger.kernel.org +Description: + The adxl372 accelerometer kernel module provides an additional trigger, + which sets the device in a mode in which it will record only the peak acceleration + sensed over the set period of time in the events sysfs. diff --git a/Documentation/ABI/testing/sysfs-bus-iio-humidity-hdc2010 b/Documentation/ABI/testing/sysfs-bus-iio-humidity-hdc2010 new file mode 100644 index 0000000000000..5b78af5f341d2 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-humidity-hdc2010 @@ -0,0 +1,9 @@ +What: /sys/bus/iio/devices/iio:deviceX/out_current_heater_raw +What: /sys/bus/iio/devices/iio:deviceX/out_current_heater_raw_available +KernelVersion: 5.3.8 +Contact: linux-iio@vger.kernel.org +Description: + Controls the heater device within the humidity sensor to get + rid of excess condensation. + + Valid control values are 0 = OFF, and 1 = ON. diff --git a/Documentation/ABI/testing/sysfs-bus-iio-light-tsl2772 b/Documentation/ABI/testing/sysfs-bus-iio-light-tsl2772 new file mode 100644 index 0000000000000..b2798b258bf7b --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-light-tsl2772 @@ -0,0 +1,13 @@ +What: /sys/bus/iio/devices/device[n]/in_illuminance0_calibrate +KernelVersion: 3.3-rc1 +Contact: linux-iio@vger.kernel.org +Description: + Causes an internal calibration of the als gain trim + value which is later used in calculating illuminance in lux. + +What: /sys/bus/iio/devices/device[n]/in_proximity0_calibrate +KernelVersion: 3.3-rc1 +Contact: linux-iio@vger.kernel.org +Description: + Causes a recalculation and adjustment to the + proximity_thresh_rising_value. diff --git a/Documentation/ABI/testing/sysfs-bus-mei b/Documentation/ABI/testing/sysfs-bus-mei index 3d37e2796d5ad..6e9a105fe5cbe 100644 --- a/Documentation/ABI/testing/sysfs-bus-mei +++ b/Documentation/ABI/testing/sysfs-bus-mei @@ -41,6 +41,13 @@ Contact: Tomas Winkler Description: Stores mei client fixed address, if any Format: %d +What: /sys/bus/mei/devices/.../vtag +Date: Nov 2020 +KernelVersion: 5.9 +Contact: Tomas Winkler +Description: Stores mei client vtag support status + Format: %d + What: /sys/bus/mei/devices/.../max_len Date: Nov 2019 KernelVersion: 5.5 diff --git a/Documentation/ABI/testing/sysfs-bus-pci-devices-catpt b/Documentation/ABI/testing/sysfs-bus-pci-devices-catpt new file mode 100644 index 0000000000000..8a200f4eefbd7 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-pci-devices-catpt @@ -0,0 +1,16 @@ +What: /sys/devices/pci0000:00//fw_version +Date: September 2020 +Contact: Cezary Rojewski +Description: + Version of AudioDSP firmware ASoC catpt driver is + communicating with. + Format: %d.%d.%d.%d, type:major:minor:build. + +What: /sys/devices/pci0000:00//fw_info +Date: September 2020 +Contact: Cezary Rojewski +Description: + Detailed AudioDSP firmware build information including + build hash and log-providers hash. This information is + obtained during initial handshake with firmware. + Format: %s. diff --git a/Documentation/ABI/testing/sysfs-bus-soundwire-slave b/Documentation/ABI/testing/sysfs-bus-soundwire-slave index db4c9511d1aa9..d324aa0b678f4 100644 --- a/Documentation/ABI/testing/sysfs-bus-soundwire-slave +++ b/Documentation/ABI/testing/sysfs-bus-soundwire-slave @@ -1,3 +1,21 @@ +What: /sys/bus/soundwire/devices/sdw:.../status + /sys/bus/soundwire/devices/sdw:.../device_number + +Date: September 2020 + +Contact: Pierre-Louis Bossart + Bard Liao + Vinod Koul + +Description: SoundWire Slave status + + These properties report the Slave status, e.g. if it + is UNATTACHED or not, and in the latter case show the + device_number. This status information is useful to + detect devices exposed by platform firmware but not + physically present on the bus, and conversely devices + not exposed in platform firmware but enumerated. + What: /sys/bus/soundwire/devices/sdw:.../dev-properties/mipi_revision /sys/bus/soundwire/devices/sdw:.../dev-properties/wake_capable /sys/bus/soundwire/devices/sdw:.../dev-properties/test_mode_capable diff --git a/Documentation/ABI/testing/sysfs-class-power b/Documentation/ABI/testing/sysfs-class-power index 40213c73bc9c4..dbccb2fcd7ce7 100644 --- a/Documentation/ABI/testing/sysfs-class-power +++ b/Documentation/ABI/testing/sysfs-class-power @@ -34,7 +34,7 @@ Description: Describes the main type of the supply. Access: Read - Valid values: "Battery", "UPS", "Mains", "USB" + Valid values: "Battery", "UPS", "Mains", "USB", "Wireless" ===== Battery Properties ===== @@ -108,7 +108,8 @@ Description: which they average readings to smooth out the reported value. Access: Read - Valid values: Represented in microamps + Valid values: Represented in microamps. Negative values are used + for discharging batteries, positive values for charging batteries. What: /sys/class/power_supply//current_max Date: October 2010 @@ -127,7 +128,8 @@ Description: This value is not averaged/smoothed. Access: Read - Valid values: Represented in microamps + Valid values: Represented in microamps. Negative values are used + for discharging batteries, positive values for charging batteries. What: /sys/class/power_supply//charge_control_limit Date: Oct 2012 diff --git a/Documentation/ABI/testing/sysfs-class-remoteproc b/Documentation/ABI/testing/sysfs-class-remoteproc index 36094fbeb9749..066b9b6f4924d 100644 --- a/Documentation/ABI/testing/sysfs-class-remoteproc +++ b/Documentation/ABI/testing/sysfs-class-remoteproc @@ -58,3 +58,47 @@ Description: Remote processor name Reports the name of the remote processor. This can be used by userspace in exactly identifying a remote processor and ease up the usage in modifying the 'firmware' or 'state' files. + +What: /sys/class/remoteproc/.../coredump +Date: July 2020 +Contact: Bjorn Andersson , Ohad Ben-Cohen +Description: Remote processor coredump configuration + + Reports the coredump configuration of the remote processor, + which will be one of: + + "disabled" + "enabled" + "inline" + + "disabled" means no dump will be collected. + + "enabled" means when the remote processor's coredump is + collected it will be copied to a separate buffer and that + buffer is exposed to userspace. + + "inline" means when the remote processor's coredump is + collected userspace will directly read from the remote + processor's device memory. Extra buffer will not be used to + copy the dump. Also recovery process will not proceed until + all data is read by usersapce. + +What: /sys/class/remoteproc/.../recovery +Date: July 2020 +Contact: Bjorn Andersson , Ohad Ben-Cohen +Description: Remote processor recovery mechanism + + Reports the recovery mechanism of the remote processor, + which will be one of: + + "enabled" + "disabled" + + "enabled" means, the remote processor will be automatically + recovered whenever it crashes. Moreover, if the remote + processor crashes while recovery is disabled, it will + be automatically recovered too as soon as recovery is enabled. + + "disabled" means, a remote processor will remain in a crashed + state if it crashes. This is useful for debugging purposes; + without it, debugging a crash is substantially harder. diff --git a/Documentation/ABI/testing/sysfs-driver-habanalabs b/Documentation/ABI/testing/sysfs-driver-habanalabs index 1a14bf9b22ba4..169ae4b2a1806 100644 --- a/Documentation/ABI/testing/sysfs-driver-habanalabs +++ b/Documentation/ABI/testing/sysfs-driver-habanalabs @@ -2,13 +2,17 @@ What: /sys/class/habanalabs/hl/armcp_kernel_ver Date: Jan 2019 KernelVersion: 5.1 Contact: oded.gabbay@gmail.com -Description: Version of the Linux kernel running on the device's CPU +Description: Version of the Linux kernel running on the device's CPU. + Will be DEPRECATED in Linux kernel version 5.10, and be + replaced with cpucp_kernel_ver What: /sys/class/habanalabs/hl/armcp_ver Date: Jan 2019 KernelVersion: 5.1 Contact: oded.gabbay@gmail.com Description: Version of the application running on the device's CPU + Will be DEPRECATED in Linux kernel version 5.10, and be + replaced with cpucp_ver What: /sys/class/habanalabs/hl/clk_max_freq_mhz Date: Jun 2019 @@ -33,6 +37,18 @@ KernelVersion: 5.1 Contact: oded.gabbay@gmail.com Description: Version of the Device's CPLD F/W +What: /sys/class/habanalabs/hl/cpucp_kernel_ver +Date: Oct 2020 +KernelVersion: 5.10 +Contact: oded.gabbay@gmail.com +Description: Version of the Linux kernel running on the device's CPU + +What: /sys/class/habanalabs/hl/cpucp_ver +Date: Oct 2020 +KernelVersion: 5.10 +Contact: oded.gabbay@gmail.com +Description: Version of the application running on the device's CPU + What: /sys/class/habanalabs/hl/device_type Date: Jan 2019 KernelVersion: 5.1 diff --git a/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc new file mode 100644 index 0000000000000..979a2d62513ff --- /dev/null +++ b/Documentation/ABI/testing/sysfs-driver-intel-m10-bmc @@ -0,0 +1,15 @@ +What: /sys/bus/spi/devices/.../bmc_version +Date: June 2020 +KernelVersion: 5.10 +Contact: Xu Yilun +Description: Read only. Returns the hardware build version of Intel + MAX10 BMC chip. + Format: "0x%x". + +What: /sys/bus/spi/devices/.../bmcfw_version +Date: June 2020 +KernelVersion: 5.10 +Contact: Xu Yilun +Description: Read only. Returns the firmware version of Intel MAX10 + BMC chip. + Format: "0x%x". diff --git a/Documentation/ABI/testing/sysfs-driver-w1_therm b/Documentation/ABI/testing/sysfs-driver-w1_therm index 9b488c0afdfa2..8873bbb075cb9 100644 --- a/Documentation/ABI/testing/sysfs-driver-w1_therm +++ b/Documentation/ABI/testing/sysfs-driver-w1_therm @@ -49,10 +49,13 @@ Description: will be changed only in device RAM, so it will be cleared when power is lost. Trigger a 'save' to EEPROM command to keep values after power-on. Read or write are : - * '9..12': device resolution in bit + * '9..14': device resolution in bit or resolution to set in bit * '-xx': xx is kernel error when reading the resolution * Anything else: do nothing + Some DS18B20 clones are fixed in 12-bit resolution, so the + actual resolution is read back from the chip and verified. Error + is reported if the results differ. Users: any user space application which wants to communicate with w1_term device @@ -86,7 +89,7 @@ Description: *write* : * '0' : save the 2 or 3 bytes to the device EEPROM (i.e. TH, TL and config register) - * '9..12' : set the device resolution in RAM + * '9..14' : set the device resolution in RAM (if supported) * Anything else: do nothing refer to Documentation/w1/slaves/w1_therm.rst for detailed @@ -114,3 +117,47 @@ Description: of the bulk read command (not the current temperature). Users: any user space application which wants to communicate with w1_term device + + +What: /sys/bus/w1/devices/.../conv_time +Date: July 2020 +Contact: Ivan Zaentsev +Description: + (RW) Get, set, or measure a temperature conversion time. The + setting remains active until a resolution change. Then it is + reset to default (datasheet) conversion time for a new + resolution. + + *read*: Actual conversion time in milliseconds. *write*: + '0': Set the default conversion time from the datasheet. + '1': Measure and set the conversion time. Make a single + temperature conversion, measure an actual value. + Increase it by 20% for temperature range. A new + conversion time can be obtained by reading this + same attribute. + other positive value: + Set the conversion time in milliseconds. + +Users: An application using the w1_term device + + +What: /sys/bus/w1/devices/.../features +Date: July 2020 +Contact: Ivan Zaentsev +Description: + (RW) Control optional driver settings. + Bit masks to read/write (bitwise OR): + + 1: Enable check for conversion success. If byte 6 of + scratchpad memory is 0xC after conversion, and + temperature reads 85.00 (powerup value) or 127.94 + (insufficient power) - return a conversion error. + + 2: Enable poll for conversion completion. Generate read cycles + after the conversion start and wait for 1's. In parasite + power mode this feature is not available. + + *read*: Currently selected features. + *write*: Select features. + +Users: An application using the w1_term device diff --git a/Documentation/ABI/testing/sysfs-driver-xen-blkback b/Documentation/ABI/testing/sysfs-driver-xen-blkback index ecb7942ff1462..ac2947b989504 100644 --- a/Documentation/ABI/testing/sysfs-driver-xen-blkback +++ b/Documentation/ABI/testing/sysfs-driver-xen-blkback @@ -35,3 +35,12 @@ Description: controls the duration in milliseconds that blkback will not cache any page not backed by a grant mapping. The default is 10ms. + +What: /sys/module/xen_blkback/parameters/feature_persistent +Date: September 2020 +KernelVersion: 5.10 +Contact: SeongJae Park +Description: + Whether to enable the persistent grants feature or not. Note + that this option only takes effect on newly created backends. + The default is Y (enable). diff --git a/Documentation/ABI/testing/sysfs-driver-xen-blkfront b/Documentation/ABI/testing/sysfs-driver-xen-blkfront index c0a6cb7eb3142..28008905615f0 100644 --- a/Documentation/ABI/testing/sysfs-driver-xen-blkfront +++ b/Documentation/ABI/testing/sysfs-driver-xen-blkfront @@ -1,4 +1,4 @@ -What: /sys/module/xen_blkfront/parameters/max +What: /sys/module/xen_blkfront/parameters/max_indirect_segments Date: June 2013 KernelVersion: 3.11 Contact: Konrad Rzeszutek Wilk @@ -8,3 +8,12 @@ Description: is 32 - higher value means more potential throughput but more memory usage. The backend picks the minimum of the frontend and its default backend value. + +What: /sys/module/xen_blkfront/parameters/feature_persistent +Date: September 2020 +KernelVersion: 5.10 +Contact: SeongJae Park +Description: + Whether to enable the persistent grants feature or not. Note + that this option only takes effect on newly created frontends. + The default is Y (enable). diff --git a/Documentation/ABI/testing/sysfs-fs-f2fs b/Documentation/ABI/testing/sysfs-fs-f2fs index 7f730c4c8df22..834d0becae6dd 100644 --- a/Documentation/ABI/testing/sysfs-fs-f2fs +++ b/Documentation/ABI/testing/sysfs-fs-f2fs @@ -22,7 +22,8 @@ Contact: "Namjae Jeon" Description: Controls the victim selection policy for garbage collection. Setting gc_idle = 0(default) will disable this option. Setting gc_idle = 1 will select the Cost Benefit approach & setting - gc_idle = 2 will select the greedy approach. + gc_idle = 2 will select the greedy approach & setting + gc_idle = 3 will select the age-threshold based approach. What: /sys/fs/f2fs//reclaim_segments Date: October 2013 diff --git a/Documentation/ABI/testing/sysfs-platform-dptf b/Documentation/ABI/testing/sysfs-platform-dptf index eeed81ca6949d..2cbc660d163b2 100644 --- a/Documentation/ABI/testing/sysfs-platform-dptf +++ b/Documentation/ABI/testing/sysfs-platform-dptf @@ -92,3 +92,19 @@ Contact: linux-acpi@vger.kernel.org Description: (RO) The battery discharge current capability obtained from battery fuel gauge in milli Amps. + +What: /sys/bus/platform/devices/INTC1045:00/pch_fivr_switch_frequency/freq_mhz_low_clock +Date: November, 2020 +KernelVersion: v5.10 +Contact: linux-acpi@vger.kernel.org +Description: + (RW) The PCH FIVR (Fully Integrated Voltage Regulator) switching frequency in MHz, + when FIVR clock is 19.2MHz or 24MHz. + +What: /sys/bus/platform/devices/INTC1045:00/pch_fivr_switch_frequency/freq_mhz_high_clock +Date: November, 2020 +KernelVersion: v5.10 +Contact: linux-acpi@vger.kernel.org +Description: + (RW) The PCH FIVR (Fully Integrated Voltage Regulator) switching frequency in MHz, + when FIVR clock is 38.4MHz. diff --git a/Documentation/PCI/index.rst b/Documentation/PCI/index.rst index 8f66feaafd4f3..c17c87af19684 100644 --- a/Documentation/PCI/index.rst +++ b/Documentation/PCI/index.rst @@ -12,6 +12,7 @@ Linux PCI Bus Subsystem pciebus-howto pci-iov-howto msi-howto + sysfs-pci acpi-info pci-error-recovery pcieaer-howto diff --git a/Documentation/PCI/sysfs-pci.rst b/Documentation/PCI/sysfs-pci.rst new file mode 100644 index 0000000000000..742fbd21dc1f0 --- /dev/null +++ b/Documentation/PCI/sysfs-pci.rst @@ -0,0 +1,138 @@ +.. SPDX-License-Identifier: GPL-2.0 + +============================================ +Accessing PCI device resources through sysfs +============================================ + +sysfs, usually mounted at /sys, provides access to PCI resources on platforms +that support it. For example, a given bus might look like this:: + + /sys/devices/pci0000:17 + |-- 0000:17:00.0 + | |-- class + | |-- config + | |-- device + | |-- enable + | |-- irq + | |-- local_cpus + | |-- remove + | |-- resource + | |-- resource0 + | |-- resource1 + | |-- resource2 + | |-- revision + | |-- rom + | |-- subsystem_device + | |-- subsystem_vendor + | `-- vendor + `-- ... + +The topmost element describes the PCI domain and bus number. In this case, +the domain number is 0000 and the bus number is 17 (both values are in hex). +This bus contains a single function device in slot 0. The domain and bus +numbers are reproduced for convenience. Under the device directory are several +files, each with their own function. + + =================== ===================================================== + file function + =================== ===================================================== + class PCI class (ascii, ro) + config PCI config space (binary, rw) + device PCI device (ascii, ro) + enable Whether the device is enabled (ascii, rw) + irq IRQ number (ascii, ro) + local_cpus nearby CPU mask (cpumask, ro) + remove remove device from kernel's list (ascii, wo) + resource PCI resource host addresses (ascii, ro) + resource0..N PCI resource N, if present (binary, mmap, rw\ [1]_) + resource0_wc..N_wc PCI WC map resource N, if prefetchable (binary, mmap) + revision PCI revision (ascii, ro) + rom PCI ROM resource, if present (binary, ro) + subsystem_device PCI subsystem device (ascii, ro) + subsystem_vendor PCI subsystem vendor (ascii, ro) + vendor PCI vendor (ascii, ro) + =================== ===================================================== + +:: + + ro - read only file + rw - file is readable and writable + wo - write only file + mmap - file is mmapable + ascii - file contains ascii text + binary - file contains binary data + cpumask - file contains a cpumask type + +.. [1] rw for IORESOURCE_IO (I/O port) regions only + +The read only files are informational, writes to them will be ignored, with +the exception of the 'rom' file. Writable files can be used to perform +actions on the device (e.g. changing config space, detaching a device). +mmapable files are available via an mmap of the file at offset 0 and can be +used to do actual device programming from userspace. Note that some platforms +don't support mmapping of certain resources, so be sure to check the return +value from any attempted mmap. The most notable of these are I/O port +resources, which also provide read/write access. + +The 'enable' file provides a counter that indicates how many times the device +has been enabled. If the 'enable' file currently returns '4', and a '1' is +echoed into it, it will then return '5'. Echoing a '0' into it will decrease +the count. Even when it returns to 0, though, some of the initialisation +may not be reversed. + +The 'rom' file is special in that it provides read-only access to the device's +ROM file, if available. It's disabled by default, however, so applications +should write the string "1" to the file to enable it before attempting a read +call, and disable it following the access by writing "0" to the file. Note +that the device must be enabled for a rom read to return data successfully. +In the event a driver is not bound to the device, it can be enabled using the +'enable' file, documented above. + +The 'remove' file is used to remove the PCI device, by writing a non-zero +integer to the file. This does not involve any kind of hot-plug functionality, +e.g. powering off the device. The device is removed from the kernel's list of +PCI devices, the sysfs directory for it is removed, and the device will be +removed from any drivers attached to it. Removal of PCI root buses is +disallowed. + +Accessing legacy resources through sysfs +---------------------------------------- + +Legacy I/O port and ISA memory resources are also provided in sysfs if the +underlying platform supports them. They're located in the PCI class hierarchy, +e.g.:: + + /sys/class/pci_bus/0000:17/ + |-- bridge -> ../../../devices/pci0000:17 + |-- cpuaffinity + |-- legacy_io + `-- legacy_mem + +The legacy_io file is a read/write file that can be used by applications to +do legacy port I/O. The application should open the file, seek to the desired +port (e.g. 0x3e8) and do a read or a write of 1, 2 or 4 bytes. The legacy_mem +file should be mmapped with an offset corresponding to the memory offset +desired, e.g. 0xa0000 for the VGA frame buffer. The application can then +simply dereference the returned pointer (after checking for errors of course) +to access legacy memory space. + +Supporting PCI access on new platforms +-------------------------------------- + +In order to support PCI resource mapping as described above, Linux platform +code should ideally define ARCH_GENERIC_PCI_MMAP_RESOURCE and use the generic +implementation of that functionality. To support the historical interface of +mmap() through files in /proc/bus/pci, platforms may also set HAVE_PCI_MMAP. + +Alternatively, platforms which set HAVE_PCI_MMAP may provide their own +implementation of pci_mmap_page_range() instead of defining +ARCH_GENERIC_PCI_MMAP_RESOURCE. + +Platforms which support write-combining maps of PCI resources must define +arch_can_pci_mmap_wc() which shall evaluate to non-zero at runtime when +write-combining is permitted. Platforms which support maps of I/O resources +define arch_can_pci_mmap_io() similarly. + +Legacy resources are protected by the HAVE_PCI_LEGACY define. Platforms +wishing to support legacy functionality should define it and provide +pci_legacy_read, pci_legacy_write and pci_mmap_legacy_page_range functions. diff --git a/Documentation/RCU/Design/Data-Structures/Data-Structures.rst b/Documentation/RCU/Design/Data-Structures/Data-Structures.rst index 4a48e20a46f2b..f4efd6897b091 100644 --- a/Documentation/RCU/Design/Data-Structures/Data-Structures.rst +++ b/Documentation/RCU/Design/Data-Structures/Data-Structures.rst @@ -963,7 +963,7 @@ exit and perhaps also vice versa. Therefore, whenever the ``->dynticks_nesting`` field is incremented up from zero, the ``->dynticks_nmi_nesting`` field is set to a large positive number, and whenever the ``->dynticks_nesting`` field is decremented down to zero, -the the ``->dynticks_nmi_nesting`` field is set to zero. Assuming that +the ``->dynticks_nmi_nesting`` field is set to zero. Assuming that the number of misnested interrupts is not sufficient to overflow the counter, this approach corrects the ``->dynticks_nmi_nesting`` field every time the corresponding CPU enters the idle loop from process diff --git a/Documentation/RCU/Design/Requirements/Requirements.rst b/Documentation/RCU/Design/Requirements/Requirements.rst index 8f41ad0aa7534..1ae79a10a8de6 100644 --- a/Documentation/RCU/Design/Requirements/Requirements.rst +++ b/Documentation/RCU/Design/Requirements/Requirements.rst @@ -2162,7 +2162,7 @@ scheduling-clock interrupt be enabled when RCU needs it to be: this sort of thing. #. If a CPU is in a portion of the kernel that is absolutely positively no-joking guaranteed to never execute any RCU read-side critical - sections, and RCU believes this CPU to to be idle, no problem. This + sections, and RCU believes this CPU to be idle, no problem. This sort of thing is used by some architectures for light-weight exception handlers, which can then avoid the overhead of ``rcu_irq_enter()`` and ``rcu_irq_exit()`` at exception entry and @@ -2431,7 +2431,7 @@ However, there are legitimate preemptible-RCU implementations that do not have this property, given that any point in the code outside of an RCU read-side critical section can be a quiescent state. Therefore, *RCU-sched* was created, which follows “classic” RCU in that an -RCU-sched grace period waits for for pre-existing interrupt and NMI +RCU-sched grace period waits for pre-existing interrupt and NMI handlers. In kernels built with ``CONFIG_PREEMPT=n``, the RCU and RCU-sched APIs have identical implementations, while kernels built with ``CONFIG_PREEMPT=y`` provide a separate implementation for each. diff --git a/Documentation/RCU/whatisRCU.rst b/Documentation/RCU/whatisRCU.rst index c7f147b8034f0..fb3ff76c3e737 100644 --- a/Documentation/RCU/whatisRCU.rst +++ b/Documentation/RCU/whatisRCU.rst @@ -360,7 +360,7 @@ order to amortize their overhead over many uses of the corresponding APIs. There are at least three flavors of RCU usage in the Linux kernel. The diagram above shows the most common one. On the updater side, the rcu_assign_pointer(), -sychronize_rcu() and call_rcu() primitives used are the same for all three +synchronize_rcu() and call_rcu() primitives used are the same for all three flavors. However for protection (on the reader side), the primitives used vary depending on the flavor: diff --git a/Documentation/admin-guide/LSM/SafeSetID.rst b/Documentation/admin-guide/LSM/SafeSetID.rst index 7bff07ce4fdd2..17996c9070e23 100644 --- a/Documentation/admin-guide/LSM/SafeSetID.rst +++ b/Documentation/admin-guide/LSM/SafeSetID.rst @@ -3,9 +3,9 @@ SafeSetID ========= SafeSetID is an LSM module that gates the setid family of syscalls to restrict UID/GID transitions from a given UID/GID to only those approved by a -system-wide whitelist. These restrictions also prohibit the given UIDs/GIDs +system-wide allowlist. These restrictions also prohibit the given UIDs/GIDs from obtaining auxiliary privileges associated with CAP_SET{U/G}ID, such as -allowing a user to set up user namespace UID mappings. +allowing a user to set up user namespace UID/GID mappings. Background @@ -98,10 +98,21 @@ Directions for use ================== This LSM hooks the setid syscalls to make sure transitions are allowed if an applicable restriction policy is in place. Policies are configured through -securityfs by writing to the safesetid/add_whitelist_policy and -safesetid/flush_whitelist_policies files at the location where securityfs is -mounted. The format for adding a policy is ':', using literal -numbers, such as '123:456'. To flush the policies, any write to the file is -sufficient. Again, configuring a policy for a UID will prevent that UID from -obtaining auxiliary setid privileges, such as allowing a user to set up user -namespace UID mappings. +securityfs by writing to the safesetid/uid_allowlist_policy and +safesetid/gid_allowlist_policy files at the location where securityfs is +mounted. The format for adding a policy is ':' or ':', +using literal numbers, and ending with a newline character such as '123:456\n'. +Writing an empty string "" will flush the policy. Again, configuring a policy +for a UID/GID will prevent that UID/GID from obtaining auxiliary setid +privileges, such as allowing a user to set up user namespace UID/GID mappings. + +Note on GID policies and setgroups() +================== +In v5.9 we are adding support for limiting CAP_SETGID privileges as was done +previously for CAP_SETUID. However, for compatibility with common sandboxing +related code conventions in userspace, we currently allow arbitrary +setgroups() calls for processes with CAP_SETGID restrictions. Until we add +support in a future release for restricting setgroups() calls, these GID +policies add no meaningful security. setgroups() restrictions will be enforced +once we have the policy checking code in place, which will rely on GID policy +configuration code added in v5.9. diff --git a/Documentation/admin-guide/README.rst b/Documentation/admin-guide/README.rst index 5aad534233cd8..95a28f47ac307 100644 --- a/Documentation/admin-guide/README.rst +++ b/Documentation/admin-guide/README.rst @@ -322,9 +322,9 @@ Compiling the kernel reboot, and enjoy! If you ever need to change the default root device, video mode, - ramdisk size, etc. in the kernel image, use the ``rdev`` program (or - alternatively the LILO boot options when appropriate). No need to - recompile the kernel to change these parameters. + etc. in the kernel image, use your bootloader's boot options + where appropriate. No need to recompile the kernel to change + these parameters. - Reboot with the new kernel and enjoy. diff --git a/Documentation/admin-guide/bcache.rst b/Documentation/admin-guide/bcache.rst index 1eccf952876d4..8d3a2d045c0ae 100644 --- a/Documentation/admin-guide/bcache.rst +++ b/Documentation/admin-guide/bcache.rst @@ -5,11 +5,14 @@ A block layer cache (bcache) Say you've got a big slow raid 6, and an ssd or three. Wouldn't it be nice if you could use them as cache... Hence bcache. -Wiki and git repositories are at: +The bcache wiki can be found at: + https://bcache.evilpiepirate.org - - https://bcache.evilpiepirate.org - - http://evilpiepirate.org/git/linux-bcache.git - - https://evilpiepirate.org/git/bcache-tools.git +This is the git repository of bcache-tools: + https://git.kernel.org/pub/scm/linux/kernel/git/colyli/bcache-tools.git/ + +The latest bcache kernel code can be found from mainline Linux kernel: + https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/ It's designed around the performance characteristics of SSDs - it only allocates in erase block sized buckets, and it uses a hybrid btree/log to track cached @@ -41,17 +44,21 @@ in the cache it first disables writeback caching and waits for all dirty data to be flushed. Getting started: -You'll need make-bcache from the bcache-tools repository. Both the cache device +You'll need bcache util from the bcache-tools repository. Both the cache device and backing device must be formatted before use:: - make-bcache -B /dev/sdb - make-bcache -C /dev/sdc + bcache make -B /dev/sdb + bcache make -C /dev/sdc -make-bcache has the ability to format multiple devices at the same time - if +`bcache make` has the ability to format multiple devices at the same time - if you format your backing devices and cache device at the same time, you won't have to manually attach:: - make-bcache -B /dev/sda /dev/sdb -C /dev/sdc + bcache make -B /dev/sda /dev/sdb -C /dev/sdc + +If your bcache-tools is not updated to latest version and does not have the +unified `bcache` utility, you may use the legacy `make-bcache` utility to format +bcache device with same -B and -C parameters. bcache-tools now ships udev rules, and bcache devices are known to the kernel immediately. Without udev, you can manually register devices like this:: @@ -188,7 +195,7 @@ D) Recovering data without bcache: If bcache is not available in the kernel, a filesystem on the backing device is still available at an 8KiB offset. So either via a loopdev of the backing device created with --offset 8K, or any value defined by ---data-offset when you originally formatted bcache with `make-bcache`. +--data-offset when you originally formatted bcache with `bcache make`. For example:: @@ -210,7 +217,7 @@ E) Wiping a cache device After you boot back with bcache enabled, you recreate the cache and attach it:: - host:~# make-bcache -C /dev/sdh2 + host:~# bcache make -C /dev/sdh2 UUID: 7be7e175-8f4c-4f99-94b2-9c904d227045 Set UUID: 5bc072a8-ab17-446d-9744-e247949913c1 version: 0 @@ -318,7 +325,7 @@ want for getting the best possible numbers when benchmarking. The default metadata size in bcache is 8k. If your backing device is RAID based, then be sure to align this by a multiple of your stride - width using `make-bcache --data-offset`. If you intend to expand your + width using `bcache make --data-offset`. If you intend to expand your disk array in the future, then multiply a series of primes by your raid stripe size to get the disk multiples that you would like. diff --git a/Documentation/admin-guide/blockdev/ramdisk.rst b/Documentation/admin-guide/blockdev/ramdisk.rst index b7c2268f8deca..9ce6101e8dd98 100644 --- a/Documentation/admin-guide/blockdev/ramdisk.rst +++ b/Documentation/admin-guide/blockdev/ramdisk.rst @@ -6,7 +6,7 @@ Using the RAM disk block device with Linux 1) Overview 2) Kernel Command Line Parameters - 3) Using "rdev -r" + 3) Using "rdev" 4) An Example of Creating a Compressed RAM Disk @@ -59,51 +59,27 @@ default is 4096 (4 MB). rd_size See ramdisk_size. -3) Using "rdev -r" ------------------- +3) Using "rdev" +--------------- -The usage of the word (two bytes) that "rdev -r" sets in the kernel image is -as follows. The low 11 bits (0 -> 10) specify an offset (in 1 k blocks) of up -to 2 MB (2^11) of where to find the RAM disk (this used to be the size). Bit -14 indicates that a RAM disk is to be loaded, and bit 15 indicates whether a -prompt/wait sequence is to be given before trying to read the RAM disk. Since -the RAM disk dynamically grows as data is being written into it, a size field -is not required. Bits 11 to 13 are not currently used and may as well be zero. -These numbers are no magical secrets, as seen below:: +"rdev" is an obsolete, deprecated, antiquated utility that could be used +to set the boot device in a Linux kernel image. - ./arch/x86/kernel/setup.c:#define RAMDISK_IMAGE_START_MASK 0x07FF - ./arch/x86/kernel/setup.c:#define RAMDISK_PROMPT_FLAG 0x8000 - ./arch/x86/kernel/setup.c:#define RAMDISK_LOAD_FLAG 0x4000 +Instead of using rdev, just place the boot device information on the +kernel command line and pass it to the kernel from the bootloader. -Consider a typical two floppy disk setup, where you will have the -kernel on disk one, and have already put a RAM disk image onto disk #2. +You can also pass arguments to the kernel by setting FDARGS in +arch/x86/boot/Makefile and specify in initrd image by setting FDINITRD in +arch/x86/boot/Makefile. -Hence you want to set bits 0 to 13 as 0, meaning that your RAM disk -starts at an offset of 0 kB from the beginning of the floppy. -The command line equivalent is: "ramdisk_start=0" +Some of the kernel command line boot options that may apply here are:: -You want bit 14 as one, indicating that a RAM disk is to be loaded. -The command line equivalent is: "load_ramdisk=1" - -You want bit 15 as one, indicating that you want a prompt/keypress -sequence so that you have a chance to switch floppy disks. -The command line equivalent is: "prompt_ramdisk=1" - -Putting that together gives 2^15 + 2^14 + 0 = 49152 for an rdev word. -So to create disk one of the set, you would do:: - - /usr/src/linux# cat arch/x86/boot/zImage > /dev/fd0 - /usr/src/linux# rdev /dev/fd0 /dev/fd0 - /usr/src/linux# rdev -r /dev/fd0 49152 + ramdisk_start=N + ramdisk_size=M If you make a boot disk that has LILO, then for the above, you would use:: - append = "ramdisk_start=0 load_ramdisk=1 prompt_ramdisk=1" - -Since the default start = 0 and the default prompt = 1, you could use:: - - append = "load_ramdisk=1" - + append = "ramdisk_start=N ramdisk_size=M" 4) An Example of Creating a Compressed RAM Disk ----------------------------------------------- @@ -151,12 +127,9 @@ f) Put the RAM disk image onto the floppy, after the kernel. Use an offset dd if=/tmp/ram_image.gz of=/dev/fd0 bs=1k seek=400 -g) Use "rdev" to set the boot device, RAM disk offset, prompt flag, etc. - For prompt_ramdisk=1, load_ramdisk=1, ramdisk_start=400, one would - have 2^15 + 2^14 + 400 = 49552:: - - rdev /dev/fd0 /dev/fd0 - rdev -r /dev/fd0 49552 +g) Make sure that you have already specified the boot information in + FDARGS and FDINITRD or that you use a bootloader to pass kernel + command line boot options to the kernel. That is it. You now have your boot/root compressed RAM disk floppy. Some users may wish to combine steps (d) and (f) by using a pipe. @@ -167,11 +140,14 @@ users may wish to combine steps (d) and (f) by using a pipe. Changelog: ---------- +SEPT-2020 : + + Removed usage of "rdev" + 10-22-04 : Updated to reflect changes in command line options, remove obsolete references, general cleanup. James Nelson (james4765@gmail.com) - 12-95 : Original Document diff --git a/Documentation/admin-guide/cgroup-v1/cpusets.rst b/Documentation/admin-guide/cgroup-v1/cpusets.rst index 7ade3abd342ae..5d844ed4df699 100644 --- a/Documentation/admin-guide/cgroup-v1/cpusets.rst +++ b/Documentation/admin-guide/cgroup-v1/cpusets.rst @@ -1,3 +1,5 @@ +.. _cpusets: + ======= CPUSETS ======= diff --git a/Documentation/admin-guide/cgroup-v2.rst b/Documentation/admin-guide/cgroup-v2.rst index baa07b30845e2..608d7c279396b 100644 --- a/Documentation/admin-guide/cgroup-v2.rst +++ b/Documentation/admin-guide/cgroup-v2.rst @@ -1259,6 +1259,10 @@ PAGE_SIZE multiple when read back. can show up in the middle. Don't rely on items remaining in a fixed position; use the keys to look up specific values! + If the entry has no per-node counter(or not show in the + mempry.numa_stat). We use 'npn'(non-per-node) as the tag + to indicate that it will not show in the mempry.numa_stat. + anon Amount of memory used in anonymous mappings such as brk(), sbrk(), and mmap(MAP_ANONYMOUS) @@ -1270,15 +1274,11 @@ PAGE_SIZE multiple when read back. kernel_stack Amount of memory allocated to kernel stacks. - slab - Amount of memory used for storing in-kernel data - structures. - - percpu + percpu(npn) Amount of memory used for storing per-cpu kernel data structures. - sock + sock(npn) Amount of memory used in network transmission buffers shmem @@ -1318,11 +1318,9 @@ PAGE_SIZE multiple when read back. Part of "slab" that cannot be reclaimed on memory pressure. - pgfault - Total number of page faults incurred - - pgmajfault - Number of major page faults incurred + slab(npn) + Amount of memory used for storing in-kernel data + structures. workingset_refault_anon Number of refaults of previously evicted anonymous pages. @@ -1348,37 +1346,68 @@ PAGE_SIZE multiple when read back. workingset_nodereclaim Number of times a shadow node has been reclaimed - pgrefill + pgfault(npn) + Total number of page faults incurred + + pgmajfault(npn) + Number of major page faults incurred + + pgrefill(npn) Amount of scanned pages (in an active LRU list) - pgscan + pgscan(npn) Amount of scanned pages (in an inactive LRU list) - pgsteal + pgsteal(npn) Amount of reclaimed pages - pgactivate + pgactivate(npn) Amount of pages moved to the active LRU list - pgdeactivate + pgdeactivate(npn) Amount of pages moved to the inactive LRU list - pglazyfree + pglazyfree(npn) Amount of pages postponed to be freed under memory pressure - pglazyfreed + pglazyfreed(npn) Amount of reclaimed lazyfree pages - thp_fault_alloc + thp_fault_alloc(npn) Number of transparent hugepages which were allocated to satisfy a page fault. This counter is not present when CONFIG_TRANSPARENT_HUGEPAGE is not set. - thp_collapse_alloc + thp_collapse_alloc(npn) Number of transparent hugepages which were allocated to allow collapsing an existing range of pages. This counter is not present when CONFIG_TRANSPARENT_HUGEPAGE is not set. + memory.numa_stat + A read-only nested-keyed file which exists on non-root cgroups. + + This breaks down the cgroup's memory footprint into different + types of memory, type-specific details, and other information + per node on the state of the memory management system. + + This is useful for providing visibility into the NUMA locality + information within an memcg since the pages are allowed to be + allocated from any physical node. One of the use case is evaluating + application performance by combining this information with the + application's CPU allocation. + + All memory amounts are in bytes. + + The output format of memory.numa_stat is:: + + type N0= N1= ... + + The entries are ordered to be human readable, and new entries + can show up in the middle. Don't rely on items remaining in a + fixed position; use the keys to look up specific values! + + The entries can refer to the memory.stat. + memory.swap.current A read-only single value file which exists on non-root cgroups. diff --git a/Documentation/admin-guide/cpu-load.rst b/Documentation/admin-guide/cpu-load.rst index ebdecf8640802..f3ada90e9ca88 100644 --- a/Documentation/admin-guide/cpu-load.rst +++ b/Documentation/admin-guide/cpu-load.rst @@ -61,43 +61,46 @@ will lead to quite erratic information inside ``/proc/stat``:: static volatile sig_atomic_t stop; - static void sighandler (int signr) + static void sighandler(int signr) { - (void) signr; - stop = 1; + (void) signr; + stop = 1; } + static unsigned long hog (unsigned long niters) { - stop = 0; - while (!stop && --niters); - return niters; + stop = 0; + while (!stop && --niters); + return niters; } + int main (void) { - int i; - struct itimerval it = { .it_interval = { .tv_sec = 0, .tv_usec = 1 }, - .it_value = { .tv_sec = 0, .tv_usec = 1 } }; - sigset_t set; - unsigned long v[HIST]; - double tmp = 0.0; - unsigned long n; - signal (SIGALRM, &sighandler); - setitimer (ITIMER_REAL, &it, NULL); - - hog (ULONG_MAX); - for (i = 0; i < HIST; ++i) v[i] = ULONG_MAX - hog (ULONG_MAX); - for (i = 0; i < HIST; ++i) tmp += v[i]; - tmp /= HIST; - n = tmp - (tmp / 3.0); - - sigemptyset (&set); - sigaddset (&set, SIGALRM); - - for (;;) { - hog (n); - sigwait (&set, &i); - } - return 0; + int i; + struct itimerval it = { + .it_interval = { .tv_sec = 0, .tv_usec = 1 }, + .it_value = { .tv_sec = 0, .tv_usec = 1 } }; + sigset_t set; + unsigned long v[HIST]; + double tmp = 0.0; + unsigned long n; + signal(SIGALRM, &sighandler); + setitimer(ITIMER_REAL, &it, NULL); + + hog (ULONG_MAX); + for (i = 0; i < HIST; ++i) v[i] = ULONG_MAX - hog(ULONG_MAX); + for (i = 0; i < HIST; ++i) tmp += v[i]; + tmp /= HIST; + n = tmp - (tmp / 3.0); + + sigemptyset(&set); + sigaddset(&set, SIGALRM); + + for (;;) { + hog(n); + sigwait(&set, &i); + } + return 0; } diff --git a/Documentation/admin-guide/gpio/gpio-mockup.rst b/Documentation/admin-guide/gpio/gpio-mockup.rst new file mode 100644 index 0000000000000..9fa1618b3adce --- /dev/null +++ b/Documentation/admin-guide/gpio/gpio-mockup.rst @@ -0,0 +1,50 @@ +.. SPDX-License-Identifier: GPL-2.0-only + +GPIO Testing Driver +=================== + +The GPIO Testing Driver (gpio-mockup) provides a way to create simulated GPIO +chips for testing purposes. The lines exposed by these chips can be accessed +using the standard GPIO character device interface as well as manipulated +using the dedicated debugfs directory structure. + +Creating simulated chips using module params +-------------------------------------------- + +When loading the gpio-mockup driver a number of parameters can be passed to the +module. + + gpio_mockup_ranges + + This parameter takes an argument in the form of an array of integer + pairs. Each pair defines the base GPIO number (if any) and the number + of lines exposed by the chip. If the base GPIO is -1, the gpiolib + will assign it automatically. + + Example: gpio_mockup_ranges=-1,8,-1,16,405,4 + + The line above creates three chips. The first one will expose 8 lines, + the second 16 and the third 4. The base GPIO for the third chip is set + to 405 while for two first chips it will be assigned automatically. + + gpio_named_lines + + This parameter doesn't take any arguments. It lets the driver know that + GPIO lines exposed by it should be named. + + The name format is: gpio-mockup-X-Y where X is mockup chip's ID + and Y is the line offset. + +Manipulating simulated lines +---------------------------- + +Each mockup chip creates its own subdirectory in /sys/kernel/debug/gpio-mockup/. +The directory is named after the chip's label. A symlink is also created, named +after the chip's name, which points to the label directory. + +Inside each subdirectory, there's a separate attribute for each GPIO line. The +name of the attribute represents the line's offset in the chip. + +Reading from a line attribute returns the current value. Writing to it (0 or 1) +changes the configuration of the simulated pull-up/pull-down resistor +(1 - pull-up, 0 - pull-down). diff --git a/Documentation/admin-guide/gpio/index.rst b/Documentation/admin-guide/gpio/index.rst index ef2838638e967..7db367572f303 100644 --- a/Documentation/admin-guide/gpio/index.rst +++ b/Documentation/admin-guide/gpio/index.rst @@ -9,6 +9,7 @@ gpio gpio-aggregator sysfs + gpio-mockup .. only:: subproject and html diff --git a/Documentation/admin-guide/kdump/gdbmacros.txt b/Documentation/admin-guide/kdump/gdbmacros.txt index 220d0a80ca2c9..82aecdcae8a6c 100644 --- a/Documentation/admin-guide/kdump/gdbmacros.txt +++ b/Documentation/admin-guide/kdump/gdbmacros.txt @@ -170,57 +170,103 @@ document trapinfo address the kernel panicked. end -define dump_log_idx - set $idx = $arg0 - if ($argc > 1) - set $prev_flags = $arg1 +define dump_record + set var $desc = $arg0 + set var $info = $arg1 + if ($argc > 2) + set var $prev_flags = $arg2 else - set $prev_flags = 0 + set var $prev_flags = 0 end - set $msg = ((struct printk_log *) (log_buf + $idx)) - set $prefix = 1 - set $newline = 1 - set $log = log_buf + $idx + sizeof(*$msg) - - # prev & LOG_CONT && !(msg->flags & LOG_PREIX) - if (($prev_flags & 8) && !($msg->flags & 4)) - set $prefix = 0 + + set var $prefix = 1 + set var $newline = 1 + + set var $begin = $desc->text_blk_lpos.begin % (1U << prb->text_data_ring.size_bits) + set var $next = $desc->text_blk_lpos.next % (1U << prb->text_data_ring.size_bits) + + # handle data-less record + if ($begin & 1) + set var $text_len = 0 + set var $log = "" + else + # handle wrapping data block + if ($begin > $next) + set var $begin = 0 + end + + # skip over descriptor id + set var $begin = $begin + sizeof(long) + + # handle truncated message + if ($next - $begin < $info->text_len) + set var $text_len = $next - $begin + else + set var $text_len = $info->text_len + end + + set var $log = &prb->text_data_ring.data[$begin] + end + + # prev & LOG_CONT && !(info->flags & LOG_PREIX) + if (($prev_flags & 8) && !($info->flags & 4)) + set var $prefix = 0 end - # msg->flags & LOG_CONT - if ($msg->flags & 8) + # info->flags & LOG_CONT + if ($info->flags & 8) # (prev & LOG_CONT && !(prev & LOG_NEWLINE)) if (($prev_flags & 8) && !($prev_flags & 2)) - set $prefix = 0 + set var $prefix = 0 end - # (!(msg->flags & LOG_NEWLINE)) - if (!($msg->flags & 2)) - set $newline = 0 + # (!(info->flags & LOG_NEWLINE)) + if (!($info->flags & 2)) + set var $newline = 0 end end if ($prefix) - printf "[%5lu.%06lu] ", $msg->ts_nsec / 1000000000, $msg->ts_nsec % 1000000000 + printf "[%5lu.%06lu] ", $info->ts_nsec / 1000000000, $info->ts_nsec % 1000000000 end - if ($msg->text_len != 0) - eval "printf \"%%%d.%ds\", $log", $msg->text_len, $msg->text_len + if ($text_len) + eval "printf \"%%%d.%ds\", $log", $text_len, $text_len end if ($newline) printf "\n" end - if ($msg->dict_len > 0) - set $dict = $log + $msg->text_len - set $idx = 0 - set $line = 1 - while ($idx < $msg->dict_len) - if ($line) - printf " " - set $line = 0 + + # handle dictionary data + + set var $dict = &$info->dev_info.subsystem[0] + set var $dict_len = sizeof($info->dev_info.subsystem) + if ($dict[0] != '\0') + printf " SUBSYSTEM=" + set var $idx = 0 + while ($idx < $dict_len) + set var $c = $dict[$idx] + if ($c == '\0') + loop_break + else + if ($c < ' ' || $c >= 127 || $c == '\\') + printf "\\x%02x", $c + else + printf "%c", $c + end end - set $c = $dict[$idx] + set var $idx = $idx + 1 + end + printf "\n" + end + + set var $dict = &$info->dev_info.device[0] + set var $dict_len = sizeof($info->dev_info.device) + if ($dict[0] != '\0') + printf " DEVICE=" + set var $idx = 0 + while ($idx < $dict_len) + set var $c = $dict[$idx] if ($c == '\0') - printf "\n" - set $line = 1 + loop_break else if ($c < ' ' || $c >= 127 || $c == '\\') printf "\\x%02x", $c @@ -228,33 +274,46 @@ define dump_log_idx printf "%c", $c end end - set $idx = $idx + 1 + set var $idx = $idx + 1 end printf "\n" end end -document dump_log_idx - Dump a single log given its index in the log buffer. The first - parameter is the index into log_buf, the second is optional and - specified the previous log buffer's flags, used for properly - formatting continued lines. +document dump_record + Dump a single record. The first parameter is the descriptor, + the second parameter is the info, the third parameter is + optional and specifies the previous record's flags, used for + properly formatting continued lines. end define dmesg - set $i = log_first_idx - set $end_idx = log_first_idx - set $prev_flags = 0 + # definitions from kernel/printk/printk_ringbuffer.h + set var $desc_committed = 1 + set var $desc_finalized = 2 + set var $desc_sv_bits = sizeof(long) * 8 + set var $desc_flags_shift = $desc_sv_bits - 2 + set var $desc_flags_mask = 3 << $desc_flags_shift + set var $id_mask = ~$desc_flags_mask + + set var $desc_count = 1U << prb->desc_ring.count_bits + set var $prev_flags = 0 + + set var $id = prb->desc_ring.tail_id.counter + set var $end_id = prb->desc_ring.head_id.counter while (1) - set $msg = ((struct printk_log *) (log_buf + $i)) - if ($msg->len == 0) - set $i = 0 - else - dump_log_idx $i $prev_flags - set $i = $i + $msg->len - set $prev_flags = $msg->flags + set var $desc = &prb->desc_ring.descs[$id % $desc_count] + set var $info = &prb->desc_ring.infos[$id % $desc_count] + + # skip non-committed record + set var $state = 3 & ($desc->state_var.counter >> $desc_flags_shift) + if ($state == $desc_committed || $state == $desc_finalized) + dump_record $desc $info $prev_flags + set var $prev_flags = $info->flags end - if ($i == $end_idx) + + set var $id = ($id + 1) & $id_mask + if ($id == $end_id) loop_break end end diff --git a/Documentation/admin-guide/kdump/kdump.rst b/Documentation/admin-guide/kdump/kdump.rst index 2da65fef2a1c6..75a9dd98e76eb 100644 --- a/Documentation/admin-guide/kdump/kdump.rst +++ b/Documentation/admin-guide/kdump/kdump.rst @@ -509,9 +509,12 @@ ELF32-format headers using the --elf32-core-headers kernel option on the dump kernel. You can also use the Crash utility to analyze dump files in Kdump -format. Crash is available on Dave Anderson's site at the following URL: +format. Crash is available at the following URL: - http://people.redhat.com/~anderson/ + https://github.com/crash-utility/crash + +Crash document can be found at: + https://crash-utility.github.io/ Trigger Kdump on WARN() ======================= diff --git a/Documentation/admin-guide/kdump/vmcoreinfo.rst b/Documentation/admin-guide/kdump/vmcoreinfo.rst index 2baad0bfb09d0..e44a6c01f3362 100644 --- a/Documentation/admin-guide/kdump/vmcoreinfo.rst +++ b/Documentation/admin-guide/kdump/vmcoreinfo.rst @@ -189,50 +189,123 @@ from this. Free areas descriptor. User-space tools use this value to iterate the free_area ranges. MAX_ORDER is used by the zone buddy allocator. -log_first_idx +prb +--- + +A pointer to the printk ringbuffer (struct printk_ringbuffer). This +may be pointing to the static boot ringbuffer or the dynamically +allocated ringbuffer, depending on when the the core dump occurred. +Used by user-space tools to read the active kernel log buffer. + +printk_rb_static +---------------- + +A pointer to the static boot printk ringbuffer. If @prb has a +different value, this is useful for viewing the initial boot messages, +which may have been overwritten in the dynamically allocated +ringbuffer. + +clear_seq +--------- + +The sequence number of the printk() record after the last clear +command. It indicates the first record after the last +SYSLOG_ACTION_CLEAR, like issued by 'dmesg -c'. Used by user-space +tools to dump a subset of the dmesg log. + +printk_ringbuffer +----------------- + +The size of a printk_ringbuffer structure. This structure contains all +information required for accessing the various components of the +kernel log buffer. + +(printk_ringbuffer, desc_ring|text_data_ring|dict_data_ring|fail) +----------------------------------------------------------------- + +Offsets for the various components of the printk ringbuffer. Used by +user-space tools to view the kernel log buffer without requiring the +declaration of the structure. + +prb_desc_ring ------------- -Index of the first record stored in the buffer log_buf. Used by -user-space tools to read the strings in the log_buf. +The size of the prb_desc_ring structure. This structure contains +information about the set of record descriptors. -log_buf -------- +(prb_desc_ring, count_bits|descs|head_id|tail_id) +------------------------------------------------- + +Offsets for the fields describing the set of record descriptors. Used +by user-space tools to be able to traverse the descriptors without +requiring the declaration of the structure. + +prb_desc +-------- + +The size of the prb_desc structure. This structure contains +information about a single record descriptor. + +(prb_desc, info|state_var|text_blk_lpos|dict_blk_lpos) +------------------------------------------------------ + +Offsets for the fields describing a record descriptors. Used by +user-space tools to be able to read descriptors without requiring +the declaration of the structure. + +prb_data_blk_lpos +----------------- + +The size of the prb_data_blk_lpos structure. This structure contains +information about where the text or dictionary data (data block) is +located within the respective data ring. + +(prb_data_blk_lpos, begin|next) +------------------------------- -Console output is written to the ring buffer log_buf at index -log_first_idx. Used to get the kernel log. +Offsets for the fields describing the location of a data block. Used +by user-space tools to be able to locate data blocks without +requiring the declaration of the structure. -log_buf_len +printk_info ----------- -log_buf's length. +The size of the printk_info structure. This structure contains all +the meta-data for a record. -clear_idx ---------- +(printk_info, seq|ts_nsec|text_len|dict_len|caller_id) +------------------------------------------------------ -The index that the next printk() record to read after the last clear -command. It indicates the first record after the last SYSLOG_ACTION -_CLEAR, like issued by 'dmesg -c'. Used by user-space tools to dump -the dmesg log. +Offsets for the fields providing the meta-data for a record. Used by +user-space tools to be able to read the information without requiring +the declaration of the structure. -log_next_idx ------------- +prb_data_ring +------------- -The index of the next record to store in the buffer log_buf. Used to -compute the index of the current buffer position. +The size of the prb_data_ring structure. This structure contains +information about a set of data blocks. -printk_log ----------- +(prb_data_ring, size_bits|data|head_lpos|tail_lpos) +--------------------------------------------------- -The size of a structure printk_log. Used to compute the size of -messages, and extract dmesg log. It encapsulates header information for -log_buf, such as timestamp, syslog level, etc. +Offsets for the fields describing a set of data blocks. Used by +user-space tools to be able to access the data blocks without +requiring the declaration of the structure. -(printk_log, ts_nsec|len|text_len|dict_len) -------------------------------------------- +atomic_long_t +------------- + +The size of the atomic_long_t structure. Used by user-space tools to +be able to copy the full structure, regardless of its +architecture-specific implementation. + +(atomic_long_t, counter) +------------------------ -It represents field offsets in struct printk_log. User space tools -parse it and check whether the values of printk_log's members have been -changed. +Offset for the long value of an atomic_long_t variable. Used by +user-space tools to access the long value without requiring the +architecture-specific declaration. (free_area.free_list, MIGRATE_TYPES) ------------------------------------ diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index a1068742a6df1..526d65d8573a4 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -577,7 +577,7 @@ loops can be debugged more effectively on production systems. - clearcpuid=BITNUM [X86] + clearcpuid=BITNUM[,BITNUM...] [X86] Disable CPUID feature X for the kernel. See arch/x86/include/asm/cpufeatures.h for the valid bit numbers. Note the Linux specific bits are not necessarily @@ -591,13 +591,24 @@ some critical bits. cma=nn[MG]@[start[MG][-end[MG]]] - [ARM,X86,KNL] + [KNL,CMA] Sets the size of kernel global memory area for contiguous memory allocations and optionally the placement constraint by the physical address range of memory allocations. A value of 0 disables CMA altogether. For more information, see - include/linux/dma-contiguous.h + kernel/dma/contiguous.c + + cma_pernuma=nn[MG] + [ARM64,KNL] + Sets the size of kernel per-numa memory area for + contiguous memory allocations. A value of 0 disables + per-numa CMA altogether. And If this option is not + specificed, the default value is 0. + With per-numa CMA enabled, DMA users on node nid will + first try to allocate buffer from the pernuma area + which is located in node nid, if the allocation fails, + they will fallback to the global default memory area. cmo_free_hint= [PPC] Format: { yes | no } Specify whether pages are marked as being inactive @@ -940,7 +951,7 @@ Arch Perfmon v4 (Skylake and newer). disable_ddw [PPC/PSERIES] - Disable Dynamic DMA Window support. Use this if + Disable Dynamic DMA Window support. Use this to workaround buggy firmware. disable_ipv6= [IPV6] @@ -1019,7 +1030,7 @@ what data is available or for reverse-engineering. dyndbg[="val"] [KNL,DYNAMIC_DEBUG] - module.dyndbg[="val"] + .dyndbg[="val"] Enable debug messages at boot time. See Documentation/admin-guide/dynamic-debug-howto.rst for details. @@ -1027,7 +1038,7 @@ nopku [X86] Disable Memory Protection Keys CPU feature found in some Intel CPUs. - module.async_probe [KNL] + .async_probe [KNL] Enable asynchronous probe on this module. early_ioremap_debug [KNL] @@ -1332,12 +1343,18 @@ current integrity status. failslab= + fail_usercopy= fail_page_alloc= fail_make_request=[KNL] General fault injection mechanism. Format: ,,, See also Documentation/fault-injection/. + fb_tunnels= [NET] + Format: { initns | none } + See Documentation/admin-guide/sysctl/net.rst for + fb_tunnels_only_for_init_ns + floppy= [HW] See Documentation/admin-guide/blockdev/floppy.rst. @@ -1956,7 +1973,7 @@ 1 - Bypass the IOMMU for DMA. unset - Use value of CONFIG_IOMMU_DEFAULT_PASSTHROUGH. - io7= [HW] IO7 for Marvel based alpha systems + io7= [HW] IO7 for Marvel-based Alpha systems See comment before marvel_specify_io7 in arch/alpha/kernel/core_marvel.c. @@ -2177,7 +2194,7 @@ kgdbwait [KGDB] Stop kernel execution and enter the kernel debugger at the earliest opportunity. - kmac= [MIPS] korina ethernet MAC address. + kmac= [MIPS] Korina ethernet MAC address. Configure the RouterBoard 532 series on-chip Ethernet adapter MAC address. @@ -2258,6 +2275,14 @@ [KVM,ARM] Allow use of GICv4 for direct injection of LPIs. + kvm_cma_resv_ratio=n [PPC] + Reserves given percentage from system memory area for + contiguous memory allocation for KVM hash pagetable + allocation. + By default it reserves 5% of total system memory. + Format: + Default: 5 + kvm-intel.ept= [KVM,Intel] Disable extended page tables (virtualized MMU) support on capable Intel chips. Default is 1 (enabled) @@ -2367,9 +2392,10 @@ lapic [X86-32,APIC] Enable the local APIC even if BIOS disabled it. - lapic= [X86,APIC] "notscdeadline" Do not use TSC deadline + lapic= [X86,APIC] Do not use TSC deadline value for LAPIC timer one-shot implementation. Default back to the programmable timer unit in the LAPIC. + Format: notscdeadline lapic_timer_c2_ok [X86,APIC] trust the local apic timer in C2 power state. @@ -2441,8 +2467,7 @@ memblock=debug [KNL] Enable memblock debug messages. - load_ramdisk= [RAM] List of ramdisks to load from floppy - See Documentation/admin-guide/blockdev/ramdisk.rst. + load_ramdisk= [RAM] [Deprecated] lockd.nlm_grace_period=P [NFS] Assign grace period. Format: @@ -2579,8 +2604,8 @@ (machvec) in a generic kernel. Example: machvec=hpzx1 - machtype= [Loongson] Share the same kernel image file between different - yeeloong laptop. + machtype= [Loongson] Share the same kernel image file between + different yeeloong laptops. Example: machtype=lemote-yeeloong-2f-7inch max_addr=nn[KMG] [KNL,BOOT,ia64] All physical memory greater @@ -3070,6 +3095,10 @@ and gids from such clients. This is intended to ease migration from NFSv2/v3. + nmi_backtrace.backtrace_idle [KNL] + Dump stacks even of idle CPUs in response to an + NMI stack-backtrace request. + nmi_debug= [KNL,SH] Specify one or more actions to take when a NMI is triggered. Format: [state][,regs][,debounce][,die] @@ -3185,7 +3214,7 @@ register save and restore. The kernel will only save legacy floating-point registers on task switch. - nohugeiomap [KNL,X86,PPC] Disable kernel huge I/O mappings. + nohugeiomap [KNL,X86,PPC,ARM64] Disable kernel huge I/O mappings. nosmt [KNL,S390] Disable symmetric multithreading (SMT). Equivalent to smt=1. @@ -3921,9 +3950,7 @@ Param: - step/bucket size as a power of 2 for statistical time based profiling. - prompt_ramdisk= [RAM] List of RAM disks to prompt for floppy disk - before loading. - See Documentation/admin-guide/blockdev/ramdisk.rst. + prompt_ramdisk= [RAM] [Deprecated] prot_virt= [S390] enable hosting protected virtual machines isolated from the hypervisor (if hardware supports @@ -3981,6 +4008,8 @@ ramdisk_size= [RAM] Sizes of RAM disks in kilobytes See Documentation/admin-guide/blockdev/ramdisk.rst. + ramdisk_start= [RAM] RAM disk image start address + random.trust_cpu={on,off} [KNL] Enable or disable trusting the use of the CPU's random number generator (if available) to @@ -4149,46 +4178,55 @@ This wake_up() will be accompanied by a WARN_ONCE() splat and an ftrace_dump(). + rcutree.rcu_unlock_delay= [KNL] + In CONFIG_RCU_STRICT_GRACE_PERIOD=y kernels, + this specifies an rcu_read_unlock()-time delay + in microseconds. This defaults to zero. + Larger delays increase the probability of + catching RCU pointer leaks, that is, buggy use + of RCU-protected pointers after the relevant + rcu_read_unlock() has completed. + rcutree.sysrq_rcu= [KNL] Commandeer a sysrq key to dump out Tree RCU's rcu_node tree with an eye towards determining why a new grace period has not yet started. - rcuperf.gp_async= [KNL] + rcuscale.gp_async= [KNL] Measure performance of asynchronous grace-period primitives such as call_rcu(). - rcuperf.gp_async_max= [KNL] + rcuscale.gp_async_max= [KNL] Specify the maximum number of outstanding callbacks per writer thread. When a writer thread exceeds this limit, it invokes the corresponding flavor of rcu_barrier() to allow previously posted callbacks to drain. - rcuperf.gp_exp= [KNL] + rcuscale.gp_exp= [KNL] Measure performance of expedited synchronous grace-period primitives. - rcuperf.holdoff= [KNL] + rcuscale.holdoff= [KNL] Set test-start holdoff period. The purpose of this parameter is to delay the start of the test until boot completes in order to avoid interference. - rcuperf.kfree_rcu_test= [KNL] + rcuscale.kfree_rcu_test= [KNL] Set to measure performance of kfree_rcu() flooding. - rcuperf.kfree_nthreads= [KNL] + rcuscale.kfree_nthreads= [KNL] The number of threads running loops of kfree_rcu(). - rcuperf.kfree_alloc_num= [KNL] + rcuscale.kfree_alloc_num= [KNL] Number of allocations and frees done in an iteration. - rcuperf.kfree_loops= [KNL] - Number of loops doing rcuperf.kfree_alloc_num number + rcuscale.kfree_loops= [KNL] + Number of loops doing rcuscale.kfree_alloc_num number of allocations and frees. - rcuperf.nreaders= [KNL] + rcuscale.nreaders= [KNL] Set number of RCU readers. The value -1 selects N, where N is the number of CPUs. A value "n" less than -1 selects N-n+1, where N is again @@ -4197,23 +4235,23 @@ A value of "n" less than or equal to -N selects a single reader. - rcuperf.nwriters= [KNL] + rcuscale.nwriters= [KNL] Set number of RCU writers. The values operate - the same as for rcuperf.nreaders. + the same as for rcuscale.nreaders. N, where N is the number of CPUs - rcuperf.perf_type= [KNL] + rcuscale.perf_type= [KNL] Specify the RCU implementation to test. - rcuperf.shutdown= [KNL] + rcuscale.shutdown= [KNL] Shut the system down after performance tests complete. This is useful for hands-off automated testing. - rcuperf.verbose= [KNL] + rcuscale.verbose= [KNL] Enable additional printk() statements. - rcuperf.writer_holdoff= [KNL] + rcuscale.writer_holdoff= [KNL] Write-side holdoff between grace periods, in microseconds. The default of zero says no holdoff. @@ -4266,6 +4304,18 @@ are zero, rcutorture acts as if is interpreted they are all non-zero. + rcutorture.irqreader= [KNL] + Run RCU readers from irq handlers, or, more + accurately, from a timer handler. Not all RCU + flavors take kindly to this sort of thing. + + rcutorture.leakpointer= [KNL] + Leak an RCU-protected pointer out of the reader. + This can of course result in splats, and is + intended to test the ability of things like + CONFIG_RCU_STRICT_GRACE_PERIOD=y to detect + such leaks. + rcutorture.n_barrier_cbs= [KNL] Set callbacks/threads for rcu_barrier() testing. @@ -4487,8 +4537,8 @@ refscale.shutdown= [KNL] Shut down the system at the end of the performance test. This defaults to 1 (shut it down) when - rcuperf is built into the kernel and to 0 (leave - it running) when rcuperf is built as a module. + refscale is built into the kernel and to 0 (leave + it running) when refscale is built as a module. refscale.verbose= [KNL] Enable additional printk() statements. @@ -4634,6 +4684,98 @@ Format: integer between 0 and 10 Default is 0. + scftorture.holdoff= [KNL] + Number of seconds to hold off before starting + test. Defaults to zero for module insertion and + to 10 seconds for built-in smp_call_function() + tests. + + scftorture.longwait= [KNL] + Request ridiculously long waits randomly selected + up to the chosen limit in seconds. Zero (the + default) disables this feature. Please note + that requesting even small non-zero numbers of + seconds can result in RCU CPU stall warnings, + softlockup complaints, and so on. + + scftorture.nthreads= [KNL] + Number of kthreads to spawn to invoke the + smp_call_function() family of functions. + The default of -1 specifies a number of kthreads + equal to the number of CPUs. + + scftorture.onoff_holdoff= [KNL] + Number seconds to wait after the start of the + test before initiating CPU-hotplug operations. + + scftorture.onoff_interval= [KNL] + Number seconds to wait between successive + CPU-hotplug operations. Specifying zero (which + is the default) disables CPU-hotplug operations. + + scftorture.shutdown_secs= [KNL] + The number of seconds following the start of the + test after which to shut down the system. The + default of zero avoids shutting down the system. + Non-zero values are useful for automated tests. + + scftorture.stat_interval= [KNL] + The number of seconds between outputting the + current test statistics to the console. A value + of zero disables statistics output. + + scftorture.stutter_cpus= [KNL] + The number of jiffies to wait between each change + to the set of CPUs under test. + + scftorture.use_cpus_read_lock= [KNL] + Use use_cpus_read_lock() instead of the default + preempt_disable() to disable CPU hotplug + while invoking one of the smp_call_function*() + functions. + + scftorture.verbose= [KNL] + Enable additional printk() statements. + + scftorture.weight_single= [KNL] + The probability weighting to use for the + smp_call_function_single() function with a zero + "wait" parameter. A value of -1 selects the + default if all other weights are -1. However, + if at least one weight has some other value, a + value of -1 will instead select a weight of zero. + + scftorture.weight_single_wait= [KNL] + The probability weighting to use for the + smp_call_function_single() function with a + non-zero "wait" parameter. See weight_single. + + scftorture.weight_many= [KNL] + The probability weighting to use for the + smp_call_function_many() function with a zero + "wait" parameter. See weight_single. + Note well that setting a high probability for + this weighting can place serious IPI load + on the system. + + scftorture.weight_many_wait= [KNL] + The probability weighting to use for the + smp_call_function_many() function with a + non-zero "wait" parameter. See weight_single + and weight_many. + + scftorture.weight_all= [KNL] + The probability weighting to use for the + smp_call_function_all() function with a zero + "wait" parameter. See weight_single and + weight_many. + + scftorture.weight_all_wait= [KNL] + The probability weighting to use for the + smp_call_function_all() function with a + non-zero "wait" parameter. See weight_single + and weight_many. + skew_tick= [KNL] Offset the periodic timer tick per cpu to mitigate xtime_lock contention on larger systems, and/or RCU lock contention on all systems with CONFIG_MAXSMP set. @@ -5828,6 +5970,21 @@ improve timer resolution at the expense of processing more timer interrupts. + xen.event_eoi_delay= [XEN] + How long to delay EOI handling in case of event + storms (jiffies). Default is 10. + + xen.event_loop_timeout= [XEN] + After which time (jiffies) the event handling loop + should start to delay EOI handling. Default is 2. + + xen.fifo_events= [XEN] + Boolean parameter to disable using fifo event handling + even if available. Normally fifo event handling is + preferred over the 2-level event handling, as it is + fairer and the number of possible event channels is + much higher. Default is on (use fifo events). + nopv= [X86,XEN,KVM,HYPER_V,VMWARE] Disables the PV optimizations forcing the guest to run as generic guest with no PV drivers. Currently support diff --git a/Documentation/admin-guide/media/dvb-usb-dvbsky-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-dvbsky-cardlist.rst index 4fb4ce56df7cc..9f7b619f35f79 100644 --- a/Documentation/admin-guide/media/dvb-usb-dvbsky-cardlist.rst +++ b/Documentation/admin-guide/media/dvb-usb-dvbsky-cardlist.rst @@ -20,13 +20,13 @@ dvb-usb-dvbsky cards list - 0572:0320 * - DVBSky T680CI - 0572:680c - * - MyGica Mini DVB-T2 USB Stick T230 + * - MyGica Mini DVB-(T/T2/C) USB Stick T230 - 0572:c688 - * - MyGica Mini DVB-T2 USB Stick T230C + * - MyGica Mini DVB-(T/T2/C) USB Stick T230C - 0572:c689 - * - MyGica Mini DVB-T2 USB Stick T230C Lite + * - MyGica Mini DVB-(T/T2/C) USB Stick T230C Lite - 0572:c699 - * - MyGica Mini DVB-T2 USB Stick T230C v2 + * - MyGica Mini DVB-(T/T2/C) USB Stick T230C v2 - 0572:c68a * - TechnoTrend TT-connect CT2-4650 CI - 0b48:3012 diff --git a/Documentation/admin-guide/media/dvb-usb-dw2102-cardlist.rst b/Documentation/admin-guide/media/dvb-usb-dw2102-cardlist.rst index f01f9df1e2495..e39bc8e4bffe7 100644 --- a/Documentation/admin-guide/media/dvb-usb-dw2102-cardlist.rst +++ b/Documentation/admin-guide/media/dvb-usb-dw2102-cardlist.rst @@ -40,6 +40,10 @@ dvb-usb-dw2102 cards list - 0b48:3011 * - TerraTec Cinergy S USB - 0ccd:0064 + * - Terratec Cinergy S2 PCIe Dual Port 1 + - 153b:1181 + * - Terratec Cinergy S2 PCIe Dual Port 2 + - 153b:1182 * - Terratec Cinergy S2 USB BOX - 0ccd:0x0105 * - Terratec Cinergy S2 USB HD diff --git a/Documentation/admin-guide/media/em28xx-cardlist.rst b/Documentation/admin-guide/media/em28xx-cardlist.rst index a5f0e6d22a1aa..ace65718ea22f 100644 --- a/Documentation/admin-guide/media/em28xx-cardlist.rst +++ b/Documentation/admin-guide/media/em28xx-cardlist.rst @@ -434,3 +434,7 @@ EM28xx cards list - PCTV DVB-S2 Stick (461e v2) - em28178 - 2013:0461, 2013:0259 + * - 105 + - MyGica iGrabber + - em2860 + - 1f4d:1abe diff --git a/Documentation/admin-guide/media/ipu3.rst b/Documentation/admin-guide/media/ipu3.rst index 9361c34f123e6..07d139bf8459d 100644 --- a/Documentation/admin-guide/media/ipu3.rst +++ b/Documentation/admin-guide/media/ipu3.rst @@ -89,41 +89,41 @@ Let us take the example of ov5670 sensor connected to CSI2 port 0, for a Using the media contorller APIs, the ov5670 sensor is configured to send frames in packed raw Bayer format to IPU3 CSI2 receiver. -# This example assumes /dev/media0 as the CIO2 media device - -export MDEV=/dev/media0 - -# and that ov5670 sensor is connected to i2c bus 10 with address 0x36 - -export SDEV=$(media-ctl -d $MDEV -e "ov5670 10-0036") +.. code-block:: none -# Establish the link for the media devices using media-ctl [#f3]_ -media-ctl -d $MDEV -l "ov5670:0 -> ipu3-csi2 0:0[1]" + # This example assumes /dev/media0 as the CIO2 media device + export MDEV=/dev/media0 -# Set the format for the media devices -media-ctl -d $MDEV -V "ov5670:0 [fmt:SGRBG10/2592x1944]" + # and that ov5670 sensor is connected to i2c bus 10 with address 0x36 + export SDEV=$(media-ctl -d $MDEV -e "ov5670 10-0036") -media-ctl -d $MDEV -V "ipu3-csi2 0:0 [fmt:SGRBG10/2592x1944]" + # Establish the link for the media devices using media-ctl [#f3]_ + media-ctl -d $MDEV -l "ov5670:0 -> ipu3-csi2 0:0[1]" -media-ctl -d $MDEV -V "ipu3-csi2 0:1 [fmt:SGRBG10/2592x1944]" + # Set the format for the media devices + media-ctl -d $MDEV -V "ov5670:0 [fmt:SGRBG10/2592x1944]" + media-ctl -d $MDEV -V "ipu3-csi2 0:0 [fmt:SGRBG10/2592x1944]" + media-ctl -d $MDEV -V "ipu3-csi2 0:1 [fmt:SGRBG10/2592x1944]" Once the media pipeline is configured, desired sensor specific settings (such as exposure and gain settings) can be set, using the yavta tool. e.g -yavta -w 0x009e0903 444 $SDEV - -yavta -w 0x009e0913 1024 $SDEV +.. code-block:: none -yavta -w 0x009e0911 2046 $SDEV + yavta -w 0x009e0903 444 $SDEV + yavta -w 0x009e0913 1024 $SDEV + yavta -w 0x009e0911 2046 $SDEV Once the desired sensor settings are set, frame captures can be done as below. e.g -yavta --data-prefix -u -c10 -n5 -I -s2592x1944 --file=/tmp/frame-#.bin \ - -f IPU3_SGRBG10 $(media-ctl -d $MDEV -e "ipu3-cio2 0") +.. code-block:: none + + yavta --data-prefix -u -c10 -n5 -I -s2592x1944 --file=/tmp/frame-#.bin \ + -f IPU3_SGRBG10 $(media-ctl -d $MDEV -e "ipu3-cio2 0") With the above command, 10 frames are captured at 2592x1944 resolution, with sGRBG10 format and output as IPU3_SGRBG10 format. @@ -269,21 +269,21 @@ all the video nodes setup correctly. Let us take "ipu3-imgu 0" subdev as an example. -media-ctl -d $MDEV -r - -media-ctl -d $MDEV -l "ipu3-imgu 0 input":0 -> "ipu3-imgu 0":0[1] - -media-ctl -d $MDEV -l "ipu3-imgu 0":2 -> "ipu3-imgu 0 output":0[1] - -media-ctl -d $MDEV -l "ipu3-imgu 0":3 -> "ipu3-imgu 0 viewfinder":0[1] +.. code-block:: none -media-ctl -d $MDEV -l "ipu3-imgu 0":4 -> "ipu3-imgu 0 3a stat":0[1] + media-ctl -d $MDEV -r + media-ctl -d $MDEV -l "ipu3-imgu 0 input":0 -> "ipu3-imgu 0":0[1] + media-ctl -d $MDEV -l "ipu3-imgu 0":2 -> "ipu3-imgu 0 output":0[1] + media-ctl -d $MDEV -l "ipu3-imgu 0":3 -> "ipu3-imgu 0 viewfinder":0[1] + media-ctl -d $MDEV -l "ipu3-imgu 0":4 -> "ipu3-imgu 0 3a stat":0[1] Also the pipe mode of the corresponding V4L2 subdev should be set as desired (e.g 0 for video mode or 1 for still mode) through the control id 0x009819a1 as below. -yavta -w "0x009819A1 1" /dev/v4l-subdev7 +.. code-block:: none + + yavta -w "0x009819A1 1" /dev/v4l-subdev7 Certain hardware blocks in ImgU pipeline can change the frame resolution by cropping or scaling, these hardware blocks include Input Feeder(IF), Bayer Down @@ -371,30 +371,32 @@ v4l2n command can be used. This helps process the raw Bayer frames and produces the desired results for the main output image and the viewfinder output, in NV12 format. -v4l2n --pipe=4 --load=/tmp/frame-#.bin --open=/dev/video4 ---fmt=type:VIDEO_OUTPUT_MPLANE,width=2592,height=1944,pixelformat=0X47337069 ---reqbufs=type:VIDEO_OUTPUT_MPLANE,count:1 --pipe=1 --output=/tmp/frames.out ---open=/dev/video5 ---fmt=type:VIDEO_CAPTURE_MPLANE,width=2560,height=1920,pixelformat=NV12 ---reqbufs=type:VIDEO_CAPTURE_MPLANE,count:1 --pipe=2 --output=/tmp/frames.vf ---open=/dev/video6 ---fmt=type:VIDEO_CAPTURE_MPLANE,width=2560,height=1920,pixelformat=NV12 ---reqbufs=type:VIDEO_CAPTURE_MPLANE,count:1 --pipe=3 --open=/dev/video7 ---output=/tmp/frames.3A --fmt=type:META_CAPTURE,? ---reqbufs=count:1,type:META_CAPTURE --pipe=1,2,3,4 --stream=5 +.. code-block:: none + + v4l2n --pipe=4 --load=/tmp/frame-#.bin --open=/dev/video4 + --fmt=type:VIDEO_OUTPUT_MPLANE,width=2592,height=1944,pixelformat=0X47337069 \ + --reqbufs=type:VIDEO_OUTPUT_MPLANE,count:1 --pipe=1 \ + --output=/tmp/frames.out --open=/dev/video5 \ + --fmt=type:VIDEO_CAPTURE_MPLANE,width=2560,height=1920,pixelformat=NV12 \ + --reqbufs=type:VIDEO_CAPTURE_MPLANE,count:1 --pipe=2 \ + --output=/tmp/frames.vf --open=/dev/video6 \ + --fmt=type:VIDEO_CAPTURE_MPLANE,width=2560,height=1920,pixelformat=NV12 \ + --reqbufs=type:VIDEO_CAPTURE_MPLANE,count:1 --pipe=3 --open=/dev/video7 \ + --output=/tmp/frames.3A --fmt=type:META_CAPTURE,? \ + --reqbufs=count:1,type:META_CAPTURE --pipe=1,2,3,4 --stream=5 You can also use yavta [#f2]_ command to do same thing as above: .. code-block:: none - yavta --data-prefix -Bcapture-mplane -c10 -n5 -I -s2592x1944 \ - --file=frame-#.out-f NV12 /dev/video5 & \ - yavta --data-prefix -Bcapture-mplane -c10 -n5 -I -s2592x1944 \ - --file=frame-#.vf -f NV12 /dev/video6 & \ - yavta --data-prefix -Bmeta-capture -c10 -n5 -I \ - --file=frame-#.3a /dev/video7 & \ - yavta --data-prefix -Boutput-mplane -c10 -n5 -I -s2592x1944 \ - --file=/tmp/frame-in.cio2 -f IPU3_SGRBG10 /dev/video4 + yavta --data-prefix -Bcapture-mplane -c10 -n5 -I -s2592x1944 \ + --file=frame-#.out-f NV12 /dev/video5 & \ + yavta --data-prefix -Bcapture-mplane -c10 -n5 -I -s2592x1944 \ + --file=frame-#.vf -f NV12 /dev/video6 & \ + yavta --data-prefix -Bmeta-capture -c10 -n5 -I \ + --file=frame-#.3a /dev/video7 & \ + yavta --data-prefix -Boutput-mplane -c10 -n5 -I -s2592x1944 \ + --file=/tmp/frame-in.cio2 -f IPU3_SGRBG10 /dev/video4 where /dev/video4, /dev/video5, /dev/video6 and /dev/video7 devices point to input, output, viewfinder and 3A statistics video nodes respectively. @@ -408,7 +410,9 @@ as below. Main output frames ~~~~~~~~~~~~~~~~~~ -raw2pnm -x2560 -y1920 -fNV12 /tmp/frames.out /tmp/frames.out.ppm +.. code-block:: none + + raw2pnm -x2560 -y1920 -fNV12 /tmp/frames.out /tmp/frames.out.ppm where 2560x1920 is output resolution, NV12 is the video format, followed by input frame and output PNM file. @@ -416,7 +420,9 @@ by input frame and output PNM file. Viewfinder output frames ~~~~~~~~~~~~~~~~~~~~~~~~ -raw2pnm -x2560 -y1920 -fNV12 /tmp/frames.vf /tmp/frames.vf.ppm +.. code-block:: none + + raw2pnm -x2560 -y1920 -fNV12 /tmp/frames.vf /tmp/frames.vf.ppm where 2560x1920 is output resolution, NV12 is the video format, followed by input frame and output PNM file. @@ -482,63 +488,63 @@ Name Description Optical Black Correction Optical Black Correction block subtracts a pre-defined value from the respective pixel values to obtain better image quality. - Defined in :c:type:`ipu3_uapi_obgrid_param`. + Defined in struct ipu3_uapi_obgrid_param. Linearization This algo block uses linearization parameters to address non-linearity sensor effects. The Lookup table table is defined in - :c:type:`ipu3_uapi_isp_lin_vmem_params`. + struct ipu3_uapi_isp_lin_vmem_params. SHD Lens shading correction is used to correct spatial non-uniformity of the pixel response due to optical lens shading. This is done by applying a different gain for each pixel. The gain, black level etc are - configured in :c:type:`ipu3_uapi_shd_config_static`. + configured in struct ipu3_uapi_shd_config_static. BNR Bayer noise reduction block removes image noise by applying a bilateral filter. - See :c:type:`ipu3_uapi_bnr_static_config` for details. + See struct ipu3_uapi_bnr_static_config for details. ANR Advanced Noise Reduction is a block based algorithm that performs noise reduction in the Bayer domain. The convolution matrix etc can be found in - :c:type:`ipu3_uapi_anr_config`. + struct ipu3_uapi_anr_config. DM Demosaicing converts raw sensor data in Bayer format into RGB (Red, Green, Blue) presentation. Then add outputs of estimation of Y channel for following stream processing by Firmware. The struct is defined as - :c:type:`ipu3_uapi_dm_config`. + struct ipu3_uapi_dm_config. Color Correction Color Correction algo transforms sensor specific color space to the standard "sRGB" color space. This is done by applying 3x3 matrix defined in - :c:type:`ipu3_uapi_ccm_mat_config`. -Gamma correction Gamma correction :c:type:`ipu3_uapi_gamma_config` is a + struct ipu3_uapi_ccm_mat_config. +Gamma correction Gamma correction struct ipu3_uapi_gamma_config is a basic non-linear tone mapping correction that is applied per pixel for each pixel component. CSC Color space conversion transforms each pixel from the RGB primary presentation to YUV (Y: brightness, UV: Luminance) presentation. This is done by applying a 3x3 matrix defined in - :c:type:`ipu3_uapi_csc_mat_config` + struct ipu3_uapi_csc_mat_config CDS Chroma down sampling After the CSC is performed, the Chroma Down Sampling is applied for a UV plane down sampling by a factor of 2 in each direction for YUV 4:2:0 using a 4x2 - configurable filter :c:type:`ipu3_uapi_cds_params`. + configurable filter struct ipu3_uapi_cds_params. CHNR Chroma noise reduction This block processes only the chrominance pixels and performs noise reduction by cleaning the high frequency noise. - See struct :c:type:`ipu3_uapi_yuvp1_chnr_config`. + See struct struct ipu3_uapi_yuvp1_chnr_config. TCC Total color correction as defined in struct - :c:type:`ipu3_uapi_yuvp2_tcc_static_config`. + struct ipu3_uapi_yuvp2_tcc_static_config. XNR3 eXtreme Noise Reduction V3 is the third revision of noise reduction algorithm used to improve image quality. This removes the low frequency noise in the captured image. Two related structs are being defined, - :c:type:`ipu3_uapi_isp_xnr3_params` for ISP data memory - and :c:type:`ipu3_uapi_isp_xnr3_vmem_params` for vector + struct ipu3_uapi_isp_xnr3_params for ISP data memory + and struct ipu3_uapi_isp_xnr3_vmem_params for vector memory. TNR Temporal Noise Reduction block compares successive frames in time to remove anomalies / noise in pixel - values. :c:type:`ipu3_uapi_isp_tnr3_vmem_params` and - :c:type:`ipu3_uapi_isp_tnr3_params` are defined for ISP + values. struct ipu3_uapi_isp_tnr3_vmem_params and + struct ipu3_uapi_isp_tnr3_params are defined for ISP vector and data memory respectively. ======================== ======================================================= @@ -570,9 +576,9 @@ processor, while many others will use a set of fixed hardware blocks also called accelerator cluster (ACC) to crunch pixel data and produce statistics. ACC parameters of individual algorithms, as defined by -:c:type:`ipu3_uapi_acc_param`, can be chosen to be applied by the user -space through struct :c:type:`ipu3_uapi_flags` embedded in -:c:type:`ipu3_uapi_params` structure. For parameters that are configured as +struct ipu3_uapi_acc_param, can be chosen to be applied by the user +space through struct struct ipu3_uapi_flags embedded in +struct ipu3_uapi_params structure. For parameters that are configured as not enabled by the user space, the corresponding structs are ignored by the driver, in which case the existing configuration of the algorithm will be preserved. diff --git a/Documentation/admin-guide/media/pci-cardlist.rst b/Documentation/admin-guide/media/pci-cardlist.rst index 434fe996b5417..f4d670e632f88 100644 --- a/Documentation/admin-guide/media/pci-cardlist.rst +++ b/Documentation/admin-guide/media/pci-cardlist.rst @@ -90,6 +90,7 @@ sta2x11_vip STA2X11 VIP Video For Linux tw5864 Techwell TW5864 video/audio grabber and encoder tw686x Intersil/Techwell TW686x tw68 Techwell tw68x Video For Linux +zoran Zoran-36057/36067 JPEG codec ================ ======================================================== Some of those drivers support multiple devices, as shown at the card @@ -105,3 +106,4 @@ lists below: ivtv-cardlist saa7134-cardlist saa7164-cardlist + zoran-cardlist diff --git a/Documentation/admin-guide/media/rkisp1.dot b/Documentation/admin-guide/media/rkisp1.dot new file mode 100644 index 0000000000000..54c1953a6130e --- /dev/null +++ b/Documentation/admin-guide/media/rkisp1.dot @@ -0,0 +1,18 @@ +digraph board { + rankdir=TB + n00000001 [label="{{ 0 | 1} | rkisp1_isp\n/dev/v4l-subdev0 | { 2 | 3}}", shape=Mrecord, style=filled, fillcolor=green] + n00000001:port2 -> n00000006:port0 + n00000001:port2 -> n00000009:port0 + n00000001:port3 -> n00000014 [style=bold] + n00000006 [label="{{ 0} | rkisp1_resizer_mainpath\n/dev/v4l-subdev1 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n00000006:port1 -> n0000000c [style=bold] + n00000009 [label="{{ 0} | rkisp1_resizer_selfpath\n/dev/v4l-subdev2 | { 1}}", shape=Mrecord, style=filled, fillcolor=green] + n00000009:port1 -> n00000010 [style=bold] + n0000000c [label="rkisp1_mainpath\n/dev/video0", shape=box, style=filled, fillcolor=yellow] + n00000010 [label="rkisp1_selfpath\n/dev/video1", shape=box, style=filled, fillcolor=yellow] + n00000014 [label="rkisp1_stats\n/dev/video2", shape=box, style=filled, fillcolor=yellow] + n00000018 [label="rkisp1_params\n/dev/video3", shape=box, style=filled, fillcolor=yellow] + n00000018 -> n00000001:port1 [style=bold] + n0000001c [label="{{} | imx219 4-0010\n/dev/v4l-subdev3 | { 0}}", shape=Mrecord, style=filled, fillcolor=green] + n0000001c:port0 -> n00000001:port0 +} diff --git a/Documentation/admin-guide/media/rkisp1.rst b/Documentation/admin-guide/media/rkisp1.rst new file mode 100644 index 0000000000000..42e37ed255f6f --- /dev/null +++ b/Documentation/admin-guide/media/rkisp1.rst @@ -0,0 +1,181 @@ +.. SPDX-License-Identifier: GPL-2.0 + +.. include:: + +========================================= +Rockchip Image Signal Processor (rkisp1) +========================================= + +Introduction +============ + +This file documents the driver for the Rockchip ISP1 that is part of RK3288 +and RK3399 SoCs. The driver is located under drivers/staging/media/rkisp1 +and uses the Media-Controller API. + +Topology +======== +.. _rkisp1_topology_graph: + +.. kernel-figure:: rkisp1.dot + :alt: Diagram of the default media pipeline topology + :align: center + + +The driver has 4 video devices: + +- rkisp1_mainpath: capture device for retrieving images, usually in higher + resolution. +- rkisp1_selfpath: capture device for retrieving images. +- rkisp1_stats: a metadata capture device that sends statistics. +- rkisp1_params: a metadata output device that receives parameters + configurations from userspace. + +The driver has 3 subdevices: + +- rkisp1_resizer_mainpath: used to resize and downsample frames for the + mainpath capture device. +- rkisp1_resizer_selfpath: used to resize and downsample frames for the + selfpath capture device. +- rkisp1_isp: is connected to the sensor and is responsible for all the isp + operations. + + +rkisp1_mainpath, rkisp1_selfpath - Frames Capture Video Nodes +------------------------------------------------------------- +Those are the `mainpath` and `selfpath` capture devices to capture frames. +Those entities are the DMA engines that write the frames to memory. +The selfpath video device can capture YUV/RGB formats. Its input is YUV encoded +stream and it is able to convert it to RGB. The selfpath is not able to +capture bayer formats. +The mainpath can capture both bayer and YUV formats but it is not able to +capture RGB formats. +Both capture videos support +the ``V4L2_CAP_IO_MC`` :ref:`capability `. + + +rkisp1_resizer_mainpath, rkisp1_resizer_selfpath - Resizers Subdevices Nodes +---------------------------------------------------------------------------- +Those are resizer entities for the mainpath and the selfpath. Those entities +can scale the frames up and down and also change the YUV sampling (for example +YUV4:2:2 -> YUV4:2:0). They also have cropping capability on the sink pad. +The resizers entities can only operate on YUV:4:2:2 format +(MEDIA_BUS_FMT_YUYV8_2X8). +The mainpath capture device supports capturing video in bayer formats. In that +case the resizer of the mainpath is set to 'bypass' mode - it just forward the +frame without operating on it. + +rkisp1_isp - Image Signal Processing Subdevice Node +--------------------------------------------------- +This is the isp entity. It is connected to the sensor on sink pad 0 and +receives the frames using the CSI-2 protocol. It is responsible of configuring +the CSI-2 protocol. It has a cropping capability on sink pad 0 that is +connected to the sensor and on source pad 2 connected to the resizer entities. +Cropping on sink pad 0 defines the image region from the sensor. +Cropping on source pad 2 defines the region for the Image Stabilizer (IS). + +.. _rkisp1_stats: + +rkisp1_stats - Statistics Video Node +------------------------------------ +The statistics video node outputs the 3A (auto focus, auto exposure and auto +white balance) statistics, and also histogram statistics for the frames that +are being processed by the rkisp1 to userspace applications. +Using these data, applications can implement algorithms and re-parameterize +the driver through the rkisp_params node to improve image quality during a +video stream. +The buffer format is defined by struct :c:type:`rkisp1_stat_buffer`, and +userspace should set +:ref:`V4L2_META_FMT_RK_ISP1_STAT_3A ` as the +dataformat. + +.. _rkisp1_params: + +rkisp1_params - Parameters Video Node +------------------------------------- +The rkisp1_params video node receives a set of parameters from userspace +to be applied to the hardware during a video stream, allowing userspace +to dynamically modify values such as black level, cross talk corrections +and others. + +The buffer format is defined by struct :c:type:`rkisp1_params_cfg`, and +userspace should set +:ref:`V4L2_META_FMT_RK_ISP1_PARAMS ` as the +dataformat. + + +Capturing Video Frames Example +============================== + +In the following example, the sensor connected to pad 0 of 'rkisp1_isp' is +imx219. + +The following commands can be used to capture video from the selfpath video +node with dimension 900x800 planar format YUV 4:2:2. It uses all cropping +capabilities possible, (see explanation right below) + +.. code-block:: bash + + # set the links + "media-ctl" "-d" "platform:rkisp1" "-r" + "media-ctl" "-d" "platform:rkisp1" "-l" "'imx219 4-0010':0 -> 'rkisp1_isp':0 [1]" + "media-ctl" "-d" "platform:rkisp1" "-l" "'rkisp1_isp':2 -> 'rkisp1_resizer_selfpath':0 [1]" + "media-ctl" "-d" "platform:rkisp1" "-l" "'rkisp1_isp':2 -> 'rkisp1_resizer_mainpath':0 [0]" + + # set format for imx219 4-0010:0 + "media-ctl" "-d" "platform:rkisp1" "--set-v4l2" '"imx219 4-0010":0 [fmt:SRGGB10_1X10/1640x1232]' + + # set format for rkisp1_isp pads: + "media-ctl" "-d" "platform:rkisp1" "--set-v4l2" '"rkisp1_isp":0 [fmt:SRGGB10_1X10/1640x1232 crop: (0,0)/1600x1200]' + "media-ctl" "-d" "platform:rkisp1" "--set-v4l2" '"rkisp1_isp":2 [fmt:YUYV8_2X8/1600x1200 crop: (0,0)/1500x1100]' + + # set format for rkisp1_resizer_selfpath pads: + "media-ctl" "-d" "platform:rkisp1" "--set-v4l2" '"rkisp1_resizer_selfpath":0 [fmt:YUYV8_2X8/1500x1100 crop: (300,400)/1400x1000]' + "media-ctl" "-d" "platform:rkisp1" "--set-v4l2" '"rkisp1_resizer_selfpath":1 [fmt:YUYV8_2X8/900x800]' + + # set format for rkisp1_selfpath: + "v4l2-ctl" "-z" "platform:rkisp1" "-d" "rkisp1_selfpath" "-v" "width=900,height=800," + "v4l2-ctl" "-z" "platform:rkisp1" "-d" "rkisp1_selfpath" "-v" "pixelformat=422P" + + # start streaming: + v4l2-ctl "-z" "platform:rkisp1" "-d" "rkisp1_selfpath" "--stream-mmap" "--stream-count" "10" + + +In the above example the sensor is configured to bayer format: +`SRGGB10_1X10/1640x1232`. The rkisp1_isp:0 pad should be configured to the +same mbus format and dimensions as the sensor, otherwise streaming will fail +with 'EPIPE' error. So it is also configured to `SRGGB10_1X10/1640x1232`. +In addition, the rkisp1_isp:0 pad is configured to cropping `(0,0)/1600x1200`. + +The cropping dimensions are automatically propagated to be the format of the +isp source pad `rkisp1_isp:2`. Another cropping operation is configured on +the isp source pad: `(0,0)/1500x1100`. + +The resizer's sink pad `rkisp1_resizer_selfpath` should be configured to format +`YUYV8_2X8/1500x1100` in order to match the format on the other side of the +link. In addition a cropping `(300,400)/1400x1000` is configured on it. + +The source pad of the resizer, `rkisp1_resizer_selfpath:1` is configured to +format `YUYV8_2X8/900x800`. That means that the resizer first crop a window +of `(300,400)/1400x100` from the received frame and then scales this window +to dimension `900x800`. + +Note that the above example does not uses the stats-params control loop. +Therefore the capture frames will not go through the 3A algorithms and +probably won't have a good quality, and can even look dark and greenish. + +Configuring Quantization +======================== + +The driver supports limited and full range quantization on YUV formats, +where limited is the default. +To switch between one or the other, userspace should use the Colorspace +Conversion API (CSC) for subdevices on source pad 2 of the +isp (`rkisp1_isp:2`). The quantization configured on this pad is the +quantization of the captured video frames on the mainpath and selfpath +video nodes. +Note that the resizer and capture entities will always report +``V4L2_QUANTIZATION_DEFAULT`` even if the quantization is configured to full +range on `rkisp1_isp:2`. So in order to get the configured quantization, +application should get it from pad `rkisp1_isp:2`. + diff --git a/Documentation/admin-guide/media/siano-cardlist.rst b/Documentation/admin-guide/media/siano-cardlist.rst index d387c04d753c0..bb731a9538784 100644 --- a/Documentation/admin-guide/media/siano-cardlist.rst +++ b/Documentation/admin-guide/media/siano-cardlist.rst @@ -20,7 +20,7 @@ Siano cards list - 2040:1801 * - Hauppauge WinTV MiniCard - 2040:2000, 2040:200a, 2040:2010, 2040:2011, 2040:2019 - * - Hauppauge WinTV MiniCard + * - Hauppauge WinTV MiniCard Rev 2 - 2040:2009 * - Hauppauge WinTV MiniStick - 2040:5500, 2040:5510, 2040:5520, 2040:5530, 2040:5580, 2040:5590, 2040:b900, 2040:b910, 2040:b980, 2040:b990, 2040:c000, 2040:c010, 2040:c080, 2040:c090, 2040:c0a0, 2040:f5a0 diff --git a/Documentation/admin-guide/media/usb-cardlist.rst b/Documentation/admin-guide/media/usb-cardlist.rst index 546fd40da4c3a..1e96f928e0af2 100644 --- a/Documentation/admin-guide/media/usb-cardlist.rst +++ b/Documentation/admin-guide/media/usb-cardlist.rst @@ -112,7 +112,6 @@ zr364xx USB ZR364XX Camera em28xx-cardlist tm6000-cardlist siano-cardlist - usbvision-cardlist gspca-cardlist diff --git a/Documentation/admin-guide/media/usbvision-cardlist.rst b/Documentation/admin-guide/media/usbvision-cardlist.rst deleted file mode 100644 index 6aee115ee6e25..0000000000000 --- a/Documentation/admin-guide/media/usbvision-cardlist.rst +++ /dev/null @@ -1,283 +0,0 @@ -.. SPDX-License-Identifier: GPL-2.0 - -USBvision cards list -==================== - -.. tabularcolumns:: |p{1.4cm}|p{11.1cm}|p{4.2cm}| - -.. flat-table:: - :header-rows: 1 - :widths: 2 19 18 - :stub-columns: 0 - - * - Card number - - Card name - - USB IDs - - * - 0 - - Xanboo - - 0a6f:0400 - - * - 1 - - Belkin USB VideoBus II Adapter - - 050d:0106 - - * - 2 - - Belkin Components USB VideoBus - - 050d:0207 - - * - 3 - - Belkin USB VideoBus II - - 050d:0208 - - * - 4 - - echoFX InterView Lite - - 0571:0002 - - * - 5 - - USBGear USBG-V1 resp. HAMA USB - - 0573:0003 - - * - 6 - - D-Link V100 - - 0573:0400 - - * - 7 - - X10 USB Camera - - 0573:2000 - - * - 8 - - Hauppauge WinTV USB Live (PAL B/G) - - 0573:2d00 - - * - 9 - - Hauppauge WinTV USB Live Pro (NTSC M/N) - - 0573:2d01 - - * - 10 - - Zoran Co. PMD (Nogatech) AV-grabber Manhattan - - 0573:2101 - - * - 11 - - Nogatech USB-TV (NTSC) FM - - 0573:4100 - - * - 12 - - PNY USB-TV (NTSC) FM - - 0573:4110 - - * - 13 - - PixelView PlayTv-USB PRO (PAL) FM - - 0573:4450 - - * - 14 - - ZTV ZT-721 2.4GHz USB A/V Receiver - - 0573:4550 - - * - 15 - - Hauppauge WinTV USB (NTSC M/N) - - 0573:4d00 - - * - 16 - - Hauppauge WinTV USB (PAL B/G) - - 0573:4d01 - - * - 17 - - Hauppauge WinTV USB (PAL I) - - 0573:4d02 - - * - 18 - - Hauppauge WinTV USB (PAL/SECAM L) - - 0573:4d03 - - * - 19 - - Hauppauge WinTV USB (PAL D/K) - - 0573:4d04 - - * - 20 - - Hauppauge WinTV USB (NTSC FM) - - 0573:4d10 - - * - 21 - - Hauppauge WinTV USB (PAL B/G FM) - - 0573:4d11 - - * - 22 - - Hauppauge WinTV USB (PAL I FM) - - 0573:4d12 - - * - 23 - - Hauppauge WinTV USB (PAL D/K FM) - - 0573:4d14 - - * - 24 - - Hauppauge WinTV USB Pro (NTSC M/N) - - 0573:4d2a - - * - 25 - - Hauppauge WinTV USB Pro (NTSC M/N) V2 - - 0573:4d2b - - * - 26 - - Hauppauge WinTV USB Pro (PAL/SECAM B/G/I/D/K/L) - - 0573:4d2c - - * - 27 - - Hauppauge WinTV USB Pro (NTSC M/N) V3 - - 0573:4d20 - - * - 28 - - Hauppauge WinTV USB Pro (PAL B/G) - - 0573:4d21 - - * - 29 - - Hauppauge WinTV USB Pro (PAL I) - - 0573:4d22 - - * - 30 - - Hauppauge WinTV USB Pro (PAL/SECAM L) - - 0573:4d23 - - * - 31 - - Hauppauge WinTV USB Pro (PAL D/K) - - 0573:4d24 - - * - 32 - - Hauppauge WinTV USB Pro (PAL/SECAM BGDK/I/L) - - 0573:4d25 - - * - 33 - - Hauppauge WinTV USB Pro (PAL/SECAM BGDK/I/L) V2 - - 0573:4d26 - - * - 34 - - Hauppauge WinTV USB Pro (PAL B/G) V2 - - 0573:4d27 - - * - 35 - - Hauppauge WinTV USB Pro (PAL B/G,D/K) - - 0573:4d28 - - * - 36 - - Hauppauge WinTV USB Pro (PAL I,D/K) - - 0573:4d29 - - * - 37 - - Hauppauge WinTV USB Pro (NTSC M/N FM) - - 0573:4d30 - - * - 38 - - Hauppauge WinTV USB Pro (PAL B/G FM) - - 0573:4d31 - - * - 39 - - Hauppauge WinTV USB Pro (PAL I FM) - - 0573:4d32 - - * - 40 - - Hauppauge WinTV USB Pro (PAL D/K FM) - - 0573:4d34 - - * - 41 - - Hauppauge WinTV USB Pro (Temic PAL/SECAM B/G/I/D/K/L FM) - - 0573:4d35 - - * - 42 - - Hauppauge WinTV USB Pro (Temic PAL B/G FM) - - 0573:4d36 - - * - 43 - - Hauppauge WinTV USB Pro (PAL/SECAM B/G/I/D/K/L FM) - - 0573:4d37 - - * - 44 - - Hauppauge WinTV USB Pro (NTSC M/N FM) V2 - - 0573:4d38 - - * - 45 - - Camtel Technology USB TV Genie Pro FM Model TVB330 - - 0768:0006 - - * - 46 - - Digital Video Creator I - - 07d0:0001 - - * - 47 - - Global Village GV-007 (NTSC) - - 07d0:0002 - - * - 48 - - Dazzle Fusion Model DVC-50 Rev 1 (NTSC) - - 07d0:0003 - - * - 49 - - Dazzle Fusion Model DVC-80 Rev 1 (PAL) - - 07d0:0004 - - * - 50 - - Dazzle Fusion Model DVC-90 Rev 1 (SECAM) - - 07d0:0005 - - * - 51 - - Eskape Labs MyTV2Go - - 07f8:9104 - - * - 52 - - Pinnacle Studio PCTV USB (PAL) - - 2304:010d - - * - 53 - - Pinnacle Studio PCTV USB (SECAM) - - 2304:0109 - - * - 54 - - Pinnacle Studio PCTV USB (PAL) FM - - 2304:0110 - - * - 55 - - Miro PCTV USB - - 2304:0111 - - * - 56 - - Pinnacle Studio PCTV USB (NTSC) FM - - 2304:0112 - - * - 57 - - Pinnacle Studio PCTV USB (PAL) FM V2 - - 2304:0210 - - * - 58 - - Pinnacle Studio PCTV USB (NTSC) FM V2 - - 2304:0212 - - * - 59 - - Pinnacle Studio PCTV USB (PAL) FM V3 - - 2304:0214 - - * - 60 - - Pinnacle Studio Linx Video input cable (NTSC) - - 2304:0300 - - * - 61 - - Pinnacle Studio Linx Video input cable (PAL) - - 2304:0301 - - * - 62 - - Pinnacle PCTV Bungee USB (PAL) FM - - 2304:0419 - - * - 63 - - Hauppauge WinTv-USB - - 2400:4200 - - * - 64 - - Pinnacle Studio PCTV USB (NTSC) FM V3 - - 2304:0113 - - * - 65 - - Nogatech USB MicroCam NTSC (NV3000N) - - 0573:3000 - - * - 66 - - Nogatech USB MicroCam PAL (NV3001P) - - 0573:3001 diff --git a/Documentation/admin-guide/media/v4l-drivers.rst b/Documentation/admin-guide/media/v4l-drivers.rst index 251cc4ede0b69..9c7ebe2ca3bd2 100644 --- a/Documentation/admin-guide/media/v4l-drivers.rst +++ b/Documentation/admin-guide/media/v4l-drivers.rst @@ -25,6 +25,7 @@ Video4Linux (V4L) driver-specific documentation philips qcom_camss rcar-fdp1 + rkisp1 saa7134 si470x si4713 diff --git a/Documentation/admin-guide/media/zoran-cardlist.rst b/Documentation/admin-guide/media/zoran-cardlist.rst new file mode 100644 index 0000000000000..d7fc8bed62ffb --- /dev/null +++ b/Documentation/admin-guide/media/zoran-cardlist.rst @@ -0,0 +1,51 @@ +.. SPDX-License-Identifier: GPL-2.0 + +Zoran cards list +================ + +.. tabularcolumns:: |p{1.4cm}|p{11.1cm}|p{4.2cm}| + +.. flat-table:: + :header-rows: 1 + :widths: 2 19 18 + :stub-columns: 0 + + * - Card number + - Card name + - PCI subsystem IDs + + * - 0 + - DC10(old) + - + + * - 1 + - DC10(new) + - + + * - 2 + - DC10_PLUS + - 1031:7efe + + * - 3 + - DC30 + - + + * - 4 + - DC30_PLUS + - 1031:d801 + + * - 5 + - LML33 + - + + * - 6 + - LML33R10 + - 12f8:8a02 + + * - 7 + - Buz + - 13ca:4231 + + * - 8 + - 6-Eyes + - diff --git a/Documentation/admin-guide/mm/hugetlbpage.rst b/Documentation/admin-guide/mm/hugetlbpage.rst index 015a5f7d78540..f7b1c74629911 100644 --- a/Documentation/admin-guide/mm/hugetlbpage.rst +++ b/Documentation/admin-guide/mm/hugetlbpage.rst @@ -131,7 +131,7 @@ hugepages parameter is preceded by an invalid hugepagesz parameter, it will be ignored. default_hugepagesz - pecify the default huge page size. This parameter can + Specify the default huge page size. This parameter can only be specified once on the command line. default_hugepagesz can optionally be followed by the hugepages parameter to preallocate a specific number of huge pages of default size. The number of default diff --git a/Documentation/admin-guide/mm/numaperf.rst b/Documentation/admin-guide/mm/numaperf.rst index 4d69ef1de8303..86f2a3c4b6387 100644 --- a/Documentation/admin-guide/mm/numaperf.rst +++ b/Documentation/admin-guide/mm/numaperf.rst @@ -56,6 +56,11 @@ nodes' access characteristics share the same performance relative to other linked initiator nodes. Each target within an initiator's access class, though, do not necessarily perform the same as each other. +The access class "1" is used to allow differentiation between initiators +that are CPUs and hence suitable for generic task scheduling, and +IO initiators such as GPUs and NICs. Unlike access class 0, only +nodes containing CPUs are considered. + ================ NUMA Performance ================ @@ -88,6 +93,9 @@ The latency attributes are provided in nanoseconds. The values reported here correspond to the rated latency and bandwidth for the platform. +Access class 1 takes the same form but only includes values for CPU to +memory activity. + ========== NUMA Cache ========== diff --git a/Documentation/admin-guide/nfs/fault_injection.rst b/Documentation/admin-guide/nfs/fault_injection.rst deleted file mode 100644 index eb029c0c15ce5..0000000000000 --- a/Documentation/admin-guide/nfs/fault_injection.rst +++ /dev/null @@ -1,70 +0,0 @@ -=================== -NFS Fault Injection -=================== - -Fault injection is a method for forcing errors that may not normally occur, or -may be difficult to reproduce. Forcing these errors in a controlled environment -can help the developer find and fix bugs before their code is shipped in a -production system. Injecting an error on the Linux NFS server will allow us to -observe how the client reacts and if it manages to recover its state correctly. - -NFSD_FAULT_INJECTION must be selected when configuring the kernel to use this -feature. - - -Using Fault Injection -===================== -On the client, mount the fault injection server through NFS v4.0+ and do some -work over NFS (open files, take locks, ...). - -On the server, mount the debugfs filesystem to and ls -/nfsd. This will show a list of files that will be used for -injecting faults on the NFS server. As root, write a number n to the file -corresponding to the action you want the server to take. The server will then -process the first n items it finds. So if you want to forget 5 locks, echo '5' -to /nfsd/forget_locks. A value of 0 will tell the server to forget -all corresponding items. A log message will be created containing the number -of items forgotten (check dmesg). - -Go back to work on the client and check if the client recovered from the error -correctly. - - -Available Faults -================ -forget_clients: - The NFS server keeps a list of clients that have placed a mount call. If - this list is cleared, the server will have no knowledge of who the client - is, forcing the client to reauthenticate with the server. - -forget_openowners: - The NFS server keeps a list of what files are currently opened and who - they were opened by. Clearing this list will force the client to reopen - its files. - -forget_locks: - The NFS server keeps a list of what files are currently locked in the VFS. - Clearing this list will force the client to reclaim its locks (files are - unlocked through the VFS as they are cleared from this list). - -forget_delegations: - A delegation is used to assure the client that a file, or part of a file, - has not changed since the delegation was awarded. Clearing this list will - force the client to reacquire its delegation before accessing the file - again. - -recall_delegations: - Delegations can be recalled by the server when another client attempts to - access a file. This test will notify the client that its delegation has - been revoked, forcing the client to reacquire the delegation before using - the file again. - - -tools/nfs/inject_faults.sh script -================================= -This script has been created to ease the fault injection process. This script -will detect the mounted debugfs directory and write to the files located there -based on the arguments passed by the user. For example, running -`inject_faults.sh forget_locks 1` as root will instruct the server to forget -one lock. Running `inject_faults forget_locks` will instruct the server to -forgetall locks. diff --git a/Documentation/admin-guide/nfs/index.rst b/Documentation/admin-guide/nfs/index.rst index 6b5a3c90fac56..3601a708f3330 100644 --- a/Documentation/admin-guide/nfs/index.rst +++ b/Documentation/admin-guide/nfs/index.rst @@ -12,4 +12,3 @@ NFS nfs-idmapper pnfs-block-server pnfs-scsi-server - fault_injection diff --git a/Documentation/admin-guide/perf/arm-cmn.rst b/Documentation/admin-guide/perf/arm-cmn.rst new file mode 100644 index 0000000000000..0e48093460140 --- /dev/null +++ b/Documentation/admin-guide/perf/arm-cmn.rst @@ -0,0 +1,65 @@ +============================= +Arm Coherent Mesh Network PMU +============================= + +CMN-600 is a configurable mesh interconnect consisting of a rectangular +grid of crosspoints (XPs), with each crosspoint supporting up to two +device ports to which various AMBA CHI agents are attached. + +CMN implements a distributed PMU design as part of its debug and trace +functionality. This consists of a local monitor (DTM) at every XP, which +counts up to 4 event signals from the connected device nodes and/or the +XP itself. Overflow from these local counters is accumulated in up to 8 +global counters implemented by the main controller (DTC), which provides +overall PMU control and interrupts for global counter overflow. + +PMU events +---------- + +The PMU driver registers a single PMU device for the whole interconnect, +see /sys/bus/event_source/devices/arm_cmn. Multi-chip systems may link +more than one CMN together via external CCIX links - in this situation, +each mesh counts its own events entirely independently, and additional +PMU devices will be named arm_cmn_{1..n}. + +Most events are specified in a format based directly on the TRM +definitions - "type" selects the respective node type, and "eventid" the +event number. Some events require an additional occupancy ID, which is +specified by "occupid". + +* Since RN-D nodes do not have any distinct events from RN-I nodes, they + are treated as the same type (0xa), and the common event templates are + named "rnid_*". + +* The cycle counter is treated as a synthetic event belonging to the DTC + node ("type" == 0x3, "eventid" is ignored). + +* XP events also encode the port and channel in the "eventid" field, to + match the underlying pmu_event0_id encoding for the pmu_event_sel + register. The event templates are named with prefixes to cover all + permutations. + +By default each event provides an aggregate count over all nodes of the +given type. To target a specific node, "bynodeid" must be set to 1 and +"nodeid" to the appropriate value derived from the CMN configuration +(as defined in the "Node ID Mapping" section of the TRM). + +Watchpoints +----------- + +The PMU can also count watchpoint events to monitor specific flit +traffic. Watchpoints are treated as a synthetic event type, and like PMU +events can be global or targeted with a particular XP's "nodeid" value. +Since the watchpoint direction is otherwise implicit in the underlying +register selection, separate events are provided for flit uploads and +downloads. + +The flit match value and mask are passed in config1 and config2 ("val" +and "mask" respectively). "wp_dev_sel", "wp_chn_sel", "wp_grp" and +"wp_exclusive" are specified per the TRM definitions for dtm_wp_config0. +Where a watchpoint needs to match fields from both match groups on the +REQ or SNP channel, it can be specified as two events - one for each +group - with the same nonzero "combine" value. The count for such a +pair of combined events will be attributed to the primary match. +Watchpoint events with a "combine" value of 0 are considered independent +and will count individually. diff --git a/Documentation/admin-guide/perf/index.rst b/Documentation/admin-guide/perf/index.rst index 47c99f40cc160..5a8f2529a0331 100644 --- a/Documentation/admin-guide/perf/index.rst +++ b/Documentation/admin-guide/perf/index.rst @@ -12,6 +12,7 @@ Performance monitor support qcom_l2_pmu qcom_l3_pmu arm-ccn + arm-cmn xgene-pmu arm_dsu_pmu thunderx2-pmu diff --git a/Documentation/admin-guide/pm/cpufreq.rst b/Documentation/admin-guide/pm/cpufreq.rst index 368e612145d2e..6adb7988e0eb6 100644 --- a/Documentation/admin-guide/pm/cpufreq.rst +++ b/Documentation/admin-guide/pm/cpufreq.rst @@ -1,7 +1,6 @@ .. SPDX-License-Identifier: GPL-2.0 .. include:: -.. |struct cpufreq_policy| replace:: :c:type:`struct cpufreq_policy ` .. |intel_pstate| replace:: :doc:`intel_pstate ` ======================= @@ -92,16 +91,16 @@ control the P-state of multiple CPUs at the same time and writing to it affects all of those CPUs simultaneously. Sets of CPUs sharing hardware P-state control interfaces are represented by -``CPUFreq`` as |struct cpufreq_policy| objects. For consistency, -|struct cpufreq_policy| is also used when there is only one CPU in the given +``CPUFreq`` as struct cpufreq_policy objects. For consistency, +struct cpufreq_policy is also used when there is only one CPU in the given set. -The ``CPUFreq`` core maintains a pointer to a |struct cpufreq_policy| object for +The ``CPUFreq`` core maintains a pointer to a struct cpufreq_policy object for every CPU in the system, including CPUs that are currently offline. If multiple CPUs share the same hardware P-state control interface, all of the pointers -corresponding to them point to the same |struct cpufreq_policy| object. +corresponding to them point to the same struct cpufreq_policy object. -``CPUFreq`` uses |struct cpufreq_policy| as its basic data type and the design +``CPUFreq`` uses struct cpufreq_policy as its basic data type and the design of its user space interface is based on the policy concept. diff --git a/Documentation/admin-guide/pm/cpuidle.rst b/Documentation/admin-guide/pm/cpuidle.rst index 6ebe163f9dfed..37940a0584ec1 100644 --- a/Documentation/admin-guide/pm/cpuidle.rst +++ b/Documentation/admin-guide/pm/cpuidle.rst @@ -528,6 +528,10 @@ object corresponding to it, as follows: Total number of times the hardware has been asked by the given CPU to enter this idle state. +``rejected`` + Total number of times a request to enter this idle state on the given + CPU was rejected. + The :file:`desc` and :file:`name` files both contain strings. The difference between them is that the name is expected to be more concise, while the description may be longer and it may contain white space or special characters. @@ -572,6 +576,11 @@ particular case. For these reasons, the only reliable way to find out how much time has been spent by the hardware in different idle states supported by it is to use idle state residency counters in the hardware, if available. +Generally, an interrupt received when trying to enter an idle state causes the +idle state entry request to be rejected, in which case the ``CPUIdle`` driver +may return an error code to indicate that this was the case. The :file:`usage` +and :file:`rejected` files report the number of times the given idle state +was entered successfully or rejected, respectively. .. _cpu-pm-qos: diff --git a/Documentation/admin-guide/pnp.rst b/Documentation/admin-guide/pnp.rst index bab2d10631f00..3eda08191d139 100644 --- a/Documentation/admin-guide/pnp.rst +++ b/Documentation/admin-guide/pnp.rst @@ -281,10 +281,6 @@ ISAPNP drivers. They should serve as a temporary solution only. They are as follows:: - struct pnp_card *pnp_find_card(unsigned short vendor, - unsigned short device, - struct pnp_card *from) - struct pnp_dev *pnp_find_dev(struct pnp_card *card, unsigned short vendor, unsigned short function, diff --git a/Documentation/admin-guide/pstore-blk.rst b/Documentation/admin-guide/pstore-blk.rst index 296d5027787ac..6898aba9fb5ce 100644 --- a/Documentation/admin-guide/pstore-blk.rst +++ b/Documentation/admin-guide/pstore-blk.rst @@ -154,17 +154,11 @@ Configurations for driver Only a block device driver cares about these configurations. A block device driver uses ``register_pstore_blk`` to register to pstore/blk. -.. kernel-doc:: fs/pstore/blk.c - :identifiers: register_pstore_blk - A non-block device driver uses ``register_pstore_device`` with ``struct pstore_device_info`` to register to pstore/blk. .. kernel-doc:: fs/pstore/blk.c - :identifiers: register_pstore_device - -.. kernel-doc:: include/linux/pstore_blk.h - :identifiers: pstore_device_info + :export: Compression and header ---------------------- @@ -237,7 +231,7 @@ For developer reference, here are all the important structures and APIs: :internal: .. kernel-doc:: fs/pstore/blk.c - :export: + :internal: .. kernel-doc:: include/linux/pstore_blk.h :internal: diff --git a/Documentation/admin-guide/svga.rst b/Documentation/admin-guide/svga.rst index b6c2f9acca92b..9eb1e0738e845 100644 --- a/Documentation/admin-guide/svga.rst +++ b/Documentation/admin-guide/svga.rst @@ -12,7 +12,8 @@ Intro This small document describes the "Video Mode Selection" feature which allows the use of various special video modes supported by the video BIOS. Due to usage of the BIOS, the selection is limited to boot time (before the -kernel decompression starts) and works only on 80X86 machines. +kernel decompression starts) and works only on 80X86 machines that are +booted through BIOS firmware (as opposed to through UEFI, kexec, etc.). .. note:: @@ -23,7 +24,7 @@ kernel decompression starts) and works only on 80X86 machines. The video mode to be used is selected by a kernel parameter which can be specified in the kernel Makefile (the SVGA_MODE=... line) or by the "vga=..." -option of LILO (or some other boot loader you use) or by the "vidmode" utility +option of LILO (or some other boot loader you use) or by the "xrandr" utility (present in standard Linux utility packages). You can use the following values of this parameter:: @@ -41,7 +42,7 @@ of this parameter:: better to use absolute mode numbers instead. 0x.... - Hexadecimal video mode ID (also displayed on the menu, see below - for exact meaning of the ID). Warning: rdev and LILO don't support + for exact meaning of the ID). Warning: LILO doesn't support hexadecimal numbers -- you have to convert it to decimal manually. Menu diff --git a/Documentation/admin-guide/sysctl/abi.rst b/Documentation/admin-guide/sysctl/abi.rst index 599bcde7f0b7d..ac87eafdb54fd 100644 --- a/Documentation/admin-guide/sysctl/abi.rst +++ b/Documentation/admin-guide/sysctl/abi.rst @@ -1,67 +1,34 @@ +.. SPDX-License-Identifier: GPL-2.0+ + ================================ Documentation for /proc/sys/abi/ ================================ -kernel version 2.6.0.test2 +.. See scripts/check-sysctl-docs to keep this up to date: +.. scripts/check-sysctl-docs -vtable="abi" \ +.. Documentation/admin-guide/sysctl/abi.rst \ +.. $(git grep -l register_sysctl_) -Copyright (c) 2003, Fabian Frederick +Copyright (c) 2020, Stephen Kitt -For general info: index.rst. +For general info, see :doc:`index`. ------------------------------------------------------------------------------ -This path is binary emulation relevant aka personality types aka abi. -When a process is executed, it's linked to an exec_domain whose -personality is defined using values available from /proc/sys/abi. -You can find further details about abi in include/linux/personality.h. - -Here are the files featuring in 2.6 kernel: - -- defhandler_coff -- defhandler_elf -- defhandler_lcall7 -- defhandler_libcso -- fake_utsname -- trace - -defhandler_coff ---------------- - -defined value: - PER_SCOSVR3:: - - 0x0003 | STICKY_TIMEOUTS | WHOLE_SECONDS | SHORT_INODE - -defhandler_elf --------------- - -defined value: - PER_LINUX:: - - 0 - -defhandler_lcall7 ------------------ - -defined value : - PER_SVR4:: - - 0x0001 | STICKY_TIMEOUTS | MMAP_PAGE_ZERO, - -defhandler_libsco ------------------ - -defined value: - PER_SVR4:: +The files in ``/proc/sys/abi`` can be used to see and modify +ABI-related settings. - 0x0001 | STICKY_TIMEOUTS | MMAP_PAGE_ZERO, +Currently, these files might (depending on your configuration) +show up in ``/proc/sys/kernel``: -fake_utsname ------------- +.. contents:: :local: -Unused +vsyscall32 (x86) +================ -trace ------ +Determines whether the kernels maps a vDSO page into 32-bit processes; +can be set to 1 to enable, or 0 to disable. Defaults to enabled if +``CONFIG_COMPAT_VDSO`` is set, disabled otherwide. -Unused +This controls the same setting as the ``vdso32`` kernel boot +parameter. diff --git a/Documentation/admin-guide/sysctl/net.rst b/Documentation/admin-guide/sysctl/net.rst index 42cd04bca5486..57fd6ce68fe05 100644 --- a/Documentation/admin-guide/sysctl/net.rst +++ b/Documentation/admin-guide/sysctl/net.rst @@ -300,7 +300,6 @@ Note: 0: 0 1 2 3 4 5 6 7 RSS hash key: 84:50:f4:00:a8:15:d1:a7:e9:7f:1d:60:35:c7:47:25:42:97:74:ca:56:bb:b6:a1:d8:43:e3:c9:0c:fd:17:55:c2:3a:4d:69:ed:f1:42:89 - netdev_tstamp_prequeue ---------------------- @@ -321,11 +320,20 @@ fb_tunnels_only_for_init_net ---------------------------- Controls if fallback tunnels (like tunl0, gre0, gretap0, erspan0, -sit0, ip6tnl0, ip6gre0) are automatically created when a new -network namespace is created, if corresponding tunnel is present -in initial network namespace. -If set to 1, these devices are not automatically created, and -user space is responsible for creating them if needed. +sit0, ip6tnl0, ip6gre0) are automatically created. There are 3 possibilities +(a) value = 0; respective fallback tunnels are created when module is +loaded in every net namespaces (backward compatible behavior). +(b) value = 1; [kcmd value: initns] respective fallback tunnels are +created only in init net namespace and every other net namespace will +not have them. +(c) value = 2; [kcmd value: none] fallback tunnels are not created +when a module is loaded in any of the net namespace. Setting value to +"2" is pointless after boot if these modules are built-in, so there is +a kernel command-line option that can change this default. Please refer to +Documentation/admin-guide/kernel-parameters.txt for additional details. + +Not creating fallback tunnels gives control to userspace to create +whatever is needed only and avoid creating devices which are redundant. Default : 0 (for compatibility reasons) diff --git a/Documentation/admin-guide/sysctl/vm.rst b/Documentation/admin-guide/sysctl/vm.rst index 4b9d2e8e9142c..f455fa00c00fa 100644 --- a/Documentation/admin-guide/sysctl/vm.rst +++ b/Documentation/admin-guide/sysctl/vm.rst @@ -27,6 +27,7 @@ Currently, these files are in /proc/sys/vm: - admin_reserve_kbytes - block_dump - compact_memory +- compaction_proactiveness - compact_unevictable_allowed - dirty_background_bytes - dirty_background_ratio @@ -37,6 +38,7 @@ Currently, these files are in /proc/sys/vm: - dirty_writeback_centisecs - drop_caches - extfrag_threshold +- highmem_is_dirtyable - hugetlb_shm_group - laptop_mode - legacy_va_layout diff --git a/Documentation/admin-guide/sysrq.rst b/Documentation/admin-guide/sysrq.rst index e6424d8c58468..67dfa4c290935 100644 --- a/Documentation/admin-guide/sysrq.rst +++ b/Documentation/admin-guide/sysrq.rst @@ -79,6 +79,8 @@ On all echo t > /proc/sysrq-trigger +The :kbd:`` is case sensitive. + What are the 'command' keys? ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/Documentation/admin-guide/tainted-kernels.rst b/Documentation/admin-guide/tainted-kernels.rst index abf804719890c..f718a2eaf1f61 100644 --- a/Documentation/admin-guide/tainted-kernels.rst +++ b/Documentation/admin-guide/tainted-kernels.rst @@ -130,7 +130,7 @@ More detailed explanation for tainting 5) ``B`` If a page-release function has found a bad page reference or some unexpected page flags. This indicates a hardware problem or a kernel bug; there should be other information in the log indicating why this tainting - occured. + occurred. 6) ``U`` if a user or user application specifically requested that the Tainted flag be set, ``' '`` otherwise. diff --git a/Documentation/admin-guide/xfs.rst b/Documentation/admin-guide/xfs.rst index f461d6c33534b..86de8a1ad91c2 100644 --- a/Documentation/admin-guide/xfs.rst +++ b/Documentation/admin-guide/xfs.rst @@ -210,6 +210,28 @@ When mounting an XFS filesystem, the following options are accepted. inconsistent namespace presentation during or after a failover event. +Deprecation of V4 Format +======================== + +The V4 filesystem format lacks certain features that are supported by +the V5 format, such as metadata checksumming, strengthened metadata +verification, and the ability to store timestamps past the year 2038. +Because of this, the V4 format is deprecated. All users should upgrade +by backing up their files, reformatting, and restoring from the backup. + +Administrators and users can detect a V4 filesystem by running xfs_info +against a filesystem mountpoint and checking for a string containing +"crc=". If no such string is found, please upgrade xfsprogs to the +latest version and try again. + +The deprecation will take place in two parts. Support for mounting V4 +filesystems can now be disabled at kernel build time via Kconfig option. +The option will default to yes until September 2025, at which time it +will be changed to default to no. In September 2030, support will be +removed from the codebase entirely. + +Note: Distributors may choose to withdraw V4 format support earlier than +the dates listed above. Deprecated Mount Options ======================== @@ -217,6 +239,9 @@ Deprecated Mount Options =========================== ================ Name Removal Schedule =========================== ================ +Mounting with V4 filesystem September 2030 +ikeep/noikeep September 2025 +attr2/noattr2 September 2025 =========================== ================ @@ -331,7 +356,12 @@ The following sysctls are available for the XFS filesystem: Deprecated Sysctls ================== -None at present. +=========================== ================ + Name Removal Schedule +=========================== ================ +fs.xfs.irix_sgid_inherit September 2025 +fs.xfs.irix_symlink_mode September 2025 +=========================== ================ Removed Sysctls diff --git a/Documentation/arm/sunxi.rst b/Documentation/arm/sunxi.rst index b037428aee98b..62b533d0ba944 100644 --- a/Documentation/arm/sunxi.rst +++ b/Documentation/arm/sunxi.rst @@ -108,7 +108,7 @@ SunXi family * Datasheet - http://dl.linux-sunxi.org/H3/Allwinner_H3_Datasheet_V1.0.pdf + https://linux-sunxi.org/images/4/4b/Allwinner_H3_Datasheet_V1.2.pdf - Allwinner R40 (sun8i) diff --git a/Documentation/arm/uefi.rst b/Documentation/arm/uefi.rst index f868330df6beb..f732f957421ff 100644 --- a/Documentation/arm/uefi.rst +++ b/Documentation/arm/uefi.rst @@ -23,7 +23,7 @@ makes it possible for the kernel to support additional features: For actually enabling [U]EFI support, enable: - CONFIG_EFI=y -- CONFIG_EFI_VARS=y or m +- CONFIG_EFIVAR_FS=y or m The implementation depends on receiving information about the UEFI environment in a Flattened Device Tree (FDT) - so is only available with CONFIG_OF. diff --git a/Documentation/arm64/amu.rst b/Documentation/arm64/amu.rst index 452ec8b115c27..01f2de2b0450c 100644 --- a/Documentation/arm64/amu.rst +++ b/Documentation/arm64/amu.rst @@ -1,3 +1,5 @@ +.. _amu_index: + ======================================================= Activity Monitors Unit (AMU) extension in AArch64 Linux ======================================================= diff --git a/Documentation/arm64/cpu-feature-registers.rst b/Documentation/arm64/cpu-feature-registers.rst index f28853f80089b..328e0c454fbd4 100644 --- a/Documentation/arm64/cpu-feature-registers.rst +++ b/Documentation/arm64/cpu-feature-registers.rst @@ -175,6 +175,8 @@ infrastructure: +------------------------------+---------+---------+ | Name | bits | visible | +------------------------------+---------+---------+ + | MTE | [11-8] | y | + +------------------------------+---------+---------+ | SSBS | [7-4] | y | +------------------------------+---------+---------+ | BT | [3-0] | y | diff --git a/Documentation/arm64/elf_hwcaps.rst b/Documentation/arm64/elf_hwcaps.rst index 84a9fd2d41b47..bbd9cf54db6c7 100644 --- a/Documentation/arm64/elf_hwcaps.rst +++ b/Documentation/arm64/elf_hwcaps.rst @@ -240,6 +240,10 @@ HWCAP2_BTI Functionality implied by ID_AA64PFR0_EL1.BT == 0b0001. +HWCAP2_MTE + + Functionality implied by ID_AA64PFR1_EL1.MTE == 0b0010, as described + by Documentation/arm64/memory-tagging-extension.rst. 4. Unused AT_HWCAP bits ----------------------- diff --git a/Documentation/arm64/hugetlbpage.rst b/Documentation/arm64/hugetlbpage.rst index b44f939e52108..a110124c11e38 100644 --- a/Documentation/arm64/hugetlbpage.rst +++ b/Documentation/arm64/hugetlbpage.rst @@ -1,3 +1,5 @@ +.. _hugetlbpage_index: + ==================== HugeTLBpage on ARM64 ==================== diff --git a/Documentation/arm64/index.rst b/Documentation/arm64/index.rst index d9665d83c53ac..937634c499798 100644 --- a/Documentation/arm64/index.rst +++ b/Documentation/arm64/index.rst @@ -1,3 +1,5 @@ +.. _arm64_index: + ================== ARM64 Architecture ================== @@ -14,6 +16,7 @@ ARM64 Architecture hugetlbpage legacy_instructions memory + memory-tagging-extension perf pointer-authentication silicon-errata diff --git a/Documentation/arm64/memory-tagging-extension.rst b/Documentation/arm64/memory-tagging-extension.rst new file mode 100644 index 0000000000000..034d37c605e84 --- /dev/null +++ b/Documentation/arm64/memory-tagging-extension.rst @@ -0,0 +1,305 @@ +=============================================== +Memory Tagging Extension (MTE) in AArch64 Linux +=============================================== + +Authors: Vincenzo Frascino + Catalin Marinas + +Date: 2020-02-25 + +This document describes the provision of the Memory Tagging Extension +functionality in AArch64 Linux. + +Introduction +============ + +ARMv8.5 based processors introduce the Memory Tagging Extension (MTE) +feature. MTE is built on top of the ARMv8.0 virtual address tagging TBI +(Top Byte Ignore) feature and allows software to access a 4-bit +allocation tag for each 16-byte granule in the physical address space. +Such memory range must be mapped with the Normal-Tagged memory +attribute. A logical tag is derived from bits 59-56 of the virtual +address used for the memory access. A CPU with MTE enabled will compare +the logical tag against the allocation tag and potentially raise an +exception on mismatch, subject to system registers configuration. + +Userspace Support +================= + +When ``CONFIG_ARM64_MTE`` is selected and Memory Tagging Extension is +supported by the hardware, the kernel advertises the feature to +userspace via ``HWCAP2_MTE``. + +PROT_MTE +-------- + +To access the allocation tags, a user process must enable the Tagged +memory attribute on an address range using a new ``prot`` flag for +``mmap()`` and ``mprotect()``: + +``PROT_MTE`` - Pages allow access to the MTE allocation tags. + +The allocation tag is set to 0 when such pages are first mapped in the +user address space and preserved on copy-on-write. ``MAP_SHARED`` is +supported and the allocation tags can be shared between processes. + +**Note**: ``PROT_MTE`` is only supported on ``MAP_ANONYMOUS`` and +RAM-based file mappings (``tmpfs``, ``memfd``). Passing it to other +types of mapping will result in ``-EINVAL`` returned by these system +calls. + +**Note**: The ``PROT_MTE`` flag (and corresponding memory type) cannot +be cleared by ``mprotect()``. + +**Note**: ``madvise()`` memory ranges with ``MADV_DONTNEED`` and +``MADV_FREE`` may have the allocation tags cleared (set to 0) at any +point after the system call. + +Tag Check Faults +---------------- + +When ``PROT_MTE`` is enabled on an address range and a mismatch between +the logical and allocation tags occurs on access, there are three +configurable behaviours: + +- *Ignore* - This is the default mode. The CPU (and kernel) ignores the + tag check fault. + +- *Synchronous* - The kernel raises a ``SIGSEGV`` synchronously, with + ``.si_code = SEGV_MTESERR`` and ``.si_addr = ``. The + memory access is not performed. If ``SIGSEGV`` is ignored or blocked + by the offending thread, the containing process is terminated with a + ``coredump``. + +- *Asynchronous* - The kernel raises a ``SIGSEGV``, in the offending + thread, asynchronously following one or multiple tag check faults, + with ``.si_code = SEGV_MTEAERR`` and ``.si_addr = 0`` (the faulting + address is unknown). + +The user can select the above modes, per thread, using the +``prctl(PR_SET_TAGGED_ADDR_CTRL, flags, 0, 0, 0)`` system call where +``flags`` contain one of the following values in the ``PR_MTE_TCF_MASK`` +bit-field: + +- ``PR_MTE_TCF_NONE`` - *Ignore* tag check faults +- ``PR_MTE_TCF_SYNC`` - *Synchronous* tag check fault mode +- ``PR_MTE_TCF_ASYNC`` - *Asynchronous* tag check fault mode + +The current tag check fault mode can be read using the +``prctl(PR_GET_TAGGED_ADDR_CTRL, 0, 0, 0, 0)`` system call. + +Tag checking can also be disabled for a user thread by setting the +``PSTATE.TCO`` bit with ``MSR TCO, #1``. + +**Note**: Signal handlers are always invoked with ``PSTATE.TCO = 0``, +irrespective of the interrupted context. ``PSTATE.TCO`` is restored on +``sigreturn()``. + +**Note**: There are no *match-all* logical tags available for user +applications. + +**Note**: Kernel accesses to the user address space (e.g. ``read()`` +system call) are not checked if the user thread tag checking mode is +``PR_MTE_TCF_NONE`` or ``PR_MTE_TCF_ASYNC``. If the tag checking mode is +``PR_MTE_TCF_SYNC``, the kernel makes a best effort to check its user +address accesses, however it cannot always guarantee it. + +Excluding Tags in the ``IRG``, ``ADDG`` and ``SUBG`` instructions +----------------------------------------------------------------- + +The architecture allows excluding certain tags to be randomly generated +via the ``GCR_EL1.Exclude`` register bit-field. By default, Linux +excludes all tags other than 0. A user thread can enable specific tags +in the randomly generated set using the ``prctl(PR_SET_TAGGED_ADDR_CTRL, +flags, 0, 0, 0)`` system call where ``flags`` contains the tags bitmap +in the ``PR_MTE_TAG_MASK`` bit-field. + +**Note**: The hardware uses an exclude mask but the ``prctl()`` +interface provides an include mask. An include mask of ``0`` (exclusion +mask ``0xffff``) results in the CPU always generating tag ``0``. + +Initial process state +--------------------- + +On ``execve()``, the new process has the following configuration: + +- ``PR_TAGGED_ADDR_ENABLE`` set to 0 (disabled) +- Tag checking mode set to ``PR_MTE_TCF_NONE`` +- ``PR_MTE_TAG_MASK`` set to 0 (all tags excluded) +- ``PSTATE.TCO`` set to 0 +- ``PROT_MTE`` not set on any of the initial memory maps + +On ``fork()``, the new process inherits the parent's configuration and +memory map attributes with the exception of the ``madvise()`` ranges +with ``MADV_WIPEONFORK`` which will have the data and tags cleared (set +to 0). + +The ``ptrace()`` interface +-------------------------- + +``PTRACE_PEEKMTETAGS`` and ``PTRACE_POKEMTETAGS`` allow a tracer to read +the tags from or set the tags to a tracee's address space. The +``ptrace()`` system call is invoked as ``ptrace(request, pid, addr, +data)`` where: + +- ``request`` - one of ``PTRACE_PEEKMTETAGS`` or ``PTRACE_POKEMTETAGS``. +- ``pid`` - the tracee's PID. +- ``addr`` - address in the tracee's address space. +- ``data`` - pointer to a ``struct iovec`` where ``iov_base`` points to + a buffer of ``iov_len`` length in the tracer's address space. + +The tags in the tracer's ``iov_base`` buffer are represented as one +4-bit tag per byte and correspond to a 16-byte MTE tag granule in the +tracee's address space. + +**Note**: If ``addr`` is not aligned to a 16-byte granule, the kernel +will use the corresponding aligned address. + +``ptrace()`` return value: + +- 0 - tags were copied, the tracer's ``iov_len`` was updated to the + number of tags transferred. This may be smaller than the requested + ``iov_len`` if the requested address range in the tracee's or the + tracer's space cannot be accessed or does not have valid tags. +- ``-EPERM`` - the specified process cannot be traced. +- ``-EIO`` - the tracee's address range cannot be accessed (e.g. invalid + address) and no tags copied. ``iov_len`` not updated. +- ``-EFAULT`` - fault on accessing the tracer's memory (``struct iovec`` + or ``iov_base`` buffer) and no tags copied. ``iov_len`` not updated. +- ``-EOPNOTSUPP`` - the tracee's address does not have valid tags (never + mapped with the ``PROT_MTE`` flag). ``iov_len`` not updated. + +**Note**: There are no transient errors for the requests above, so user +programs should not retry in case of a non-zero system call return. + +``PTRACE_GETREGSET`` and ``PTRACE_SETREGSET`` with ``addr == +``NT_ARM_TAGGED_ADDR_CTRL`` allow ``ptrace()`` access to the tagged +address ABI control and MTE configuration of a process as per the +``prctl()`` options described in +Documentation/arm64/tagged-address-abi.rst and above. The corresponding +``regset`` is 1 element of 8 bytes (``sizeof(long))``). + +Example of correct usage +======================== + +*MTE Example code* + +.. code-block:: c + + /* + * To be compiled with -march=armv8.5-a+memtag + */ + #include + #include + #include + #include + #include + #include + #include + #include + + /* + * From arch/arm64/include/uapi/asm/hwcap.h + */ + #define HWCAP2_MTE (1 << 18) + + /* + * From arch/arm64/include/uapi/asm/mman.h + */ + #define PROT_MTE 0x20 + + /* + * From include/uapi/linux/prctl.h + */ + #define PR_SET_TAGGED_ADDR_CTRL 55 + #define PR_GET_TAGGED_ADDR_CTRL 56 + # define PR_TAGGED_ADDR_ENABLE (1UL << 0) + # define PR_MTE_TCF_SHIFT 1 + # define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT) + # define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT) + # define PR_MTE_TCF_ASYNC (2UL << PR_MTE_TCF_SHIFT) + # define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT) + # define PR_MTE_TAG_SHIFT 3 + # define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT) + + /* + * Insert a random logical tag into the given pointer. + */ + #define insert_random_tag(ptr) ({ \ + uint64_t __val; \ + asm("irg %0, %1" : "=r" (__val) : "r" (ptr)); \ + __val; \ + }) + + /* + * Set the allocation tag on the destination address. + */ + #define set_tag(tagged_addr) do { \ + asm volatile("stg %0, [%0]" : : "r" (tagged_addr) : "memory"); \ + } while (0) + + int main() + { + unsigned char *a; + unsigned long page_sz = sysconf(_SC_PAGESIZE); + unsigned long hwcap2 = getauxval(AT_HWCAP2); + + /* check if MTE is present */ + if (!(hwcap2 & HWCAP2_MTE)) + return EXIT_FAILURE; + + /* + * Enable the tagged address ABI, synchronous MTE tag check faults and + * allow all non-zero tags in the randomly generated set. + */ + if (prctl(PR_SET_TAGGED_ADDR_CTRL, + PR_TAGGED_ADDR_ENABLE | PR_MTE_TCF_SYNC | (0xfffe << PR_MTE_TAG_SHIFT), + 0, 0, 0)) { + perror("prctl() failed"); + return EXIT_FAILURE; + } + + a = mmap(0, page_sz, PROT_READ | PROT_WRITE, + MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); + if (a == MAP_FAILED) { + perror("mmap() failed"); + return EXIT_FAILURE; + } + + /* + * Enable MTE on the above anonymous mmap. The flag could be passed + * directly to mmap() and skip this step. + */ + if (mprotect(a, page_sz, PROT_READ | PROT_WRITE | PROT_MTE)) { + perror("mprotect() failed"); + return EXIT_FAILURE; + } + + /* access with the default tag (0) */ + a[0] = 1; + a[1] = 2; + + printf("a[0] = %hhu a[1] = %hhu\n", a[0], a[1]); + + /* set the logical and allocation tags */ + a = (unsigned char *)insert_random_tag(a); + set_tag(a); + + printf("%p\n", a); + + /* non-zero tag access */ + a[0] = 3; + printf("a[0] = %hhu a[1] = %hhu\n", a[0], a[1]); + + /* + * If MTE is enabled correctly the next instruction will generate an + * exception. + */ + printf("Expecting SIGSEGV...\n"); + a[16] = 0xdd; + + /* this should not be printed in the PR_MTE_TCF_SYNC mode */ + printf("...haven't got one\n"); + + return EXIT_FAILURE; + } diff --git a/Documentation/block/blk-mq.rst b/Documentation/block/blk-mq.rst index 88c56afcb070d..a980d23af48c2 100644 --- a/Documentation/block/blk-mq.rst +++ b/Documentation/block/blk-mq.rst @@ -63,10 +63,10 @@ Software staging queues ~~~~~~~~~~~~~~~~~~~~~~~ The block IO subsystem adds requests in the software staging queues -(represented by struct :c:type:`blk_mq_ctx`) in case that they weren't sent +(represented by struct blk_mq_ctx) in case that they weren't sent directly to the driver. A request is one or more BIOs. They arrived at the -block layer through the data structure struct :c:type:`bio`. The block layer -will then build a new structure from it, the struct :c:type:`request` that will +block layer through the data structure struct bio. The block layer +will then build a new structure from it, the struct request that will be used to communicate with the device driver. Each queue has its own lock and the number of queues is defined by a per-CPU or per-node basis. @@ -102,7 +102,7 @@ hardware queue will be drained in sequence according to their mapping. Hardware dispatch queues ~~~~~~~~~~~~~~~~~~~~~~~~ -The hardware queue (represented by struct :c:type:`blk_mq_hw_ctx`) is a struct +The hardware queue (represented by struct blk_mq_hw_ctx) is a struct used by device drivers to map the device submission queues (or device DMA ring buffer), and are the last step of the block layer submission code before the low level device driver taking ownership of the request. To run this queue, the @@ -110,9 +110,9 @@ block layer removes requests from the associated software queues and tries to dispatch to the hardware. If it's not possible to send the requests directly to hardware, they will be -added to a linked list (:c:type:`hctx->dispatch`) of requests. Then, +added to a linked list (``hctx->dispatch``) of requests. Then, next time the block layer runs a queue, it will send the requests laying at the -:c:type:`dispatch` list first, to ensure a fairness dispatch with those +``dispatch`` list first, to ensure a fairness dispatch with those requests that were ready to be sent first. The number of hardware queues depends on the number of hardware contexts supported by the hardware and its device driver, but it will not be more than the number of cores of the system. diff --git a/Documentation/block/inline-encryption.rst b/Documentation/block/inline-encryption.rst index 354817b808876..e75151e467d39 100644 --- a/Documentation/block/inline-encryption.rst +++ b/Documentation/block/inline-encryption.rst @@ -52,7 +52,7 @@ Constraints and notes Design ====== -We add a :c:type:`struct bio_crypt_ctx` to :c:type:`struct bio` that can +We add a struct bio_crypt_ctx to struct bio that can represent an encryption context, because we need to be able to pass this encryption context from the upper layers (like the fs layer) to the device driver to act upon. @@ -85,7 +85,7 @@ blk-mq changes, other block layer changes and blk-crypto-fallback ================================================================= We add a pointer to a ``bi_crypt_context`` and ``keyslot`` to -:c:type:`struct request`. These will be referred to as the ``crypto fields`` +struct request. These will be referred to as the ``crypto fields`` for the request. This ``keyslot`` is the keyslot into which the ``bi_crypt_context`` has been programmed in the KSM of the ``request_queue`` that this request is being sent to. @@ -118,7 +118,7 @@ of the algorithm being used adheres to spec and functions correctly). If a ``request queue``'s inline encryption hardware claimed to support the encryption context specified with a bio, then it will not be handled by the ``blk-crypto-fallback``. We will eventually reach a point in blk-mq when a -:c:type:`struct request` needs to be allocated for that bio. At that point, +struct request needs to be allocated for that bio. At that point, blk-mq tries to program the encryption context into the ``request_queue``'s keyslot_manager, and obtain a keyslot, which it stores in its newly added ``keyslot`` field. This keyslot is released when the request is completed. @@ -188,7 +188,7 @@ keyslots supported by the hardware. The device driver also needs to tell the KSM how to actually manipulate the IE hardware in the device to do things like programming the crypto key into the IE hardware into a particular keyslot. All this is achieved through the -:c:type:`struct blk_ksm_ll_ops` field in the KSM that the device driver +struct blk_ksm_ll_ops field in the KSM that the device driver must fill up after initing the ``blk_keyslot_manager``. The KSM also handles runtime power management for the device when applicable diff --git a/Documentation/block/queue-sysfs.rst b/Documentation/block/queue-sysfs.rst index f261a5c841708..2638d3446b794 100644 --- a/Documentation/block/queue-sysfs.rst +++ b/Documentation/block/queue-sysfs.rst @@ -124,6 +124,10 @@ For zoned block devices (zoned attribute indicating "host-managed" or EXPLICIT OPEN, IMPLICIT OPEN or CLOSED, is limited by this value. If this value is 0, there is no limit. +If the host attempts to exceed this limit, the driver should report this error +with BLK_STS_ZONE_ACTIVE_RESOURCE, which user space may see as the EOVERFLOW +errno. + max_open_zones (RO) ------------------- For zoned block devices (zoned attribute indicating "host-managed" or @@ -131,6 +135,10 @@ For zoned block devices (zoned attribute indicating "host-managed" or EXPLICIT OPEN or IMPLICIT OPEN, is limited by this value. If this value is 0, there is no limit. +If the host attempts to exceed this limit, the driver should report this error +with BLK_STS_ZONE_OPEN_RESOURCE, which user space may see as the ETOOMANYREFS +errno. + max_sectors_kb (RW) ------------------- This is the maximum number of kilobytes that the block layer will allow diff --git a/Documentation/bpf/bpf_devel_QA.rst b/Documentation/bpf/bpf_devel_QA.rst index a26aa1b9b2595..5b613d2a5f1a1 100644 --- a/Documentation/bpf/bpf_devel_QA.rst +++ b/Documentation/bpf/bpf_devel_QA.rst @@ -60,13 +60,13 @@ Q: Where can I find patches currently under discussion for BPF subsystem? A: All patches that are Cc'ed to netdev are queued for review under netdev patchwork project: - http://patchwork.ozlabs.org/project/netdev/list/ + https://patchwork.kernel.org/project/netdevbpf/list/ Those patches which target BPF, are assigned to a 'bpf' delegate for further processing from BPF maintainers. The current queue with patches under review can be found at: - https://patchwork.ozlabs.org/project/netdev/list/?delegate=77147 + https://patchwork.kernel.org/project/netdevbpf/list/?delegate=121173 Once the patches have been reviewed by the BPF community as a whole and approved by the BPF maintainers, their status in patchwork will be @@ -149,7 +149,7 @@ In case the patch or patch series has to be reworked and sent out again in a second or later revision, it is also required to add a version number (``v2``, ``v3``, ...) into the subject prefix:: - git format-patch --subject-prefix='PATCH net-next v2' start..finish + git format-patch --subject-prefix='PATCH bpf-next v2' start..finish When changes have been requested to the patch series, always send the whole patch series again with the feedback incorporated (never send @@ -479,17 +479,18 @@ LLVM's static compiler lists the supported targets through $ llc --version LLVM (http://llvm.org/): - LLVM version 6.0.0svn + LLVM version 10.0.0 Optimized build. Default target: x86_64-unknown-linux-gnu Host CPU: skylake Registered Targets: - bpf - BPF (host endian) - bpfeb - BPF (big endian) - bpfel - BPF (little endian) - x86 - 32-bit X86: Pentium-Pro and above - x86-64 - 64-bit X86: EM64T and AMD64 + aarch64 - AArch64 (little endian) + bpf - BPF (host endian) + bpfeb - BPF (big endian) + bpfel - BPF (little endian) + x86 - 32-bit X86: Pentium-Pro and above + x86-64 - 64-bit X86: EM64T and AMD64 For developers in order to utilize the latest features added to LLVM's BPF back end, it is advisable to run the latest LLVM releases. Support @@ -517,6 +518,10 @@ from the git repositories:: The built binaries can then be found in the build/bin/ directory, where you can point the PATH variable to. +Set ``-DLLVM_TARGETS_TO_BUILD`` equal to the target you wish to build, you +will find a full list of targets within the llvm-project/llvm/lib/Target +directory. + Q: Reporting LLVM BPF issues ---------------------------- Q: Should I notify BPF kernel maintainers about issues in LLVM's BPF code diff --git a/Documentation/bpf/btf.rst b/Documentation/bpf/btf.rst index b5361b8621c92..44dc789de2b49 100644 --- a/Documentation/bpf/btf.rst +++ b/Documentation/bpf/btf.rst @@ -724,6 +724,31 @@ want to define unused entry in BTF_ID_LIST, like:: BTF_ID_UNUSED BTF_ID(struct, task_struct) +The ``BTF_SET_START/END`` macros pair defines sorted list of BTF ID values +and their count, with following syntax:: + + BTF_SET_START(set) + BTF_ID(type1, name1) + BTF_ID(type2, name2) + BTF_SET_END(set) + +resulting in following layout in .BTF_ids section:: + + __BTF_ID__set__set: + .zero 4 + __BTF_ID__type1__name1__3: + .zero 4 + __BTF_ID__type2__name2__4: + .zero 4 + +The ``struct btf_id_set set;`` variable is defined to access the list. + +The ``typeX`` name can be one of following:: + + struct, union, typedef, func + +and is used as a filter when resolving the BTF ID value. + All the BTF ID lists and sets are compiled in the .BTF_ids section and resolved during the linking phase of kernel build by ``resolve_btfids`` tool. diff --git a/Documentation/bpf/index.rst b/Documentation/bpf/index.rst index 7df2465fd108d..4f2874b729c39 100644 --- a/Documentation/bpf/index.rst +++ b/Documentation/bpf/index.rst @@ -52,6 +52,7 @@ Program types prog_cgroup_sysctl prog_flow_dissector bpf_lsm + prog_sk_lookup Map types diff --git a/Documentation/bpf/prog_sk_lookup.rst b/Documentation/bpf/prog_sk_lookup.rst new file mode 100644 index 0000000000000..85a305c19bcdb --- /dev/null +++ b/Documentation/bpf/prog_sk_lookup.rst @@ -0,0 +1,98 @@ +.. SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) + +===================== +BPF sk_lookup program +===================== + +BPF sk_lookup program type (``BPF_PROG_TYPE_SK_LOOKUP``) introduces programmability +into the socket lookup performed by the transport layer when a packet is to be +delivered locally. + +When invoked BPF sk_lookup program can select a socket that will receive the +incoming packet by calling the ``bpf_sk_assign()`` BPF helper function. + +Hooks for a common attach point (``BPF_SK_LOOKUP``) exist for both TCP and UDP. + +Motivation +========== + +BPF sk_lookup program type was introduced to address setup scenarios where +binding sockets to an address with ``bind()`` socket call is impractical, such +as: + +1. receiving connections on a range of IP addresses, e.g. 192.0.2.0/24, when + binding to a wildcard address ``INADRR_ANY`` is not possible due to a port + conflict, +2. receiving connections on all or a wide range of ports, i.e. an L7 proxy use + case. + +Such setups would require creating and ``bind()``'ing one socket to each of the +IP address/port in the range, leading to resource consumption and potential +latency spikes during socket lookup. + +Attachment +========== + +BPF sk_lookup program can be attached to a network namespace with +``bpf(BPF_LINK_CREATE, ...)`` syscall using the ``BPF_SK_LOOKUP`` attach type and a +netns FD as attachment ``target_fd``. + +Multiple programs can be attached to one network namespace. Programs will be +invoked in the same order as they were attached. + +Hooks +===== + +The attached BPF sk_lookup programs run whenever the transport layer needs to +find a listening (TCP) or an unconnected (UDP) socket for an incoming packet. + +Incoming traffic to established (TCP) and connected (UDP) sockets is delivered +as usual without triggering the BPF sk_lookup hook. + +The attached BPF programs must return with either ``SK_PASS`` or ``SK_DROP`` +verdict code. As for other BPF program types that are network filters, +``SK_PASS`` signifies that the socket lookup should continue on to regular +hashtable-based lookup, while ``SK_DROP`` causes the transport layer to drop the +packet. + +A BPF sk_lookup program can also select a socket to receive the packet by +calling ``bpf_sk_assign()`` BPF helper. Typically, the program looks up a socket +in a map holding sockets, such as ``SOCKMAP`` or ``SOCKHASH``, and passes a +``struct bpf_sock *`` to ``bpf_sk_assign()`` helper to record the +selection. Selecting a socket only takes effect if the program has terminated +with ``SK_PASS`` code. + +When multiple programs are attached, the end result is determined from return +codes of all the programs according to the following rules: + +1. If any program returned ``SK_PASS`` and selected a valid socket, the socket + is used as the result of the socket lookup. +2. If more than one program returned ``SK_PASS`` and selected a socket, the last + selection takes effect. +3. If any program returned ``SK_DROP``, and no program returned ``SK_PASS`` and + selected a socket, socket lookup fails. +4. If all programs returned ``SK_PASS`` and none of them selected a socket, + socket lookup continues on. + +API +=== + +In its context, an instance of ``struct bpf_sk_lookup``, BPF sk_lookup program +receives information about the packet that triggered the socket lookup. Namely: + +* IP version (``AF_INET`` or ``AF_INET6``), +* L4 protocol identifier (``IPPROTO_TCP`` or ``IPPROTO_UDP``), +* source and destination IP address, +* source and destination L4 port, +* the socket that has been selected with ``bpf_sk_assign()``. + +Refer to ``struct bpf_sk_lookup`` declaration in ``linux/bpf.h`` user API +header, and `bpf-helpers(7) +`_ man-page section +for ``bpf_sk_assign()`` for details. + +Example +======= + +See ``tools/testing/selftests/bpf/prog_tests/sk_lookup.c`` for the reference +implementation. diff --git a/Documentation/conf.py b/Documentation/conf.py index c503188880d95..376dd0ddf39cd 100644 --- a/Documentation/conf.py +++ b/Documentation/conf.py @@ -36,10 +36,82 @@ needs_sphinx = '1.3' # Add any Sphinx extension module names here, as strings. They can be # extensions coming with Sphinx (named 'sphinx.ext.*') or your custom # ones. -extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include', 'cdomain', +extensions = ['kerneldoc', 'rstFlatTable', 'kernel_include', 'kfigure', 'sphinx.ext.ifconfig', 'automarkup', 'maintainers_include', 'sphinx.ext.autosectionlabel' ] +# +# cdomain is badly broken in Sphinx 3+. Leaving it out generates *most* +# of the docs correctly, but not all. Scream bloody murder but allow +# the process to proceed; hopefully somebody will fix this properly soon. +# +if major >= 3: + sys.stderr.write('''WARNING: The kernel documentation build process + support for Sphinx v3.0 and above is brand new. Be prepared for + possible issues in the generated output. + ''') + if minor > 0 or patch >= 2: + # Sphinx c function parser is more pedantic with regards to type + # checking. Due to that, having macros at c:function cause problems. + # Those needed to be scaped by using c_id_attributes[] array + c_id_attributes = [ + # GCC Compiler types not parsed by Sphinx: + "__restrict__", + + # include/linux/compiler_types.h: + "__iomem", + "__kernel", + "noinstr", + "notrace", + "__percpu", + "__rcu", + "__user", + + # include/linux/compiler_attributes.h: + "__alias", + "__aligned", + "__aligned_largest", + "__always_inline", + "__assume_aligned", + "__cold", + "__attribute_const__", + "__copy", + "__pure", + "__designated_init", + "__visible", + "__printf", + "__scanf", + "__gnu_inline", + "__malloc", + "__mode", + "__no_caller_saved_registers", + "__noclone", + "__nonstring", + "__noreturn", + "__packed", + "__pure", + "__section", + "__always_unused", + "__maybe_unused", + "__used", + "__weak", + "noinline", + + # include/linux/memblock.h: + "__init_memblock", + "__meminit", + + # include/linux/init.h: + "__init", + "__ref", + + # include/linux/linkage.h: + "asmlinkage", + ] + +else: + extensions.append('cdomain') + # Ensure that autosectionlabel will produce unique names autosectionlabel_prefix_document = True autosectionlabel_maxdepth = 2 diff --git a/Documentation/core-api/cpu_hotplug.rst b/Documentation/core-api/cpu_hotplug.rst index 298c9c8bea9a2..a2c96bec5ee8d 100644 --- a/Documentation/core-api/cpu_hotplug.rst +++ b/Documentation/core-api/cpu_hotplug.rst @@ -30,7 +30,7 @@ which didn't support these methods. Command Line Switches ===================== ``maxcpus=n`` - Restrict boot time CPUs to *n*. Say if you have fourV CPUs, using + Restrict boot time CPUs to *n*. Say if you have four CPUs, using ``maxcpus=2`` will only boot two. You can choose to bring the other CPUs later online. diff --git a/Documentation/core-api/dma-api.rst b/Documentation/core-api/dma-api.rst index 3b3abbbb4b9a6..75cb757bbff00 100644 --- a/Documentation/core-api/dma-api.rst +++ b/Documentation/core-api/dma-api.rst @@ -516,100 +516,110 @@ routines, e.g.::: } -Part II - Advanced dma usage ----------------------------- +Part II - Non-coherent DMA allocations +-------------------------------------- -Warning: These pieces of the DMA API should not be used in the -majority of cases, since they cater for unlikely corner cases that -don't belong in usual drivers. +These APIs allow to allocate pages that are guaranteed to be DMA addressable +by the passed in device, but which need explicit management of memory ownership +for the kernel vs the device. -If you don't understand how cache line coherency works between a -processor and an I/O device, you should not be using this part of the -API at all. +If you don't understand how cache line coherency works between a processor and +an I/O device, you should not be using this part of the API. :: void * - dma_alloc_attrs(struct device *dev, size_t size, dma_addr_t *dma_handle, - gfp_t flag, unsigned long attrs) + dma_alloc_noncoherent(struct device *dev, size_t size, + dma_addr_t *dma_handle, enum dma_data_direction dir, + gfp_t gfp) -Identical to dma_alloc_coherent() except that when the -DMA_ATTR_NON_CONSISTENT flags is passed in the attrs argument, the -platform will choose to return either consistent or non-consistent memory -as it sees fit. By using this API, you are guaranteeing to the platform -that you have all the correct and necessary sync points for this memory -in the driver should it choose to return non-consistent memory. +This routine allocates a region of bytes of consistent memory. It +returns a pointer to the allocated region (in the processor's virtual address +space) or NULL if the allocation failed. The returned memory may or may not +be in the kernel direct mapping. Drivers must not call virt_to_page on +the returned memory region. -Note: where the platform can return consistent memory, it will -guarantee that the sync points become nops. +It also returns a which may be cast to an unsigned integer the +same width as the bus and given to the device as the DMA address base of +the region. + +The dir parameter specified if data is read and/or written by the device, +see dma_map_single() for details. -Warning: Handling non-consistent memory is a real pain. You should -only use this API if you positively know your driver will be -required to work on one of the rare (usually non-PCI) architectures -that simply cannot make consistent memory. +The gfp parameter allows the caller to specify the ``GFP_`` flags (see +kmalloc()) for the allocation, but rejects flags used to specify a memory +zone such as GFP_DMA or GFP_HIGHMEM. + +Before giving the memory to the device, dma_sync_single_for_device() needs +to be called, and before reading memory written by the device, +dma_sync_single_for_cpu(), just like for streaming DMA mappings that are +reused. :: void - dma_free_attrs(struct device *dev, size_t size, void *cpu_addr, - dma_addr_t dma_handle, unsigned long attrs) + dma_free_noncoherent(struct device *dev, size_t size, void *cpu_addr, + dma_addr_t dma_handle, enum dma_data_direction dir) -Free memory allocated by the dma_alloc_attrs(). All common -parameters must be identical to those otherwise passed to dma_free_coherent, -and the attrs argument must be identical to the attrs passed to -dma_alloc_attrs(). +Free a region of memory previously allocated using dma_alloc_noncoherent(). +dev, size and dma_handle and dir must all be the same as those passed into +dma_alloc_noncoherent(). cpu_addr must be the virtual address returned by +dma_alloc_noncoherent(). :: - int - dma_get_cache_alignment(void) + struct page * + dma_alloc_pages(struct device *dev, size_t size, dma_addr_t *dma_handle, + enum dma_data_direction dir, gfp_t gfp) -Returns the processor cache alignment. This is the absolute minimum -alignment *and* width that you must observe when either mapping -memory or doing partial flushes. +This routine allocates a region of bytes of non-coherent memory. It +returns a pointer to first struct page for the region, or NULL if the +allocation failed. The resulting struct page can be used for everything a +struct page is suitable for. -.. note:: +It also returns a which may be cast to an unsigned integer the +same width as the bus and given to the device as the DMA address base of +the region. - This API may return a number *larger* than the actual cache - line, but it will guarantee that one or more cache lines fit exactly - into the width returned by this call. It will also always be a power - of two for easy alignment. +The dir parameter specified if data is read and/or written by the device, +see dma_map_single() for details. + +The gfp parameter allows the caller to specify the ``GFP_`` flags (see +kmalloc()) for the allocation, but rejects flags used to specify a memory +zone such as GFP_DMA or GFP_HIGHMEM. + +Before giving the memory to the device, dma_sync_single_for_device() needs +to be called, and before reading memory written by the device, +dma_sync_single_for_cpu(), just like for streaming DMA mappings that are +reused. :: void - dma_cache_sync(struct device *dev, void *vaddr, size_t size, - enum dma_data_direction direction) + dma_free_pages(struct device *dev, size_t size, struct page *page, + dma_addr_t dma_handle, enum dma_data_direction dir) -Do a partial sync of memory that was allocated by dma_alloc_attrs() with -the DMA_ATTR_NON_CONSISTENT flag starting at virtual address vaddr and -continuing on for size. Again, you *must* observe the cache line -boundaries when doing this. +Free a region of memory previously allocated using dma_alloc_pages(). +dev, size and dma_handle and dir must all be the same as those passed into +dma_alloc_noncoherent(). page must be the pointer returned by +dma_alloc_pages(). :: int - dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr, - dma_addr_t device_addr, size_t size); - -Declare region of memory to be handed out by dma_alloc_coherent() when -it's asked for coherent memory for this device. - -phys_addr is the CPU physical address to which the memory is currently -assigned (this will be ioremapped so the CPU can access the region). + dma_get_cache_alignment(void) -device_addr is the DMA address the device needs to be programmed -with to actually address this memory (this will be handed out as the -dma_addr_t in dma_alloc_coherent()). +Returns the processor cache alignment. This is the absolute minimum +alignment *and* width that you must observe when either mapping +memory or doing partial flushes. -size is the size of the area (must be multiples of PAGE_SIZE). +.. note:: -As a simplification for the platforms, only *one* such region of -memory may be declared per device. + This API may return a number *larger* than the actual cache + line, but it will guarantee that one or more cache lines fit exactly + into the width returned by this call. It will also always be a power + of two for easy alignment. -For reasons of efficiency, most platforms choose to track the declared -region only at the granularity of a page. For smaller allocations, -you should use the dma_pool() API. Part III - Debug drivers use of the DMA-API ------------------------------------------- diff --git a/Documentation/core-api/dma-attributes.rst b/Documentation/core-api/dma-attributes.rst index 29dcbe8826e85..1887d92e8e926 100644 --- a/Documentation/core-api/dma-attributes.rst +++ b/Documentation/core-api/dma-attributes.rst @@ -25,14 +25,6 @@ Since it is optional for platforms to implement DMA_ATTR_WRITE_COMBINE, those that do not will simply ignore the attribute and exhibit default behavior. -DMA_ATTR_NON_CONSISTENT ------------------------ - -DMA_ATTR_NON_CONSISTENT lets the platform to choose to return either -consistent or non-consistent memory as it sees fit. By using this API, -you are guaranteeing to the platform that you have all the correct and -necessary sync points for this memory in the driver. - DMA_ATTR_NO_KERNEL_MAPPING -------------------------- diff --git a/Documentation/core-api/genericirq.rst b/Documentation/core-api/genericirq.rst index 8f06d885c3107..f959c9b53f61b 100644 --- a/Documentation/core-api/genericirq.rst +++ b/Documentation/core-api/genericirq.rst @@ -419,6 +419,7 @@ functions which are exported. .. kernel-doc:: kernel/irq/manage.c .. kernel-doc:: kernel/irq/chip.c + :export: Internal Functions Provided =========================== @@ -431,6 +432,7 @@ functions. .. kernel-doc:: kernel/irq/handle.c .. kernel-doc:: kernel/irq/chip.c + :internal: Credits ======= diff --git a/Documentation/core-api/kernel-api.rst b/Documentation/core-api/kernel-api.rst index 4ac53a1363f63..741aa37dc1819 100644 --- a/Documentation/core-api/kernel-api.rst +++ b/Documentation/core-api/kernel-api.rst @@ -231,12 +231,6 @@ Refer to the file kernel/module.c for more information. Hardware Interfaces =================== -Interrupt Handling ------------------- - -.. kernel-doc:: kernel/irq/manage.c - :export: - DMA Channels ------------ diff --git a/Documentation/core-api/workqueue.rst b/Documentation/core-api/workqueue.rst index 00a5ba51e63fb..541d31de89267 100644 --- a/Documentation/core-api/workqueue.rst +++ b/Documentation/core-api/workqueue.rst @@ -396,3 +396,5 @@ Kernel Inline Documentations Reference ====================================== .. kernel-doc:: include/linux/workqueue.h + +.. kernel-doc:: kernel/workqueue.c diff --git a/Documentation/core-api/xarray.rst b/Documentation/core-api/xarray.rst index 640934b6f7b4d..a137a0e6d0682 100644 --- a/Documentation/core-api/xarray.rst +++ b/Documentation/core-api/xarray.rst @@ -475,13 +475,15 @@ or iterations will move the index to the first index in the range. Each entry will only be returned once, no matter how many indices it occupies. -Using xas_next() or xas_prev() with a multi-index xa_state -is not supported. Using either of these functions on a multi-index entry -will reveal sibling entries; these should be skipped over by the caller. - -Storing ``NULL`` into any index of a multi-index entry will set the entry -at every index to ``NULL`` and dissolve the tie. Splitting a multi-index -entry into entries occupying smaller ranges is not yet supported. +Using xas_next() or xas_prev() with a multi-index xa_state is not +supported. Using either of these functions on a multi-index entry will +reveal sibling entries; these should be skipped over by the caller. + +Storing ``NULL`` into any index of a multi-index entry will set the +entry at every index to ``NULL`` and dissolve the tie. A multi-index +entry can be split into entries occupying smaller ranges by calling +xas_split_alloc() without the xa_lock held, followed by taking the lock +and calling xas_split(). Functions and structures ======================== diff --git a/Documentation/crypto/userspace-if.rst b/Documentation/crypto/userspace-if.rst index 52019e9059004..b45dabbf69d68 100644 --- a/Documentation/crypto/userspace-if.rst +++ b/Documentation/crypto/userspace-if.rst @@ -296,15 +296,16 @@ follows: struct sockaddr_alg sa = { .salg_family = AF_ALG, - .salg_type = "rng", /* this selects the symmetric cipher */ - .salg_name = "drbg_nopr_sha256" /* this is the cipher name */ + .salg_type = "rng", /* this selects the random number generator */ + .salg_name = "drbg_nopr_sha256" /* this is the RNG name */ }; Depending on the RNG type, the RNG must be seeded. The seed is provided using the setsockopt interface to set the key. For example, the ansi_cprng requires a seed. The DRBGs do not require a seed, but may be -seeded. +seeded. The seed is also known as a *Personalization String* in NIST SP 800-90A +standard. Using the read()/recvmsg() system calls, random numbers can be obtained. The kernel generates at most 128 bytes in one call. If user space @@ -314,6 +315,16 @@ WARNING: The user space caller may invoke the initially mentioned accept system call multiple times. In this case, the returned file descriptors have the same state. +Following CAVP testing interfaces are enabled when kernel is built with +CRYPTO_USER_API_RNG_CAVP option: + +- the concatenation of *Entropy* and *Nonce* can be provided to the RNG via + ALG_SET_DRBG_ENTROPY setsockopt interface. Setting the entropy requires + CAP_SYS_ADMIN permission. + +- *Additional Data* can be provided using the send()/sendmsg() system calls, + but only after the entropy has been set. + Zero-Copy Interface ------------------- @@ -377,6 +388,9 @@ mentioned optname: provided ciphertext is assumed to contain an authentication tag of the given size (see section about AEAD memory layout below). +- ALG_SET_DRBG_ENTROPY -- Setting the entropy of the random number generator. + This option is applicable to RNG cipher type only. + User space API example ---------------------- diff --git a/Documentation/dev-tools/kasan.rst b/Documentation/dev-tools/kasan.rst index 38fd5681fade4..c09c9ca2ff1cb 100644 --- a/Documentation/dev-tools/kasan.rst +++ b/Documentation/dev-tools/kasan.rst @@ -13,10 +13,10 @@ KASAN uses compile-time instrumentation to insert validity checks before every memory access, and therefore requires a compiler version that supports that. Generic KASAN is supported in both GCC and Clang. With GCC it requires version -8.3.0 or later. With Clang it requires version 7.0.0 or later, but detection of +8.3.0 or later. Any supported Clang version is compatible, but detection of out-of-bounds accesses for global variables is only supported since Clang 11. -Tag-based KASAN is only supported in Clang and requires version 7.0.0 or later. +Tag-based KASAN is only supported in Clang. Currently generic KASAN is supported for the x86_64, arm64, xtensa, s390 and riscv architectures, and tag-based KASAN is supported only for arm64. @@ -281,3 +281,73 @@ unmapped. This will require changes in arch-specific code. This allows ``VMAP_STACK`` support on x86, and can simplify support of architectures that do not have a fixed module region. + +CONFIG_KASAN_KUNIT_TEST & CONFIG_TEST_KASAN_MODULE +-------------------------------------------------- + +``CONFIG_KASAN_KUNIT_TEST`` utilizes the KUnit Test Framework for testing. +This means each test focuses on a small unit of functionality and +there are a few ways these tests can be run. + +Each test will print the KASAN report if an error is detected and then +print the number of the test and the status of the test: + +pass:: + + ok 28 - kmalloc_double_kzfree +or, if kmalloc failed:: + + # kmalloc_large_oob_right: ASSERTION FAILED at lib/test_kasan.c:163 + Expected ptr is not null, but is + not ok 4 - kmalloc_large_oob_right +or, if a KASAN report was expected, but not found:: + + # kmalloc_double_kzfree: EXPECTATION FAILED at lib/test_kasan.c:629 + Expected kasan_data->report_expected == kasan_data->report_found, but + kasan_data->report_expected == 1 + kasan_data->report_found == 0 + not ok 28 - kmalloc_double_kzfree + +All test statuses are tracked as they run and an overall status will +be printed at the end:: + + ok 1 - kasan + +or:: + + not ok 1 - kasan + +(1) Loadable Module +~~~~~~~~~~~~~~~~~~~~ + +With ``CONFIG_KUNIT`` enabled, ``CONFIG_KASAN_KUNIT_TEST`` can be built as +a loadable module and run on any architecture that supports KASAN +using something like insmod or modprobe. The module is called ``test_kasan``. + +(2) Built-In +~~~~~~~~~~~~~ + +With ``CONFIG_KUNIT`` built-in, ``CONFIG_KASAN_KUNIT_TEST`` can be built-in +on any architecure that supports KASAN. These and any other KUnit +tests enabled will run and print the results at boot as a late-init +call. + +(3) Using kunit_tool +~~~~~~~~~~~~~~~~~~~~~ + +With ``CONFIG_KUNIT`` and ``CONFIG_KASAN_KUNIT_TEST`` built-in, we can also +use kunit_tool to see the results of these along with other KUnit +tests in a more readable way. This will not print the KASAN reports +of tests that passed. Use `KUnit documentation `_ for more up-to-date +information on kunit_tool. + +.. _KUnit: https://www.kernel.org/doc/html/latest/dev-tools/kunit/index.html + +``CONFIG_TEST_KASAN_MODULE`` is a set of KASAN tests that could not be +converted to KUnit. These tests can be run only as a module with +``CONFIG_TEST_KASAN_MODULE`` built as a loadable module and +``CONFIG_KASAN`` built-in. The type of error expected and the +function being run is printed before the expression expected to give +an error. Then the error is printed, if found, and that test +should be interpretted to pass only if the error was the one expected +by the test. diff --git a/Documentation/dev-tools/kgdb.rst b/Documentation/dev-tools/kgdb.rst index c908ef4d3f043..77b688e6a2544 100644 --- a/Documentation/dev-tools/kgdb.rst +++ b/Documentation/dev-tools/kgdb.rst @@ -726,7 +726,7 @@ The kernel debugger is organized into a number of components: - contains an arch-specific trap catcher which invokes kgdb_handle_exception() to start kgdb about doing its work - - translation to and from gdb specific packet format to :c:type:`pt_regs` + - translation to and from gdb specific packet format to struct pt_regs - Registration and unregistration of architecture specific trap hooks @@ -846,7 +846,7 @@ invokes a callback in the serial core which in turn uses the callback in the UART driver. When using kgdboc with a UART, the UART driver must implement two -callbacks in the :c:type:`struct uart_ops `. +callbacks in the struct uart_ops. Example from ``drivers/8250.c``:: @@ -875,7 +875,7 @@ kernel when ``CONFIG_KDB_KEYBOARD=y`` is set in the kernel configuration. The core polled keyboard driver for PS/2 type keyboards is in ``drivers/char/kdb_keyboard.c``. This driver is hooked into the debug core when kgdboc populates the callback in the array called -:c:type:`kdb_poll_funcs[]`. The kdb_get_kbd_char() is the top-level +:c:expr:`kdb_poll_funcs[]`. The kdb_get_kbd_char() is the top-level function which polls hardware for single character input. kgdboc and kms diff --git a/Documentation/dev-tools/kmemleak.rst b/Documentation/dev-tools/kmemleak.rst index a41a2d238af23..1c935f41cd3a2 100644 --- a/Documentation/dev-tools/kmemleak.rst +++ b/Documentation/dev-tools/kmemleak.rst @@ -229,7 +229,7 @@ Testing with kmemleak-test To check if you have all set up to use kmemleak, you can use the kmemleak-test module, a module that deliberately leaks memory. Set CONFIG_DEBUG_KMEMLEAK_TEST -as module (it can't be used as bult-in) and boot the kernel with kmemleak +as module (it can't be used as built-in) and boot the kernel with kmemleak enabled. Load the module and perform a scan with:: # modprobe kmemleak-test diff --git a/Documentation/dev-tools/kselftest.rst b/Documentation/dev-tools/kselftest.rst index 469d115a95f12..a901def730d95 100644 --- a/Documentation/dev-tools/kselftest.rst +++ b/Documentation/dev-tools/kselftest.rst @@ -125,32 +125,41 @@ Note that some tests will require root privileges. Install selftests ================= -You can use the kselftest_install.sh tool to install selftests in the -default location, which is tools/testing/selftests/kselftest, or in a -user specified location. +You can use the "install" target of "make" (which calls the `kselftest_install.sh` +tool) to install selftests in the default location (`tools/testing/selftests/kselftest_install`), +or in a user specified location via the `INSTALL_PATH` "make" variable. To install selftests in default location:: - $ cd tools/testing/selftests - $ ./kselftest_install.sh + $ make -C tools/testing/selftests install To install selftests in a user specified location:: - $ cd tools/testing/selftests - $ ./kselftest_install.sh install_dir + $ make -C tools/testing/selftests install INSTALL_PATH=/some/other/path Running installed selftests =========================== -Kselftest install as well as the Kselftest tarball provide a script -named "run_kselftest.sh" to run the tests. +Found in the install directory, as well as in the Kselftest tarball, +is a script named `run_kselftest.sh` to run the tests. You can simply do the following to run the installed Kselftests. Please note some tests will require root privileges:: - $ cd kselftest + $ cd kselftest_install $ ./run_kselftest.sh +To see the list of available tests, the `-l` option can be used:: + + $ ./run_kselftest.sh -l + +The `-c` option can be used to run all the tests from a test collection, or +the `-t` option for specific single tests. Either can be used multiple times:: + + $ ./run_kselftest.sh -c bpf -c seccomp -t timers:posix_timers -t timer:nanosleep + +For other features see the script usage output, seen with the `-h` option. + Packaging selftests =================== @@ -160,9 +169,9 @@ different system. To package selftests, run:: $ make -C tools/testing/selftests gen_tar This generates a tarball in the `INSTALL_PATH/kselftest-packages` directory. By -default, `.gz` format is used. The tar format can be overridden by specifying -a `FORMAT` make variable. Any value recognized by `tar's auto-compress`_ option -is supported, such as:: +default, `.gz` format is used. The tar compression format can be overridden by +specifying a `FORMAT` make variable. Any value recognized by `tar's auto-compress`_ +option is supported, such as:: $ make -C tools/testing/selftests gen_tar FORMAT=.xz diff --git a/Documentation/dev-tools/kunit/index.rst b/Documentation/dev-tools/kunit/index.rst index e93606ecfb014..c234a3ab3c34f 100644 --- a/Documentation/dev-tools/kunit/index.rst +++ b/Documentation/dev-tools/kunit/index.rst @@ -11,6 +11,7 @@ KUnit - Unit Testing for the Linux Kernel usage kunit-tool api/index + style faq What is KUnit? diff --git a/Documentation/dev-tools/kunit/style.rst b/Documentation/dev-tools/kunit/style.rst new file mode 100644 index 0000000000000..da1d6f0ed6bcc --- /dev/null +++ b/Documentation/dev-tools/kunit/style.rst @@ -0,0 +1,205 @@ +.. SPDX-License-Identifier: GPL-2.0 + +=========================== +Test Style and Nomenclature +=========================== + +To make finding, writing, and using KUnit tests as simple as possible, it's +strongly encouraged that they are named and written according to the guidelines +below. While it's possible to write KUnit tests which do not follow these rules, +they may break some tooling, may conflict with other tests, and may not be run +automatically by testing systems. + +It's recommended that you only deviate from these guidelines when: + +1. Porting tests to KUnit which are already known with an existing name, or +2. Writing tests which would cause serious problems if automatically run (e.g., + non-deterministically producing false positives or negatives, or taking an + extremely long time to run). + +Subsystems, Suites, and Tests +============================= + +In order to make tests as easy to find as possible, they're grouped into suites +and subsystems. A test suite is a group of tests which test a related area of +the kernel, and a subsystem is a set of test suites which test different parts +of the same kernel subsystem or driver. + +Subsystems +---------- + +Every test suite must belong to a subsystem. A subsystem is a collection of one +or more KUnit test suites which test the same driver or part of the kernel. A +rule of thumb is that a test subsystem should match a single kernel module. If +the code being tested can't be compiled as a module, in many cases the subsystem +should correspond to a directory in the source tree or an entry in the +MAINTAINERS file. If unsure, follow the conventions set by tests in similar +areas. + +Test subsystems should be named after the code being tested, either after the +module (wherever possible), or after the directory or files being tested. Test +subsystems should be named to avoid ambiguity where necessary. + +If a test subsystem name has multiple components, they should be separated by +underscores. *Do not* include "test" or "kunit" directly in the subsystem name +unless you are actually testing other tests or the kunit framework itself. + +Example subsystems could be: + +``ext4`` + Matches the module and filesystem name. +``apparmor`` + Matches the module name and LSM name. +``kasan`` + Common name for the tool, prominent part of the path ``mm/kasan`` +``snd_hda_codec_hdmi`` + Has several components (``snd``, ``hda``, ``codec``, ``hdmi``) separated by + underscores. Matches the module name. + +Avoid names like these: + +``linear-ranges`` + Names should use underscores, not dashes, to separate words. Prefer + ``linear_ranges``. +``qos-kunit-test`` + As well as using underscores, this name should not have "kunit-test" as a + suffix, and ``qos`` is ambiguous as a subsystem name. ``power_qos`` would be a + better name. +``pc_parallel_port`` + The corresponding module name is ``parport_pc``, so this subsystem should also + be named ``parport_pc``. + +.. note:: + The KUnit API and tools do not explicitly know about subsystems. They're + simply a way of categorising test suites and naming modules which + provides a simple, consistent way for humans to find and run tests. This + may change in the future, though. + +Suites +------ + +KUnit tests are grouped into test suites, which cover a specific area of +functionality being tested. Test suites can have shared initialisation and +shutdown code which is run for all tests in the suite. +Not all subsystems will need to be split into multiple test suites (e.g. simple drivers). + +Test suites are named after the subsystem they are part of. If a subsystem +contains several suites, the specific area under test should be appended to the +subsystem name, separated by an underscore. + +In the event that there are multiple types of test using KUnit within a +subsystem (e.g., both unit tests and integration tests), they should be put into +separate suites, with the type of test as the last element in the suite name. +Unless these tests are actually present, avoid using ``_test``, ``_unittest`` or +similar in the suite name. + +The full test suite name (including the subsystem name) should be specified as +the ``.name`` member of the ``kunit_suite`` struct, and forms the base for the +module name (see below). + +Example test suites could include: + +``ext4_inode`` + Part of the ``ext4`` subsystem, testing the ``inode`` area. +``kunit_try_catch`` + Part of the ``kunit`` implementation itself, testing the ``try_catch`` area. +``apparmor_property_entry`` + Part of the ``apparmor`` subsystem, testing the ``property_entry`` area. +``kasan`` + The ``kasan`` subsystem has only one suite, so the suite name is the same as + the subsystem name. + +Avoid names like: + +``ext4_ext4_inode`` + There's no reason to state the subsystem twice. +``property_entry`` + The suite name is ambiguous without the subsystem name. +``kasan_integration_test`` + Because there is only one suite in the ``kasan`` subsystem, the suite should + just be called ``kasan``. There's no need to redundantly add + ``integration_test``. Should a separate test suite with, for example, unit + tests be added, then that suite could be named ``kasan_unittest`` or similar. + +Test Cases +---------- + +Individual tests consist of a single function which tests a constrained +codepath, property, or function. In the test output, individual tests' results +will show up as subtests of the suite's results. + +Tests should be named after what they're testing. This is often the name of the +function being tested, with a description of the input or codepath being tested. +As tests are C functions, they should be named and written in accordance with +the kernel coding style. + +.. note:: + As tests are themselves functions, their names cannot conflict with + other C identifiers in the kernel. This may require some creative + naming. It's a good idea to make your test functions `static` to avoid + polluting the global namespace. + +Example test names include: + +``unpack_u32_with_null_name`` + Tests the ``unpack_u32`` function when a NULL name is passed in. +``test_list_splice`` + Tests the ``list_splice`` macro. It has the prefix ``test_`` to avoid a + name conflict with the macro itself. + + +Should it be necessary to refer to a test outside the context of its test suite, +the *fully-qualified* name of a test should be the suite name followed by the +test name, separated by a colon (i.e. ``suite:test``). + +Test Kconfig Entries +==================== + +Every test suite should be tied to a Kconfig entry. + +This Kconfig entry must: + +* be named ``CONFIG__KUNIT_TEST``: where is the name of the test + suite. +* be listed either alongside the config entries for the driver/subsystem being + tested, or be under [Kernel Hacking]→[Kernel Testing and Coverage] +* depend on ``CONFIG_KUNIT`` +* be visible only if ``CONFIG_KUNIT_ALL_TESTS`` is not enabled. +* have a default value of ``CONFIG_KUNIT_ALL_TESTS``. +* have a brief description of KUnit in the help text + +Unless there's a specific reason not to (e.g. the test is unable to be built as +a module), Kconfig entries for tests should be tristate. + +An example Kconfig entry: + +.. code-block:: none + + config FOO_KUNIT_TEST + tristate "KUnit test for foo" if !KUNIT_ALL_TESTS + depends on KUNIT + default KUNIT_ALL_TESTS + help + This builds unit tests for foo. + + For more information on KUnit and unit tests in general, please refer + to the KUnit documentation in Documentation/dev-tools/kunit + + If unsure, say N + + +Test File and Module Names +========================== + +KUnit tests can often be compiled as a module. These modules should be named +after the test suite, followed by ``_test``. If this is likely to conflict with +non-KUnit tests, the suffix ``_kunit`` can also be used. + +The easiest way of achieving this is to name the file containing the test suite +``_test.c`` (or, as above, ``_kunit.c``). This file should be +placed next to the code under test. + +If the suite name contains some or all of the name of the test's parent +directory, it may make sense to modify the source filename to reduce redundancy. +For example, a ``foo_firmware`` suite could be in the ``foo/firmware_test.c`` +file. diff --git a/Documentation/dev-tools/kunit/usage.rst b/Documentation/dev-tools/kunit/usage.rst index 3c3fe8b5feccf..961d3ea3ca19a 100644 --- a/Documentation/dev-tools/kunit/usage.rst +++ b/Documentation/dev-tools/kunit/usage.rst @@ -211,6 +211,11 @@ KUnit test framework. .. note:: A test case will only be run if it is associated with a test suite. +``kunit_test_suite(...)`` is a macro which tells the linker to put the specified +test suite in a special linker section so that it can be run by KUnit either +after late_init, or when the test module is loaded (depending on whether the +test was built in or not). + For more information on these types of things see the :doc:`api/test`. Isolating Behavior diff --git a/Documentation/devicetree/bindings/.gitignore b/Documentation/devicetree/bindings/.gitignore index 5c6d8ea1a09c4..3a05b99bfa266 100644 --- a/Documentation/devicetree/bindings/.gitignore +++ b/Documentation/devicetree/bindings/.gitignore @@ -1,3 +1,4 @@ # SPDX-License-Identifier: GPL-2.0-only *.example.dts processed-schema*.yaml +processed-schema*.json diff --git a/Documentation/devicetree/bindings/.yamllint b/Documentation/devicetree/bindings/.yamllint new file mode 100644 index 0000000000000..214abd3ec4403 --- /dev/null +++ b/Documentation/devicetree/bindings/.yamllint @@ -0,0 +1,39 @@ +extends: relaxed + +rules: + line-length: + # 80 chars should be enough, but don't fail if a line is longer + max: 110 + allow-non-breakable-words: true + level: warning + braces: + min-spaces-inside: 0 + max-spaces-inside: 1 + min-spaces-inside-empty: 0 + max-spaces-inside-empty: 0 + brackets: + min-spaces-inside: 0 + max-spaces-inside: 1 + min-spaces-inside-empty: 0 + max-spaces-inside-empty: 0 + colons: {max-spaces-before: 0, max-spaces-after: 1} + commas: {min-spaces-after: 1, max-spaces-after: 1} + comments: + require-starting-space: false + min-spaces-from-content: 1 + comments-indentation: disable + document-start: + present: true + empty-lines: + max: 3 + max-end: 1 + empty-values: + forbid-in-block-mappings: true + forbid-in-flow-mappings: true + hyphens: + max-spaces-after: 1 + indentation: + spaces: 2 + indent-sequences: true + check-multi-line-strings: false + trailing-spaces: false diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile index 91c4d00e96d3c..f50420099a553 100644 --- a/Documentation/devicetree/bindings/Makefile +++ b/Documentation/devicetree/bindings/Makefile @@ -3,7 +3,9 @@ DT_DOC_CHECKER ?= dt-doc-validate DT_EXTRACT_EX ?= dt-extract-example DT_MK_SCHEMA ?= dt-mk-schema -DT_SCHEMA_MIN_VERSION = 2020.5 +DT_SCHEMA_LINT = $(shell which yamllint) + +DT_SCHEMA_MIN_VERSION = 2020.8.1 PHONY += check_dtschema_version check_dtschema_version: @@ -11,26 +13,40 @@ check_dtschema_version: $(DT_DOC_CHECKER) --version 2>/dev/null || echo 0; } | sort -VC || \ { echo "ERROR: dtschema minimum version is v$(DT_SCHEMA_MIN_VERSION)" >&2; false; } -quiet_cmd_chk_binding = CHKDT $(patsubst $(srctree)/%,%,$<) - cmd_chk_binding = $(DT_DOC_CHECKER) -u $(srctree)/$(src) $< ; \ - $(DT_EXTRACT_EX) $< > $@ +quiet_cmd_extract_ex = DTEX $@ + cmd_extract_ex = $(DT_EXTRACT_EX) $< > $@ $(obj)/%.example.dts: $(src)/%.yaml check_dtschema_version FORCE - $(call if_changed,chk_binding) + $(call if_changed,extract_ex) # Use full schemas when checking %.example.dts -DT_TMP_SCHEMA := $(obj)/processed-schema-examples.yaml +DT_TMP_SCHEMA := $(obj)/processed-schema-examples.json find_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \ -name 'processed-schema*' ! \ -name '*.example.dt.yaml' \) +quiet_cmd_yamllint = LINT $(src) + cmd_yamllint = $(find_cmd) | \ + xargs $(DT_SCHEMA_LINT) -f parsable -c $(srctree)/$(src)/.yamllint + +quiet_cmd_chk_bindings = CHKDT $@ + cmd_chk_bindings = $(find_cmd) | \ + xargs -n200 -P$$(nproc) $(DT_DOC_CHECKER) -u $(srctree)/$(src) + quiet_cmd_mk_schema = SCHEMA $@ - cmd_mk_schema = rm -f $@ ; \ + cmd_mk_schema = f=$$(mktemp) ; \ $(if $(DT_MK_SCHEMA_FLAGS), \ echo $(real-prereqs), \ - $(find_cmd)) | \ - xargs $(DT_MK_SCHEMA) $(DT_MK_SCHEMA_FLAGS) >> $@ + $(find_cmd)) > $$f ; \ + $(DT_MK_SCHEMA) -j $(DT_MK_SCHEMA_FLAGS) @$$f > $@ ; \ + rm -f $$f + +define rule_chkdt + $(if $(DT_SCHEMA_LINT),$(call cmd,yamllint),) + $(call cmd,chk_bindings) + $(call cmd,mk_schema) +endef DT_DOCS = $(shell $(find_cmd) | sed -e 's|^$(srctree)/||') @@ -39,33 +55,33 @@ override DTC_FLAGS := \ -Wno-graph_child_address \ -Wno-interrupt_provider -$(obj)/processed-schema-examples.yaml: $(DT_DOCS) check_dtschema_version FORCE - $(call if_changed,mk_schema) +$(obj)/processed-schema-examples.json: $(DT_DOCS) $(src)/.yamllint check_dtschema_version FORCE + $(call if_changed_rule,chkdt) ifeq ($(DT_SCHEMA_FILES),) # Unless DT_SCHEMA_FILES is specified, use the full schema for dtbs_check too. -# Just copy processed-schema-examples.yaml +# Just copy processed-schema-examples.json -$(obj)/processed-schema.yaml: $(obj)/processed-schema-examples.yaml FORCE +$(obj)/processed-schema.json: $(obj)/processed-schema-examples.json FORCE $(call if_changed,copy) DT_SCHEMA_FILES = $(DT_DOCS) else -# If DT_SCHEMA_FILES is specified, use it for processed-schema.yaml +# If DT_SCHEMA_FILES is specified, use it for processed-schema.json -$(obj)/processed-schema.yaml: DT_MK_SCHEMA_FLAGS := -u -$(obj)/processed-schema.yaml: $(DT_SCHEMA_FILES) check_dtschema_version FORCE +$(obj)/processed-schema.json: DT_MK_SCHEMA_FLAGS := -u +$(obj)/processed-schema.json: $(DT_SCHEMA_FILES) check_dtschema_version FORCE $(call if_changed,mk_schema) endif +extra-$(CHECK_DT_BINDING) += processed-schema-examples.json +extra-$(CHECK_DTBS) += processed-schema.json extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dts, $(DT_SCHEMA_FILES)) extra-$(CHECK_DT_BINDING) += $(patsubst $(src)/%.yaml,%.example.dt.yaml, $(DT_SCHEMA_FILES)) -extra-$(CHECK_DT_BINDING) += processed-schema-examples.yaml -extra-$(CHECK_DTBS) += processed-schema.yaml # Hack: avoid 'Argument list too long' error for 'make clean'. Remove most of # build artifacts here before they are processed by scripts/Makefile.clean diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml index ace3fdaa8396a..fe22c66e9c15a 100644 --- a/Documentation/devicetree/bindings/arm/actions.yaml +++ b/Documentation/devicetree/bindings/arm/actions.yaml @@ -11,6 +11,8 @@ maintainers: - Manivannan Sadhasivam properties: + $nodename: + const: "/" compatible: oneOf: # The Actions Semi S500 is a quad-core ARM Cortex-A9 SoC. @@ -18,6 +20,12 @@ properties: - enum: - allo,sparky # Allo.com Sparky - cubietech,cubieboard6 # Cubietech CubieBoard6 + - roseapplepi,roseapplepi # RoseapplePi.org RoseapplePi + - const: actions,s500 + - items: + - enum: + - caninos,labrador-base-m # Labrador Base Board M v1 + - const: caninos,labrador-v2 # Labrador Core v2 - const: actions,s500 - items: - enum: @@ -26,6 +34,11 @@ properties: - const: actions,s500 # The Actions Semi S700 is a quad-core ARM Cortex-A53 SoC. + - items: + - enum: + - caninos,labrador-base-m2 # Labrador Base Board M v2 + - const: caninos,labrador-v3 # Labrador Core v3 + - const: actions,s700 - items: - enum: - cubietech,cubieboard7 # Cubietech CubieBoard7 diff --git a/Documentation/devicetree/bindings/arm/altera.yaml b/Documentation/devicetree/bindings/arm/altera.yaml index b388c5aa79847..0bc5020b75395 100644 --- a/Documentation/devicetree/bindings/arm/altera.yaml +++ b/Documentation/devicetree/bindings/arm/altera.yaml @@ -10,6 +10,8 @@ maintainers: - Dinh Nguyen properties: + $nodename: + const: "/" compatible: items: - enum: diff --git a/Documentation/devicetree/bindings/arm/amlogic.yaml b/Documentation/devicetree/bindings/arm/amlogic.yaml index 5eba9f48823ec..0ee7c5b7b3f66 100644 --- a/Documentation/devicetree/bindings/arm/amlogic.yaml +++ b/Documentation/devicetree/bindings/arm/amlogic.yaml @@ -96,6 +96,7 @@ properties: - hwacom,amazetv - khadas,vim - libretech,aml-s905x-cc + - libretech,aml-s905x-cc-v2 - nexbox,a95x - const: amlogic,s905x - const: amlogic,meson-gxl @@ -153,6 +154,7 @@ properties: - azw,gtking - azw,gtking-pro - hardkernel,odroid-n2 + - hardkernel,odroid-n2-plus - khadas,vim3 - ugoos,am6 - const: amlogic,s922x diff --git a/Documentation/devicetree/bindings/arm/atmel-at91.yaml b/Documentation/devicetree/bindings/arm/atmel-at91.yaml index 31b0c54fa2cfb..614c91956798a 100644 --- a/Documentation/devicetree/bindings/arm/atmel-at91.yaml +++ b/Documentation/devicetree/bindings/arm/atmel-at91.yaml @@ -41,6 +41,7 @@ properties: - overkiz,kizboxmini-mb # Overkiz kizbox Mini Mother Board - overkiz,kizboxmini-rd # Overkiz kizbox Mini RailDIN - overkiz,smartkiz # Overkiz SmartKiz Board + - gardena,smart-gateway-at91sam # GARDENA smart Gateway (Article No. 19000) - const: atmel,at91sam9g25 - const: atmel,at91sam9x5 - const: atmel,at91sam9 diff --git a/Documentation/devicetree/bindings/arm/axxia.yaml b/Documentation/devicetree/bindings/arm/axxia.yaml index 98780a569f224..3ea5f2fdcd96c 100644 --- a/Documentation/devicetree/bindings/arm/axxia.yaml +++ b/Documentation/devicetree/bindings/arm/axxia.yaml @@ -10,6 +10,8 @@ maintainers: - Anders Berg properties: + $nodename: + const: "/" compatible: description: LSI AXM5516 Validation board (Amarillo) items: diff --git a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml index d48313c7ae450..988e0bbb2a628 100644 --- a/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/brcm,bcm4708.yaml @@ -83,6 +83,8 @@ properties: - brcm,bcm953012er - brcm,bcm953012hr - brcm,bcm953012k + - meraki,mr32 - const: brcm,brcm53012 + - const: brcm,brcm53016 - const: brcm,bcm4708 ... diff --git a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml index 6834f5e8df5f0..a2c63c8b1d10b 100644 --- a/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml +++ b/Documentation/devicetree/bindings/arm/bcm/raspberrypi,bcm2835-firmware.yaml @@ -48,12 +48,30 @@ properties: - compatible - "#clock-cells" + reset: + type: object + + properties: + compatible: + const: raspberrypi,firmware-reset + + "#reset-cells": + const: 1 + description: > + The argument is the ID of the firmware reset line to affect. + + required: + - compatible + - "#reset-cells" + additionalProperties: false required: - compatible - mboxes +additionalProperties: false + examples: - | firmware { @@ -64,5 +82,10 @@ examples: compatible = "raspberrypi,firmware-clocks"; #clock-cells = <1>; }; + + reset: reset { + compatible = "raspberrypi,firmware-reset"; + #reset-cells = <1>; + }; }; ... diff --git a/Documentation/devicetree/bindings/arm/bitmain.yaml b/Documentation/devicetree/bindings/arm/bitmain.yaml index 5cd5b36cff2d1..5880083ab8d01 100644 --- a/Documentation/devicetree/bindings/arm/bitmain.yaml +++ b/Documentation/devicetree/bindings/arm/bitmain.yaml @@ -10,6 +10,8 @@ maintainers: - Manivannan Sadhasivam properties: + $nodename: + const: "/" compatible: items: - enum: diff --git a/Documentation/devicetree/bindings/arm/coresight-cti.yaml b/Documentation/devicetree/bindings/arm/coresight-cti.yaml index e42ff69d8bfb4..21e3515491f48 100644 --- a/Documentation/devicetree/bindings/arm/coresight-cti.yaml +++ b/Documentation/devicetree/bindings/arm/coresight-cti.yaml @@ -220,6 +220,8 @@ then: required: - cpu +unevaluatedProperties: false + examples: # minimum CTI definition. DEVID register used to set number of triggers. - | diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 1222bf1831fab..14cd727d3c4b7 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -341,6 +341,8 @@ required: dependencies: rockchip,pmu: [enable-method] +additionalProperties: true + examples: - | cpus { diff --git a/Documentation/devicetree/bindings/arm/digicolor.yaml b/Documentation/devicetree/bindings/arm/digicolor.yaml index d9c80b827e9b9..849e205183392 100644 --- a/Documentation/devicetree/bindings/arm/digicolor.yaml +++ b/Documentation/devicetree/bindings/arm/digicolor.yaml @@ -10,6 +10,8 @@ maintainers: - Baruch Siach properties: + $nodename: + const: "/" compatible: const: cnxt,cx92755 diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.txt deleted file mode 100644 index 75195bee116f6..0000000000000 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.txt +++ /dev/null @@ -1,23 +0,0 @@ -Freescale i.MX7ULP Power Management Components ----------------------------------------------- - -The Multi-System Mode Controller (MSMC) is responsible for sequencing -the MCU into and out of all stop and run power modes. Specifically, it -monitors events to trigger transitions between power modes while -controlling the power, clocks, and memories of the MCU to achieve the -power consumption and functionality of that mode. - -The WFI or WFE instruction is used to invoke a Sleep, Deep Sleep or -Standby modes for either Cortex family. Run, Wait, and Stop are the -common terms used for the primary operating modes of Kinetis -microcontrollers. - -Required properties: -- compatible: Should be "fsl,imx7ulp-smc1". -- reg: Specifies base physical address and size of the register sets. - -Example: -smc1: smc1@40410000 { - compatible = "fsl,imx7ulp-smc1"; - reg = <0x40410000 0x1000>; -}; diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml new file mode 100644 index 0000000000000..3b26040f8f182 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-pm.yaml @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-pm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX7ULP Power Management Components + +maintainers: + - A.s. Dong + +description: | + The Multi-System Mode Controller (MSMC) is responsible for sequencing + the MCU into and out of all stop and run power modes. Specifically, it + monitors events to trigger transitions between power modes while + controlling the power, clocks, and memories of the MCU to achieve the + power consumption and functionality of that mode. + + The WFI or WFE instruction is used to invoke a Sleep, Deep Sleep or + Standby modes for either Cortex family. Run, Wait, and Stop are the + common terms used for the primary operating modes of Kinetis + microcontrollers. + +properties: + compatible: + const: fsl,imx7ulp-smc1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + smc1@40410000 { + compatible = "fsl,imx7ulp-smc1"; + reg = <0x40410000 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt deleted file mode 100644 index 7d0c7f0024017..0000000000000 --- a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.txt +++ /dev/null @@ -1,16 +0,0 @@ -Freescale i.MX7ULP System Integration Module ----------------------------------------------- -The system integration module (SIM) provides system control and chip configuration -registers. In this module, chip revision information is located in JTAG ID register, -and a set of registers have been made available in DGO domain for SW use, with the -objective to maintain its value between system resets. - -Required properties: -- compatible: Should be "fsl,imx7ulp-sim". -- reg: Specifies base physical address and size of the register sets. - -Example: -sim: sim@410a3000 { - compatible = "fsl,imx7ulp-sim", "syscon"; - reg = <0x410a3000 0x1000>; -}; diff --git a/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml new file mode 100644 index 0000000000000..526f508cb98d0 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/freescale/fsl,imx7ulp-sim.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/freescale/fsl,imx7ulp-sim.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX7ULP System Integration Module + +maintainers: + - Anson Huang + +description: | + The system integration module (SIM) provides system control and chip configuration + registers. In this module, chip revision information is located in JTAG ID register, + and a set of registers have been made available in DGO domain for SW use, with the + objective to maintain its value between system resets. + +properties: + compatible: + items: + - const: fsl,imx7ulp-sim + - const: syscon + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + sim@410a3000 { + compatible = "fsl,imx7ulp-sim", "syscon"; + reg = <0x410a3000 0x1000>; + }; diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml b/Documentation/devicetree/bindings/arm/fsl.yaml index 6da9d734cdb74..1ca9dfa8ce9ac 100644 --- a/Documentation/devicetree/bindings/arm/fsl.yaml +++ b/Documentation/devicetree/bindings/arm/fsl.yaml @@ -120,6 +120,7 @@ properties: - fsl,imx6q-sabrelite - fsl,imx6q-sabresd - kontron,imx6q-samx6i # Kontron i.MX6 Dual/Quad SMARC Module + - logicpd,imx6q-logicpd - prt,prti6q # Protonic PRTI6Q board - prt,prtwd2 # Protonic WD2 board - technexion,imx6q-pico-dwarf # TechNexion i.MX6Q Pico-Dwarf @@ -156,6 +157,21 @@ properties: - const: gw,ventana - const: fsl,imx6q + - description: i.MX6Q PHYTEC phyBOARD-Mira + items: + - enum: + - phytec,imx6q-pbac06-emmc # PHYTEC phyBOARD-Mira eMMC RDK + - phytec,imx6q-pbac06-nand # PHYTEC phyBOARD-Mira NAND RDK + - const: phytec,imx6q-pbac06 # PHYTEC phyBOARD-Mira + - const: phytec,imx6qdl-pcm058 # PHYTEC phyCORE-i.MX6 + - const: fsl,imx6q + + - description: i.MX6Q PHYTEC phyFLEX-i.MX6 + items: + - const: phytec,imx6q-pbab01 # PHYTEC phyFLEX carrier board + - const: phytec,imx6q-pfla02 # PHYTEC phyFLEX-i.MX6 Quad + - const: fsl,imx6q + - description: i.MX6QP based Boards items: - enum: @@ -163,6 +179,13 @@ properties: - fsl,imx6qp-sabresd # i.MX6 Quad Plus SABRE Smart Device Board - const: fsl,imx6qp + - description: i.MX6QP PHYTEC phyBOARD-Mira + items: + - const: phytec,imx6qp-pbac06-nand + - const: phytec,imx6qp-pbac06 # PHYTEC phyBOARD-Mira + - const: phytec,imx6qdl-pcm058 # PHYTEC phyCORE-i.MX6 + - const: fsl,imx6qp + - description: i.MX6DL based Boards items: - enum: @@ -188,6 +211,7 @@ properties: - toradex,colibri_imx6dl-v1_1-eval-v3 # Colibri iMX6 Module V1.1 on Colibri Evaluation Board V3 - ysoft,imx6dl-yapp4-draco # i.MX6 DualLite Y Soft IOTA Draco board - ysoft,imx6dl-yapp4-hydra # i.MX6 DualLite Y Soft IOTA Hydra board + - ysoft,imx6dl-yapp4-orion # i.MX6 DualLite Y Soft IOTA Orion board - ysoft,imx6dl-yapp4-ursa # i.MX6 Solo Y Soft IOTA Ursa board - const: fsl,imx6dl @@ -211,10 +235,26 @@ properties: - const: gw,ventana - const: fsl,imx6dl + - description: i.MX6DL PHYTEC phyBOARD-Mira + items: + - enum: + - phytec,imx6dl-pbac06-emmc # PHYTEC phyBOARD-Mira eMMC RDK + - phytec,imx6dl-pbac06-nand # PHYTEC phyBOARD-Mira NAND RDK + - const: phytec,imx6dl-pbac06 # PHYTEC phyBOARD-Mira + - const: phytec,imx6qdl-pcm058 # PHYTEC phyCORE-i.MX6 + - const: fsl,imx6dl + + - description: i.MX6DL PHYTEC phyFLEX-i.MX6 + items: + - const: phytec,imx6dl-pbab01 # PHYTEC phyFLEX carrier board + - const: phytec,imx6dl-pfla02 # PHYTEC phyFLEX-i.MX6 Quad + - const: fsl,imx6dl + - description: i.MX6SL based Boards items: - enum: - fsl,imx6sl-evk # i.MX6 SoloLite EVK Board + - kobo,tolino-shine2hd - kobo,tolino-shine3 - const: fsl,imx6sl @@ -246,6 +286,15 @@ properties: - technexion,imx6ul-pico-pi # TechNexion i.MX6UL Pico-Pi - const: fsl,imx6ul + - description: i.MX6UL PHYTEC phyBOARD-Segin + items: + - enum: + - phytec,imx6ul-pbacd10-emmc + - phytec,imx6ul-pbacd10-nand + - const: phytec,imx6ul-pbacd10 # PHYTEC phyBOARD-Segin with i.MX6 UL + - const: phytec,imx6ul-pcl063 # PHYTEC phyCORE-i.MX 6UL + - const: fsl,imx6ul + - description: Kontron N6310 S Board items: - const: kontron,imx6ul-n6310-s @@ -277,6 +326,15 @@ properties: - toradex,colibri-imx6ull-wifi-eval # Colibri iMX6ULL Wi-Fi / BT Module on Colibri Eval Board - const: fsl,imx6ull + - description: i.MX6ULL PHYTEC phyBOARD-Segin + items: + - enum: + - phytec,imx6ull-pbacd10-emmc + - phytec,imx6ull-pbacd10-nand + - const: phytec,imx6ull-pbacd10 # PHYTEC phyBOARD-Segin with i.MX6 ULL + - const: phytec,imx6ull-pcl063 # PHYTEC phyCORE-i.MX 6ULL + - const: fsl,imx6ull + - description: Kontron N6411 S Board items: - const: kontron,imx6ull-n6411-s @@ -344,7 +402,16 @@ properties: - description: i.MX8MM based Boards items: - enum: + - beacon,imx8mm-beacon-kit # i.MX8MM Beacon Development Kit + - fsl,imx8mm-ddr4-evk # i.MX8MM DDR4 EVK Board - fsl,imx8mm-evk # i.MX8MM EVK Board + - variscite,var-som-mx8mm # i.MX8MM Variscite VAR-SOM-MX8MM module + - const: fsl,imx8mm + + - description: Variscite VAR-SOM-MX8MM based boards + items: + - const: variscite,var-som-mx8mm-symphony + - const: variscite,var-som-mx8mm - const: fsl,imx8mm - description: i.MX8MN based Boards @@ -354,6 +421,12 @@ properties: - fsl,imx8mn-evk # i.MX8MN LPDDR4 EVK Board - const: fsl,imx8mn + - description: Variscite VAR-SOM-MX8MN based boards + items: + - const: variscite,var-som-mx8mn-symphony + - const: variscite,var-som-mx8mn + - const: fsl,imx8mn + - description: i.MX8MP based Boards items: - enum: @@ -372,13 +445,35 @@ properties: - technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk - const: fsl,imx8mq + - description: Purism Librem5 phones + items: + - enum: + - purism,librem5r2 # Purism Librem5 phone "Chestnut" + - purism,librem5r3 # Purism Librem5 phone "Dogwood" + - const: purism,librem5 + - const: fsl,imx8mq + + - description: Zodiac Inflight Innovations Ultra Boards + items: + - enum: + - zii,imx8mq-ultra-rmb3 + - zii,imx8mq-ultra-zest + - const: zii,imx8mq-ultra + - const: fsl,imx8mq + - description: i.MX8QXP based Boards items: - enum: - einfochips,imx8qxp-ai_ml # i.MX8QXP AI_ML Board - fsl,imx8qxp-mek # i.MX8QXP MEK Board - toradex,colibri-imx8x # Colibri iMX8X Module + - const: fsl,imx8qxp + + - description: Toradex Colibri i.MX8 Evaluation Board + items: + - enum: - toradex,colibri-imx8x-eval-v3 # Colibri iMX8X Module on Colibri Evaluation Board V3 + - const: toradex,colibri-imx8x - const: fsl,imx8qxp - description: diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml new file mode 100644 index 0000000000000..528dad4cde3cd --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/cpuctrl.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/cpuctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon CPU controller + +maintainers: + - Wei Xu + +description: | + The clock registers and power registers of secondary cores are defined + in CPU controller, especially in HIX5HD2 SoC. + +properties: + compatible: + items: + - const: hisilicon,cpuctrl + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +required: + - compatible + - reg + +additionalProperties: + type: object + +examples: + - | + cpuctrl@a22000 { + compatible = "hisilicon,cpuctrl"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x00a22000 0x2000>; + ranges = <0 0x00a22000 0x2000>; + + clock: clock@0 { + compatible = "hisilicon,hix5hd2-clock"; + reg = <0 0x2000>; + #clock-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hi3798cv200-perictrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi3798cv200-perictrl.yaml new file mode 100644 index 0000000000000..cba1937aad9a8 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi3798cv200-perictrl.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hi3798cv200-perictrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Hi3798CV200 Peripheral Controller + +maintainers: + - Wei Xu + +description: | + The Hi3798CV200 Peripheral Controller controls peripherals, queries + their status, and configures some functions of peripherals. + +properties: + compatible: + items: + - const: hisilicon,hi3798cv200-perictrl + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + +additionalProperties: + type: object + +examples: + - | + peripheral-controller@8a20000 { + compatible = "hisilicon,hi3798cv200-perictrl", "syscon", "simple-mfd"; + reg = <0x8a20000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x0 0x8a20000 0x1000>; + + phy@850 { + compatible = "hisilicon,hi3798cv200-combphy"; + reg = <0x850 0x8>; + #phy-cells = <1>; + clocks = <&crg 42>; + resets = <&crg 0x188 4>; + assigned-clocks = <&crg 42>; + assigned-clock-rates = <100000000>; + hisilicon,fixed-mode = <4>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml new file mode 100644 index 0000000000000..6ea6d7ee7a14f --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hi6220-domain-ctrl.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hi6220-domain-ctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Hi6220 domain controller + +maintainers: + - Wei Xu + +description: | + Hisilicon designs some special domain controllers for mobile platform, + such as: the power Always On domain controller, the Media domain + controller(e.g. codec, G3D ...) and the Power Management domain + controller. + + The compatible names of each domain controller are as follows: + Power Always ON domain controller --> hisilicon,hi6220-aoctrl + Media domain controller --> hisilicon,hi6220-mediactrl + Power Management domain controller --> hisilicon,hi6220-pmctrl + +properties: + compatible: + items: + - enum: + - hisilicon,hi6220-aoctrl + - hisilicon,hi6220-mediactrl + - hisilicon,hi6220-pmctrl + - const: syscon + + reg: + maxItems: 1 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + +required: + - compatible + - reg + - '#clock-cells' + +additionalProperties: false + +examples: + - | + ao_ctrl@f7800000 { + compatible = "hisilicon,hi6220-aoctrl", "syscon"; + reg = <0xf7800000 0x2000>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + + media_ctrl@f4410000 { + compatible = "hisilicon,hi6220-mediactrl", "syscon"; + reg = <0xf4410000 0x1000>; + #clock-cells = <1>; + }; + + pm_ctrl@f7032000 { + compatible = "hisilicon,hi6220-pmctrl", "syscon"; + reg = <0xf7032000 0x1000>; + #clock-cells = <1>; + }; +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml new file mode 100644 index 0000000000000..7378159e61df9 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-bootwrapper.yaml @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hip04-bootwrapper.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Bootwrapper boot method + +maintainers: + - Wei Xu + +description: Bootwrapper boot method (software protocol on SMP) + +properties: + compatible: + items: + - const: hisilicon,hip04-bootwrapper + + boot-method: + description: | + Address and size of boot method. + [0]: bootwrapper physical address + [1]: bootwrapper size + [2]: relocation physical address + [3]: relocation size + minItems: 1 + maxItems: 2 + +required: + - compatible + - boot-method + +additionalProperties: false +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-fabric.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-fabric.yaml new file mode 100644 index 0000000000000..60c516a04ad58 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/hip04-fabric.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/hip04-fabric.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Fabric controller + +maintainers: + - Wei Xu + +description: Hisilicon Fabric controller + +properties: + compatible: + items: + - const: hisilicon,hip04-fabric + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/pctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/pctrl.yaml new file mode 100644 index 0000000000000..6d50658728092 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/pctrl.yaml @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/pctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Peripheral misc control register + +maintainers: + - Wei Xu + +description: Peripheral misc control register + +properties: + compatible: + items: + - const: hisilicon,pctrl + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pctrl@fca09000 { + compatible = "hisilicon,pctrl"; + reg = <0xfca09000 0x1000>; + }; +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml new file mode 100644 index 0000000000000..5a53d433b6f08 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/controller/sysctrl.yaml @@ -0,0 +1,132 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/controller/sysctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon system controller + +maintainers: + - Wei Xu + +description: | + The Hisilicon system controller is used on many Hisilicon boards, it can be + used to assist the slave core startup, reboot the system, etc. + + There are some variants of the Hisilicon system controller, such as HiP01, + Hi3519, Hi6220 system controller, each of them is mostly compatible with the + Hisilicon system controller, but some same registers located at different + offset. In addition, the HiP01 system controller has some specific control + registers for HIP01 SoC family, such as slave core boot. + + The compatible names of each system controller are as follows: + Hisilicon system controller --> hisilicon,sysctrl + HiP01 system controller --> hisilicon,hip01-sysctrl + Hi6220 system controller --> hisilicon,hi6220-sysctrl + Hi3519 system controller --> hisilicon,hi3519-sysctrl + +allOf: + - if: + properties: + compatible: + contains: + const: hisilicon,hi6220-sysctrl + then: + required: + - '#clock-cells' + +properties: + compatible: + oneOf: + - items: + - enum: + - hisilicon,sysctrl + - hisilicon,hi6220-sysctrl + - hisilicon,hi3519-sysctrl + - const: syscon + - items: + - const: hisilicon,hip01-sysctrl + - const: hisilicon,sysctrl + + reg: + maxItems: 1 + + smp-offset: + description: | + offset in sysctrl for notifying slave cpu booting + cpu 1, reg; + cpu 2, reg + 0x4; + cpu 3, reg + 0x8; + If reg value is not zero, cpun exit wfi and go + $ref: /schemas/types.yaml#/definitions/uint32 + + resume-offset: + description: offset in sysctrl for notifying cpu0 when resume + $ref: /schemas/types.yaml#/definitions/uint32 + + reboot-offset: + description: offset in sysctrl for system reboot + $ref: /schemas/types.yaml#/definitions/uint32 + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + + ranges: true + +required: + - compatible + - reg + +additionalProperties: + type: object + +examples: + - | + /* Hisilicon system controller */ + system-controller@802000 { + compatible = "hisilicon,sysctrl", "syscon"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x802000 0x1000>; + reg = <0x802000 0x1000>; + + smp-offset = <0x31c>; + resume-offset = <0x308>; + reboot-offset = <0x4>; + + clock: clock@0 { + compatible = "hisilicon,hi3620-clock"; + reg = <0 0x10000>; + #clock-cells = <1>; + }; + }; + + /* HiP01 system controller */ + system-controller@10000000 { + compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl"; + reg = <0x10000000 0x1000>; + reboot-offset = <0x4>; + }; + + /* Hi6220 system controller */ + system-controller@f7030000 { + compatible = "hisilicon,hi6220-sysctrl", "syscon"; + reg = <0xf7030000 0x2000>; + #clock-cells = <1>; + }; + + /* Hi3519 system controller */ + system-controller@12010000 { + compatible = "hisilicon,hi3519-sysctrl", "syscon"; + reg = <0x12010000 0x1000>; + }; +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt b/Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt deleted file mode 100644 index 8defacc44dd5b..0000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/hi3519-sysctrl.txt +++ /dev/null @@ -1,14 +0,0 @@ -* Hisilicon Hi3519 System Controller Block - -This bindings use the following binding: -Documentation/devicetree/bindings/mfd/syscon.yaml - -Required properties: -- compatible: "hisilicon,hi3519-sysctrl". -- reg: the register region of this block - -Examples: -sysctrl: system-controller@12010000 { - compatible = "hisilicon,hi3519-sysctrl", "syscon"; - reg = <0x12010000 0x1000>; -}; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt deleted file mode 100644 index 10bd35f9207f2..0000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon-low-pin-count.txt +++ /dev/null @@ -1,33 +0,0 @@ -Hisilicon Hip06 Low Pin Count device - Hisilicon Hip06 SoCs implement a Low Pin Count (LPC) controller, which - provides I/O access to some legacy ISA devices. - Hip06 is based on arm64 architecture where there is no I/O space. So, the - I/O ports here are not CPU addresses, and there is no 'ranges' property in - LPC device node. - -Required properties: -- compatible: value should be as follows: - (a) "hisilicon,hip06-lpc" - (b) "hisilicon,hip07-lpc" -- #address-cells: must be 2 which stick to the ISA/EISA binding doc. -- #size-cells: must be 1 which stick to the ISA/EISA binding doc. -- reg: base memory range where the LPC register set is mapped. - -Note: - The node name before '@' must be "isa" to represent the binding stick to the - ISA/EISA binding specification. - -Example: - -isa@a01b0000 { - compatible = "hisilicon,hip06-lpc"; - #address-cells = <2>; - #size-cells = <1>; - reg = <0x0 0xa01b0000 0x0 0x1000>; - - ipmi0: bt@e4 { - compatible = "ipmi-bt"; - device_type = "ipmi"; - reg = <0x01 0xe4 0x04>; - }; -}; diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt deleted file mode 100644 index a97f643e7d1c7..0000000000000 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +++ /dev/null @@ -1,319 +0,0 @@ -Hisilicon Platforms Device Tree Bindings ----------------------------------------------------- -Hi3660 SoC -Required root node properties: - - compatible = "hisilicon,hi3660"; - -HiKey960 Board -Required root node properties: - - compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; - -Hi3670 SoC -Required root node properties: - - compatible = "hisilicon,hi3670"; - -HiKey970 Board -Required root node properties: - - compatible = "hisilicon,hi3670-hikey970", "hisilicon,hi3670"; - -Hi3798cv200 SoC -Required root node properties: - - compatible = "hisilicon,hi3798cv200"; - -Hi3798cv200 Poplar Board -Required root node properties: - - compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200"; - -Hi4511 Board -Required root node properties: - - compatible = "hisilicon,hi3620-hi4511"; - -Hi6220 SoC -Required root node properties: - - compatible = "hisilicon,hi6220"; - -HiKey Board -Required root node properties: - - compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220"; - -HiP01 ca9x2 Board -Required root node properties: - - compatible = "hisilicon,hip01-ca9x2"; - -HiP04 D01 Board -Required root node properties: - - compatible = "hisilicon,hip04-d01"; - -HiP05 D02 Board -Required root node properties: - - compatible = "hisilicon,hip05-d02"; - -HiP06 D03 Board -Required root node properties: - - compatible = "hisilicon,hip06-d03"; - -HiP07 D05 Board -Required root node properties: - - compatible = "hisilicon,hip07-d05"; - -Hisilicon system controller - -Required properties: -- compatible : "hisilicon,sysctrl" -- reg : Register address and size - -Optional properties: -- smp-offset : offset in sysctrl for notifying slave cpu booting - cpu 1, reg; - cpu 2, reg + 0x4; - cpu 3, reg + 0x8; - If reg value is not zero, cpun exit wfi and go -- resume-offset : offset in sysctrl for notifying cpu0 when resume -- reboot-offset : offset in sysctrl for system reboot - -Example: - - /* for Hi3620 */ - sysctrl: system-controller@fc802000 { - compatible = "hisilicon,sysctrl"; - reg = <0xfc802000 0x1000>; - smp-offset = <0x31c>; - resume-offset = <0x308>; - reboot-offset = <0x4>; - }; - ------------------------------------------------------------------------ -Hisilicon Hi3798CV200 Peripheral Controller - -The Hi3798CV200 Peripheral Controller controls peripherals, queries -their status, and configures some functions of peripherals. - -Required properties: -- compatible: Should contain "hisilicon,hi3798cv200-perictrl", "syscon" - and "simple-mfd". -- reg: Register address and size of Peripheral Controller. -- #address-cells: Should be 1. -- #size-cells: Should be 1. - -Examples: - - perictrl: peripheral-controller@8a20000 { - compatible = "hisilicon,hi3798cv200-perictrl", "syscon", - "simple-mfd"; - reg = <0x8a20000 0x1000>; - #address-cells = <1>; - #size-cells = <1>; - }; - ------------------------------------------------------------------------ -Hisilicon Hi6220 system controller - -Required properties: -- compatible : "hisilicon,hi6220-sysctrl" -- reg : Register address and size -- #clock-cells: should be set to 1, many clock registers are defined - under this controller and this property must be present. - -Hisilicon designs this controller as one of the system controllers, -its main functions are the same as Hisilicon system controller, but -the register offset of some core modules are different. - -Example: - /*for Hi6220*/ - sys_ctrl: sys_ctrl@f7030000 { - compatible = "hisilicon,hi6220-sysctrl", "syscon"; - reg = <0x0 0xf7030000 0x0 0x2000>; - #clock-cells = <1>; - }; - - -Hisilicon Hi6220 Power Always ON domain controller - -Required properties: -- compatible : "hisilicon,hi6220-aoctrl" -- reg : Register address and size -- #clock-cells: should be set to 1, many clock registers are defined - under this controller and this property must be present. - -Hisilicon designs this system controller to control the power always -on domain for mobile platform. - -Example: - /*for Hi6220*/ - ao_ctrl: ao_ctrl@f7800000 { - compatible = "hisilicon,hi6220-aoctrl", "syscon"; - reg = <0x0 0xf7800000 0x0 0x2000>; - #clock-cells = <1>; - }; - - -Hisilicon Hi6220 Media domain controller - -Required properties: -- compatible : "hisilicon,hi6220-mediactrl" -- reg : Register address and size -- #clock-cells: should be set to 1, many clock registers are defined - under this controller and this property must be present. - -Hisilicon designs this system controller to control the multimedia -domain(e.g. codec, G3D ...) for mobile platform. - -Example: - /*for Hi6220*/ - media_ctrl: media_ctrl@f4410000 { - compatible = "hisilicon,hi6220-mediactrl", "syscon"; - reg = <0x0 0xf4410000 0x0 0x1000>; - #clock-cells = <1>; - }; - - -Hisilicon Hi6220 Power Management domain controller - -Required properties: -- compatible : "hisilicon,hi6220-pmctrl" -- reg : Register address and size -- #clock-cells: should be set to 1, some clock registers are define - under this controller and this property must be present. - -Hisilicon designs this system controller to control the power management -domain for mobile platform. - -Example: - /*for Hi6220*/ - pm_ctrl: pm_ctrl@f7032000 { - compatible = "hisilicon,hi6220-pmctrl", "syscon"; - reg = <0x0 0xf7032000 0x0 0x1000>; - #clock-cells = <1>; - }; - - -Hisilicon Hi6220 SRAM controller - -Required properties: -- compatible : "hisilicon,hi6220-sramctrl", "syscon" -- reg : Register address and size - -Hisilicon's SoCs use sram for multiple purpose; on Hi6220 there have several -SRAM banks for power management, modem, security, etc. Further, use "syscon" -managing the common sram which can be shared by multiple modules. - -Example: - /*for Hi6220*/ - sram: sram@fff80000 { - compatible = "hisilicon,hi6220-sramctrl", "syscon"; - reg = <0x0 0xfff80000 0x0 0x12000>; - }; - ------------------------------------------------------------------------ -Hisilicon HiP01 system controller - -Required properties: -- compatible : "hisilicon,hip01-sysctrl" -- reg : Register address and size - -The HiP01 system controller is mostly compatible with hisilicon -system controller,but it has some specific control registers for -HIP01 SoC family, such as slave core boot, and also some same -registers located at different offset. - -Example: - - /* for hip01-ca9x2 */ - sysctrl: system-controller@10000000 { - compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl"; - reg = <0x10000000 0x1000>; - reboot-offset = <0x4>; - }; - ------------------------------------------------------------------------ -Hisilicon HiP05/HiP06 PCIe-SAS sub system controller - -Required properties: -- compatible : "hisilicon,pcie-sas-subctrl", "syscon"; -- reg : Register address and size - -The PCIe-SAS sub system controller is shared by PCIe and SAS controllers in -HiP05 or HiP06 Soc to implement some basic configurations. - -Example: - /* for HiP05 PCIe-SAS sub system */ - pcie_sas: system_controller@b0000000 { - compatible = "hisilicon,pcie-sas-subctrl", "syscon"; - reg = <0xb0000000 0x10000>; - }; - -Hisilicon HiP05/HiP06 PERI sub system controller - -Required properties: -- compatible : "hisilicon,peri-subctrl", "syscon"; -- reg : Register address and size - -The PERI sub system controller is shared by peripheral controllers in -HiP05 or HiP06 Soc to implement some basic configurations. The peripheral -controllers include mdio, ddr, iic, uart, timer and so on. - -Example: - /* for HiP05 sub peri system */ - peri_c_subctrl: syscon@80000000 { - compatible = "hisilicon,peri-subctrl", "syscon"; - reg = <0x0 0x80000000 0x0 0x10000>; - }; - -Hisilicon HiP05/HiP06 DSA sub system controller - -Required properties: -- compatible : "hisilicon,dsa-subctrl", "syscon"; -- reg : Register address and size - -The DSA sub system controller is shared by peripheral controllers in -HiP05 or HiP06 Soc to implement some basic configurations. - -Example: - /* for HiP05 dsa sub system */ - pcie_sas: system_controller@a0000000 { - compatible = "hisilicon,dsa-subctrl", "syscon"; - reg = <0xa0000000 0x10000>; - }; - ------------------------------------------------------------------------ -Hisilicon CPU controller - -Required properties: -- compatible : "hisilicon,cpuctrl" -- reg : Register address and size - -The clock registers and power registers of secondary cores are defined -in CPU controller, especially in HIX5HD2 SoC. - ------------------------------------------------------------------------ -PCTRL: Peripheral misc control register - -Required Properties: -- compatible: "hisilicon,pctrl" -- reg: Address and size of pctrl. - -Example: - - /* for Hi3620 */ - pctrl: pctrl@fca09000 { - compatible = "hisilicon,pctrl"; - reg = <0xfca09000 0x1000>; - }; - ------------------------------------------------------------------------ -Fabric: - -Required Properties: -- compatible: "hisilicon,hip04-fabric"; -- reg: Address and size of Fabric - ------------------------------------------------------------------------ -Bootwrapper boot method (software protocol on SMP): - -Required Properties: -- compatible: "hisilicon,hip04-bootwrapper"; -- boot-method: Address and size of boot method. - [0]: bootwrapper physical address - [1]: bootwrapper size - [2]: relocation physical address - [3]: relocation size diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml new file mode 100644 index 0000000000000..43b8ce2227aaa --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/hisilicon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Platforms Device Tree Bindings + +maintainers: + - Wei Xu + +properties: + $nodename: + const: '/' + + compatible: + oneOf: + - description: Hi3660 based boards. + items: + - const: hisilicon,hi3660-hikey960 + - const: hisilicon,hi3660 + + - description: Hi3670 based boards. + items: + - const: hisilicon,hi3670-hikey970 + - const: hisilicon,hi3670 + + - description: Hi3798cv200 based boards. + items: + - const: hisilicon,hi3798cv200-poplar + - const: hisilicon,hi3798cv200 + + - description: Hi4511 Board + items: + - const: hisilicon,hi3620-hi4511 + + - description: Hi6220 based boards. + items: + - const: hisilicon,hi6220-hikey + - const: hisilicon,hi6220 + + - description: HiP01 based boards. + items: + - const: hisilicon,hip01-ca9x2 + - const: hisilicon,hip01 + + - description: HiP04 D01 Board + items: + - const: hisilicon,hip04-d01 + + - description: HiP05 D02 Board + items: + - const: hisilicon,hip05-d02 + + - description: HiP06 D03 Board + items: + - const: hisilicon,hip06-d03 + + - description: HiP07 D05 Board + items: + - const: hisilicon,hip07-d05 + + - description: SD5203 based boards + items: + - const: H836ASDJ + - const: hisilicon,sd5203 +... diff --git a/Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml b/Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml new file mode 100644 index 0000000000000..3b36e683bb151 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/hisilicon/low-pin-count.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/hisilicon/low-pin-count.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon HiP06 Low Pin Count device + +maintainers: + - Wei Xu + +description: | + Hisilicon HiP06 SoCs implement a Low Pin Count (LPC) controller, which + provides I/O access to some legacy ISA devices. + HiP06 is based on arm64 architecture where there is no I/O space. So, the + I/O ports here are not CPU addresses, and there is no 'ranges' property in + LPC device node. + +properties: + $nodename: + pattern: '^isa@[0-9a-f]+$' + description: | + The node name before '@' must be "isa" to represent the binding stick + to the ISA/EISA binding specification. + + compatible: + enum: + - hisilicon,hip06-lpc + - hisilicon,hip07-lpc + + reg: + maxItems: 1 + + '#address-cells': + const: 2 + + '#size-cells': + const: 1 + +required: + - compatible + - reg + +additionalProperties: + type: object + +examples: + - | + isa@a01b0000 { + compatible = "hisilicon,hip06-lpc"; + #address-cells = <2>; + #size-cells = <1>; + reg = <0xa01b0000 0x1000>; + + ipmi0: bt@e4 { + compatible = "ipmi-bt"; + device_type = "ipmi"; + reg = <0x01 0xe4 0x04>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml b/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml index f4f7451e5e8a7..f18302efb90ea 100644 --- a/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml +++ b/Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml @@ -10,6 +10,8 @@ maintainers: - Linus Walleij properties: + $nodename: + const: "/" compatible: oneOf: - items: diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt index bd7a0fa5801bb..ea827e8763de1 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt @@ -15,6 +15,7 @@ Required Properties: - "mediatek,mt7623-apmixedsys", "mediatek,mt2701-apmixedsys" - "mediatek,mt7629-apmixedsys" - "mediatek,mt8135-apmixedsys" + - "mediatek,mt8167-apmixedsys", "syscon" - "mediatek,mt8173-apmixedsys" - "mediatek,mt8183-apmixedsys", "syscon" - "mediatek,mt8516-apmixedsys" diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt index 38309db115f53..b32d374193c74 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,audsys.txt @@ -11,6 +11,7 @@ Required Properties: - "mediatek,mt6779-audio", "syscon" - "mediatek,mt7622-audsys", "syscon" - "mediatek,mt7623-audsys", "mediatek,mt2701-audsys", "syscon" + - "mediatek,mt8167-audiosys", "syscon" - "mediatek,mt8183-audiosys", "syscon" - "mediatek,mt8516-audsys", "syscon" - #clock-cells: Must be 1 diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt index 1e1f00718a7d6..dce4c92419325 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt @@ -12,6 +12,7 @@ Required Properties: - "mediatek,mt6779-imgsys", "syscon" - "mediatek,mt6797-imgsys", "syscon" - "mediatek,mt7623-imgsys", "mediatek,mt2701-imgsys", "syscon" + - "mediatek,mt8167-imgsys", "syscon" - "mediatek,mt8173-imgsys", "syscon" - "mediatek,mt8183-imgsys", "syscon" - #clock-cells: Must be 1 diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt index 49a968be1a808..eb3523c7a7bea 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,infracfg.txt @@ -16,6 +16,7 @@ Required Properties: - "mediatek,mt7623-infracfg", "mediatek,mt2701-infracfg", "syscon" - "mediatek,mt7629-infracfg", "syscon" - "mediatek,mt8135-infracfg", "syscon" + - "mediatek,mt8167-infracfg", "syscon" - "mediatek,mt8173-infracfg", "syscon" - "mediatek,mt8183-infracfg", "syscon" - "mediatek,mt8516-infracfg", "syscon" diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt index ad5f9d2f68183..054424fb64b4e 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mfgcfg.txt @@ -8,6 +8,7 @@ Required Properties: - compatible: Should be one of: - "mediatek,mt2712-mfgcfg", "syscon" - "mediatek,mt6779-mfgcfg", "syscon" + - "mediatek,mt8167-mfgcfg", "syscon" - "mediatek,mt8183-mfgcfg", "syscon" - #clock-cells: Must be 1 diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml index 1af30174b2d05..8723dfe34babe 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,pericfg.yaml @@ -47,6 +47,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | pericfg@10003000 { diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt index 9b0394cbbdc91..5ce7578cf2740 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,topckgen.txt @@ -15,6 +15,7 @@ Required Properties: - "mediatek,mt7623-topckgen", "mediatek,mt2701-topckgen" - "mediatek,mt7629-topckgen" - "mediatek,mt8135-topckgen" + - "mediatek,mt8167-topckgen", "syscon" - "mediatek,mt8173-topckgen" - "mediatek,mt8183-topckgen", "syscon" - "mediatek,mt8516-topckgen" diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt index 7894558b7a1c3..98195169176a0 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,vdecsys.txt @@ -11,6 +11,7 @@ Required Properties: - "mediatek,mt6779-vdecsys", "syscon" - "mediatek,mt6797-vdecsys", "syscon" - "mediatek,mt7623-vdecsys", "mediatek,mt2701-vdecsys", "syscon" + - "mediatek,mt8167-vdecsys", "syscon" - "mediatek,mt8173-vdecsys", "syscon" - "mediatek,mt8183-vdecsys", "syscon" - #clock-cells: Must be 1 diff --git a/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml index 1043e4be4fcae..c9675c4cdc1bd 100644 --- a/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml +++ b/Documentation/devicetree/bindings/arm/nvidia,tegra194-ccplex.yaml @@ -30,6 +30,8 @@ properties: Specifies the bpmp node that needs to be queried to get operating point data for all CPUs. +additionalProperties: true + examples: - | cpus { diff --git a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt index fcd3456afbbe3..42db138e091a1 100644 --- a/Documentation/devicetree/bindings/arm/omap/prm-inst.txt +++ b/Documentation/devicetree/bindings/arm/omap/prm-inst.txt @@ -18,6 +18,7 @@ Required properties: (base address and length) Optional properties: +- #power-domain-cells: Should be 0 if the instance is a power domain provider. - #reset-cells: Should be 1 if the PRM instance in question supports resets. Example: @@ -25,5 +26,6 @@ Example: prm_dsp2: prm@1b00 { compatible = "ti,dra7-prm-inst", "ti,omap-prm-inst"; reg = <0x1b00 0x40>; + #power-domain-cells = <0>; #reset-cells = <1>; }; diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml index 97df36d301c93..693ef3f185a8d 100644 --- a/Documentation/devicetree/bindings/arm/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/pmu.yaml @@ -93,4 +93,6 @@ properties: required: - compatible +additionalProperties: false + ... diff --git a/Documentation/devicetree/bindings/arm/primecell.yaml b/Documentation/devicetree/bindings/arm/primecell.yaml index 5aae37f1c5638..e15fe00aafb2c 100644 --- a/Documentation/devicetree/bindings/arm/primecell.yaml +++ b/Documentation/devicetree/bindings/arm/primecell.yaml @@ -33,4 +33,7 @@ properties: contains: const: apb_pclk additionalItems: true + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 6031aee0f5a86..ad25deba4d863 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -40,6 +40,7 @@ description: | sdm630 sdm660 sdm845 + sm8250 The 'board' element must be one of the following strings: @@ -47,6 +48,8 @@ description: | cp01-c1 dragonboard hk01 + hk10-c1 + hk10-c2 idp liquid mtp @@ -73,6 +76,8 @@ description: | foundry 2. properties: + $nodename: + const: "/" compatible: oneOf: - items: @@ -148,6 +153,8 @@ properties: - items: - enum: - qcom,ipq8074-hk01 + - qcom,ipq8074-hk10-c1 + - qcom,ipq8074-hk10-c2 - const: qcom,ipq8074 - items: @@ -165,4 +172,10 @@ properties: - qcom,ipq6018-cp01-c1 - const: qcom,ipq6018 + - items: + - enum: + - qcom,qrb5165-rb5 + - qcom,sm8250-mtp + - const: qcom,sm8250 + ... diff --git a/Documentation/devicetree/bindings/arm/rda.yaml b/Documentation/devicetree/bindings/arm/rda.yaml index 51cec2b63b04f..9672aa0c760d1 100644 --- a/Documentation/devicetree/bindings/arm/rda.yaml +++ b/Documentation/devicetree/bindings/arm/rda.yaml @@ -10,6 +10,8 @@ maintainers: - Manivannan Sadhasivam properties: + $nodename: + const: "/" compatible: items: - enum: diff --git a/Documentation/devicetree/bindings/arm/renesas.yaml b/Documentation/devicetree/bindings/arm/renesas.yaml index 0d4dabb4a1646..01a6d0c571ad5 100644 --- a/Documentation/devicetree/bindings/arm/renesas.yaml +++ b/Documentation/devicetree/bindings/arm/renesas.yaml @@ -281,6 +281,18 @@ properties: - renesas,draak # Draak (RTP0RC77995SEB0010S) - const: renesas,r8a77995 + - description: R-Car V3U (R8A779A0) + items: + - enum: + - renesas,falcon-cpu # Falcon CPU board (RTP0RC779A0CPB0010S) + - const: renesas,r8a779a0 + + - items: + - enum: + - renesas,falcon-breakout # Falcon BreakOut board (RTP0RC779A0BOB0010S) + - const: renesas,falcon-cpu + - const: renesas,r8a779a0 + - description: RZ/N1D (R9A06G032) items: - enum: diff --git a/Documentation/devicetree/bindings/arm/rockchip.yaml b/Documentation/devicetree/bindings/arm/rockchip.yaml index db2e357967952..65b4cc2c63f7c 100644 --- a/Documentation/devicetree/bindings/arm/rockchip.yaml +++ b/Documentation/devicetree/bindings/arm/rockchip.yaml @@ -104,6 +104,11 @@ properties: - firefly,roc-rk3399-pc-mezzanine - const: rockchip,rk3399 + - description: FriendlyElec NanoPi R2S + items: + - const: friendlyarm,nanopi-r2s + - const: rockchip,rk3328 + - description: FriendlyElec NanoPi4 series boards items: - enum: @@ -430,8 +435,12 @@ properties: - const: radxa,rock - const: rockchip,rk3188 - - description: Radxa ROCK Pi 4 + - description: Radxa ROCK Pi 4A/B/C items: + - enum: + - radxa,rockpi4a + - radxa,rockpi4b + - radxa,rockpi4c - const: radxa,rockpi4 - const: rockchip,rk3399 @@ -555,4 +564,9 @@ properties: items: - const: tronsmart,orion-r68-meta - const: rockchip,rk3368 + + - description: Zkmagic A95X Z2 + items: + - const: zkmagic,a95x-z2 + - const: rockchip,rk3318 ... diff --git a/Documentation/devicetree/bindings/arm/samsung/pmu.yaml b/Documentation/devicetree/bindings/arm/samsung/pmu.yaml index c9651892710eb..17678d9686c17 100644 --- a/Documentation/devicetree/bindings/arm/samsung/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/samsung/pmu.yaml @@ -24,6 +24,7 @@ select: - samsung,exynos5420-pmu - samsung,exynos5433-pmu - samsung,exynos7-pmu + - samsung-s5pv210-pmu required: - compatible @@ -40,11 +41,15 @@ properties: - samsung,exynos5420-pmu - samsung,exynos5433-pmu - samsung,exynos7-pmu + - samsung-s5pv210-pmu - const: syscon reg: maxItems: 1 + assigned-clock-parents: true + assigned-clocks: true + '#clock-cells': const: 1 @@ -85,12 +90,28 @@ properties: required: - compatible - reg - - '#clock-cells' - - clock-names - - clocks additionalProperties: false +allOf: + - if: + properties: + compatible: + contains: + enum: + - samsung,exynos3250-pmu + - samsung,exynos4210-pmu + - samsung,exynos4412-pmu + - samsung,exynos5250-pmu + - samsung,exynos5410-pmu + - samsung,exynos5420-pmu + - samsung,exynos5433-pmu + then: + required: + - '#clock-cells' + - clock-names + - clocks + examples: - | #include diff --git a/Documentation/devicetree/bindings/arm/samsung/sysreg.yaml b/Documentation/devicetree/bindings/arm/samsung/sysreg.yaml deleted file mode 100644 index 3b7811804cb41..0000000000000 --- a/Documentation/devicetree/bindings/arm/samsung/sysreg.yaml +++ /dev/null @@ -1,45 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/arm/samsung/sysreg.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Samsung S5P/Exynos SoC series System Registers (SYSREG) - -maintainers: - - Krzysztof Kozlowski - -# Custom select to avoid matching all nodes with 'syscon' -select: - properties: - compatible: - contains: - enum: - - samsung,exynos4-sysreg - - samsung,exynos5-sysreg - required: - - compatible - -properties: - compatible: - allOf: - - items: - - enum: - - samsung,exynos4-sysreg - - samsung,exynos5-sysreg - - const: syscon - - reg: - maxItems: 1 - -examples: - - | - syscon@10010000 { - compatible = "samsung,exynos4-sysreg", "syscon"; - reg = <0x10010000 0x400>; - }; - - syscon@10050000 { - compatible = "samsung,exynos5-sysreg", "syscon"; - reg = <0x10050000 0x5000>; - }; diff --git a/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml b/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml index 9f276bc9efa00..8e711bd202fd0 100644 --- a/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/st,mlahb.yaml @@ -50,6 +50,8 @@ required: - '#size-cells' - dma-ranges +unevaluatedProperties: false + examples: - | mlahb: ahb@38000000 { diff --git a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml index 790e6dd48e340..deacb4e686e83 100644 --- a/Documentation/devicetree/bindings/arm/stm32/stm32.yaml +++ b/Documentation/devicetree/bindings/arm/stm32/stm32.yaml @@ -10,6 +10,8 @@ maintainers: - Alexandre Torgue properties: + $nodename: + const: "/" compatible: oneOf: - items: @@ -50,4 +52,10 @@ properties: - const: st,stm32mp157c-ev1 - const: st,stm32mp157c-ed1 - const: st,stm32mp157 + - description: Odyssey STM32MP1 SoM based Boards + items: + - enum: + - seeed,stm32mp157c-odyssey + - const: seeed,stm32mp157c-odyssey-som + - const: st,stm32mp157 ... diff --git a/Documentation/devicetree/bindings/arm/sunxi.yaml b/Documentation/devicetree/bindings/arm/sunxi.yaml index efc9118233b4b..afa00268c7db7 100644 --- a/Documentation/devicetree/bindings/arm/sunxi.yaml +++ b/Documentation/devicetree/bindings/arm/sunxi.yaml @@ -16,6 +16,11 @@ properties: compatible: oneOf: + - description: Allwinner A100 Perf1 Board + items: + - const: allwinner,a100-perf1 + - const: allwinner,sun50i-a100 + - description: Allwinner A23 Evaluation Board items: - const: allwinner,sun8i-a23-evb @@ -626,6 +631,11 @@ properties: - const: pine64,pine64-plus - const: allwinner,sun50i-a64 + - description: Pine64 PineCube + items: + - const: pine64,pinecube + - const: allwinner,sun8i-s3 + - description: Pine64 PineH64 model A items: - const: pine64,pine-h64 diff --git a/Documentation/devicetree/bindings/arm/tegra.yaml b/Documentation/devicetree/bindings/arm/tegra.yaml index e0b3debaee9e4..8ae44948e8733 100644 --- a/Documentation/devicetree/bindings/arm/tegra.yaml +++ b/Documentation/devicetree/bindings/arm/tegra.yaml @@ -11,6 +11,8 @@ maintainers: - Jonathan Hunter properties: + $nodename: + const: "/" compatible: oneOf: - items: @@ -119,3 +121,7 @@ properties: items: - const: nvidia,p3509-0000+p3668-0000 - const: nvidia,tegra194 + - items: + - enum: + - nvidia,tegra234-vdk + - const: nvidia,tegra234 diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt index 2d89cdc39eb0f..576462fae27f5 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra186-pmc.txt @@ -4,6 +4,7 @@ Required properties: - compatible: Should contain one of the following: - "nvidia,tegra186-pmc": for Tegra186 - "nvidia,tegra194-pmc": for Tegra194 + - "nvidia,tegra234-pmc": for Tegra234 - reg: Must contain an (offset, length) pair of the register set for each entry in reg-names. - reg-names: Must include the following entries: @@ -11,7 +12,7 @@ Required properties: - "wake" - "aotag" - "scratch" - - "misc" (Only for Tegra194) + - "misc" (Only for Tegra194 and later) Optional properties: - nvidia,invert-interrupt: If present, inverts the PMU interrupt signal. diff --git a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml index b71a20af5f70e..43fd2f8927d03 100644 --- a/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml +++ b/Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.yaml @@ -308,6 +308,8 @@ required: - clocks - '#clock-cells' +additionalProperties: false + dependencies: "nvidia,suspend-mode": ["nvidia,core-pwr-off-time", "nvidia,cpu-pwr-off-time"] "nvidia,core-pwr-off-time": ["nvidia,core-pwr-good-time"] diff --git a/Documentation/devicetree/bindings/arm/ti/k3.txt b/Documentation/devicetree/bindings/arm/ti/k3.txt deleted file mode 100644 index 333e7256126a8..0000000000000 --- a/Documentation/devicetree/bindings/arm/ti/k3.txt +++ /dev/null @@ -1,26 +0,0 @@ -Texas Instruments K3 Multicore SoC architecture device tree bindings --------------------------------------------------------------------- - -Platforms based on Texas Instruments K3 Multicore SoC architecture -shall follow the following scheme: - -SoCs ----- - -Each device tree root node must specify which exact SoC in K3 Multicore SoC -architecture it uses, using one of the following compatible values: - -- AM654 - compatible = "ti,am654"; - -- J721E - compatible = "ti,j721e"; - -Boards ------- - -In addition, each device tree root node must specify which one or more -of the following board-specific compatible values: - -- AM654 EVM - compatible = "ti,am654-evm", "ti,am654"; diff --git a/Documentation/devicetree/bindings/arm/ti/k3.yaml b/Documentation/devicetree/bindings/arm/ti/k3.yaml new file mode 100644 index 0000000000000..8297512095435 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/ti/k3.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/ti/k3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments K3 Multicore SoC architecture device tree bindings + +maintainers: + - Nishanth Menon + +description: | + Platforms based on Texas Instruments K3 Multicore SoC architecture + shall have the following properties. + +properties: + $nodename: + const: '/' + compatible: + oneOf: + + - description: K3 AM654 SoC + items: + - enum: + - ti,am654-evm + - const: ti,am654 + + - description: K3 J721E SoC + items: + - const: ti,j721e + + - description: K3 J7200 SoC + items: + - const: ti,j7200 +... diff --git a/Documentation/devicetree/bindings/arm/toshiba.yaml b/Documentation/devicetree/bindings/arm/toshiba.yaml new file mode 100644 index 0000000000000..0e066290238ee --- /dev/null +++ b/Documentation/devicetree/bindings/arm/toshiba.yaml @@ -0,0 +1,22 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/toshiba.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba Visconti Platform Device Tree Bindings + +maintainers: + - Nobuhiro Iwamatsu + +properties: + $nodename: + const: '/' + compatible: + oneOf: + - description: Visconti5 TMPV7708 + items: + - enum: + - toshiba,tmpv7708-rm-mbrc # TMPV7708 RM main board + - const: toshiba,tmpv7708 +... diff --git a/Documentation/devicetree/bindings/ata/faraday,ftide010.yaml b/Documentation/devicetree/bindings/ata/faraday,ftide010.yaml index 6451928dd2ce7..fa16f3767c6a5 100644 --- a/Documentation/devicetree/bindings/ata/faraday,ftide010.yaml +++ b/Documentation/devicetree/bindings/ata/faraday,ftide010.yaml @@ -64,6 +64,8 @@ allOf: required: - sata +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/ata/imx-sata.txt b/Documentation/devicetree/bindings/ata/imx-sata.txt deleted file mode 100644 index 781f887517626..0000000000000 --- a/Documentation/devicetree/bindings/ata/imx-sata.txt +++ /dev/null @@ -1,37 +0,0 @@ -* Freescale i.MX AHCI SATA Controller - -The Freescale i.MX SATA controller mostly conforms to the AHCI interface -with some special extensions at integration level. - -Required properties: -- compatible : should be one of the following: - - "fsl,imx53-ahci" for i.MX53 SATA controller - - "fsl,imx6q-ahci" for i.MX6Q SATA controller - - "fsl,imx6qp-ahci" for i.MX6QP SATA controller -- interrupts : interrupt mapping for SATA IRQ -- reg : registers mapping -- clocks : list of clock specifiers, must contain an entry for each - required entry in clock-names -- clock-names : should include "sata", "sata_ref" and "ahb" entries - -Optional properties: -- fsl,transmit-level-mV : transmit voltage level, in millivolts. -- fsl,transmit-boost-mdB : transmit boost level, in milli-decibels -- fsl,transmit-atten-16ths : transmit attenuation, in 16ths -- fsl,receive-eq-mdB : receive equalisation, in milli-decibels - Please refer to the technical documentation or the driver source code - for the list of legal values for these options. -- fsl,no-spread-spectrum : disable spread-spectrum clocking on the SATA - link. - -Examples: - -sata@2200000 { - compatible = "fsl,imx6q-ahci"; - reg = <0x02200000 0x4000>; - interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX6QDL_CLK_SATA>, - <&clks IMX6QDL_CLK_SATA_REF_100M>, - <&clks IMX6QDL_CLK_AHB>; - clock-names = "sata", "sata_ref", "ahb"; -}; diff --git a/Documentation/devicetree/bindings/ata/imx-sata.yaml b/Documentation/devicetree/bindings/ata/imx-sata.yaml new file mode 100644 index 0000000000000..68ffb97ddc9b2 --- /dev/null +++ b/Documentation/devicetree/bindings/ata/imx-sata.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ata/imx-sata.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX AHCI SATA Controller + +maintainers: + - Shawn Guo + +description: | + The Freescale i.MX SATA controller mostly conforms to the AHCI interface + with some special extensions at integration level. + +properties: + compatible: + enum: + - fsl,imx53-ahci + - fsl,imx6q-ahci + - fsl,imx6qp-ahci + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: sata clock + - description: sata reference clock + - description: ahb clock + + clock-names: + items: + - const: sata + - const: sata_ref + - const: ahb + + fsl,transmit-level-mV: + $ref: /schemas/types.yaml#/definitions/uint32 + description: transmit voltage level, in millivolts. + + fsl,transmit-boost-mdB: + $ref: /schemas/types.yaml#/definitions/uint32 + description: transmit boost level, in milli-decibels. + + fsl,transmit-atten-16ths: + $ref: /schemas/types.yaml#/definitions/uint32 + description: transmit attenuation, in 16ths. + + fsl,receive-eq-mdB: + $ref: /schemas/types.yaml#/definitions/uint32 + description: receive equalisation, in milli-decibels. + + fsl,no-spread-spectrum: + $ref: /schemas/types.yaml#/definitions/flag + description: if present, disable spread-spectrum clocking on the SATA link. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + #include + #include + + sata@2200000 { + compatible = "fsl,imx6q-ahci"; + reg = <0x02200000 0x4000>; + interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clks IMX6QDL_CLK_SATA>, + <&clks IMX6QDL_CLK_SATA_REF_100M>, + <&clks IMX6QDL_CLK_AHB>; + clock-names = "sata", "sata_ref", "ahb"; + }; diff --git a/Documentation/devicetree/bindings/ata/pata-common.yaml b/Documentation/devicetree/bindings/ata/pata-common.yaml index fc5ebbe7108db..2412894a255de 100644 --- a/Documentation/devicetree/bindings/ata/pata-common.yaml +++ b/Documentation/devicetree/bindings/ata/pata-common.yaml @@ -47,4 +47,6 @@ patternProperties: The ID number of the drive port, 0 for the master port and 1 for the slave port. +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/ata/sata-common.yaml b/Documentation/devicetree/bindings/ata/sata-common.yaml index 6783a4dec6b59..7ac77b1c5850d 100644 --- a/Documentation/devicetree/bindings/ata/sata-common.yaml +++ b/Documentation/devicetree/bindings/ata/sata-common.yaml @@ -47,4 +47,6 @@ patternProperties: multiplier making it possible to connect up to 15 disks to a single SATA port. +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt b/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt index 729def62f0c58..10f6d0a8159d6 100644 --- a/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt +++ b/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt @@ -10,7 +10,8 @@ Required properties: "brcm,bcm7038-gisb-arb" for 130nm chips - reg: specifies the base physical address and size of the registers - interrupts: specifies the two interrupts (timeout and TEA) to be used from - the parent interrupt controller + the parent interrupt controller. A third optional interrupt may be specified + for breakpoints. Optional properties: diff --git a/Documentation/devicetree/bindings/bus/mti,mips-cdmm.yaml b/Documentation/devicetree/bindings/bus/mti,mips-cdmm.yaml index 9cc2d5f1beef8..6a7b26b049f13 100644 --- a/Documentation/devicetree/bindings/bus/mti,mips-cdmm.yaml +++ b/Documentation/devicetree/bindings/bus/mti,mips-cdmm.yaml @@ -26,6 +26,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | cdmm@1bde8000 { diff --git a/Documentation/devicetree/bindings/bus/renesas,bsc.yaml b/Documentation/devicetree/bindings/bus/renesas,bsc.yaml index 7d10b62a52d57..f53a377854135 100644 --- a/Documentation/devicetree/bindings/bus/renesas,bsc.yaml +++ b/Documentation/devicetree/bindings/bus/renesas,bsc.yaml @@ -44,6 +44,8 @@ properties: required: - reg +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/bus/simple-pm-bus.yaml b/Documentation/devicetree/bindings/bus/simple-pm-bus.yaml index 33326ffdb2669..182134d7a6a3b 100644 --- a/Documentation/devicetree/bindings/bus/simple-pm-bus.yaml +++ b/Documentation/devicetree/bindings/bus/simple-pm-bus.yaml @@ -61,6 +61,8 @@ anyOf: - required: - power-domains +additionalProperties: true + examples: - | #include diff --git a/Documentation/devicetree/bindings/bus/socionext,uniphier-system-bus.yaml b/Documentation/devicetree/bindings/bus/socionext,uniphier-system-bus.yaml index a0c6c5d2b70fb..49df13fc2f89e 100644 --- a/Documentation/devicetree/bindings/bus/socionext,uniphier-system-bus.yaml +++ b/Documentation/devicetree/bindings/bus/socionext,uniphier-system-bus.yaml @@ -57,6 +57,11 @@ properties: "ranges" property should provide a "reasonable" default that is known to work. The software should initialize the bus controller according to it. +patternProperties: + "^.*@[1-5],[1-9a-f][0-9a-f]+$": + description: Devices attached to chip selects + type: object + required: - compatible - reg @@ -64,6 +69,8 @@ required: - "#size-cells" - ranges +additionalProperties: false + examples: - | // In this example, diff --git a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml index 6d7396ab8beec..2d98f7c4d3bcf 100644 --- a/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml +++ b/Documentation/devicetree/bindings/chrome/google,cros-ec-typec.yaml @@ -26,6 +26,8 @@ properties: required: - compatible +additionalProperties: true #fixme + examples: - |+ spi0 { diff --git a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml index 4d382128b711c..3b45344ed7581 100644 --- a/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml +++ b/Documentation/devicetree/bindings/clock/allwinner,sun4i-a10-ccu.yaml @@ -36,6 +36,8 @@ properties: - allwinner,sun9i-a80-ccu - allwinner,sun50i-a64-ccu - allwinner,sun50i-a64-r-ccu + - allwinner,sun50i-a100-ccu + - allwinner,sun50i-a100-r-ccu - allwinner,sun50i-h5-ccu - allwinner,sun50i-h6-ccu - allwinner,sun50i-h6-r-ccu @@ -78,6 +80,7 @@ if: - allwinner,sun8i-a83t-r-ccu - allwinner,sun8i-h3-r-ccu - allwinner,sun50i-a64-r-ccu + - allwinner,sun50i-a100-r-ccu - allwinner,sun50i-h6-r-ccu then: @@ -94,7 +97,9 @@ else: if: properties: compatible: - const: allwinner,sun50i-h6-ccu + enum: + - allwinner,sun50i-a100-ccu + - allwinner,sun50i-h6-ccu then: properties: diff --git a/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml b/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml index 444aeea27db83..eb241587efd17 100644 --- a/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml +++ b/Documentation/devicetree/bindings/clock/arm,syscon-icst.yaml @@ -89,6 +89,8 @@ required: - compatible - clocks +additionalProperties: false + examples: - | vco1: clock { diff --git a/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-div.yaml b/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-div.yaml index 2821425ee4459..bd4cefbb1244d 100644 --- a/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-div.yaml +++ b/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-div.yaml @@ -134,7 +134,11 @@ properties: "#reset-cells": const: 1 -unevaluatedProperties: false + clocks: true + + clock-names: true + +additionalProperties: false required: - compatible diff --git a/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-pll.yaml b/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-pll.yaml index 97131bfa6f87e..624984d51c106 100644 --- a/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-pll.yaml +++ b/Documentation/devicetree/bindings/clock/baikal,bt1-ccu-pll.yaml @@ -101,7 +101,7 @@ properties: clock-names: const: ref_clk -unevaluatedProperties: false +additionalProperties: false required: - compatible diff --git a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml index 28c6461b9a9a1..2ac1131fd9222 100644 --- a/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml +++ b/Documentation/devicetree/bindings/clock/idt,versaclock5.yaml @@ -50,6 +50,15 @@ properties: '#clock-cells': const: 1 + clock-names: + minItems: 1 + maxItems: 2 + items: + enum: [ xin, clkin ] + clocks: + minItems: 1 + maxItems: 2 + patternProperties: "^OUT[1-4]$": type: object @@ -93,19 +102,12 @@ allOf: maxItems: 1 else: # Devices without builtin crystal - properties: - clock-names: - minItems: 1 - maxItems: 2 - items: - enum: [ xin, clkin ] - clocks: - minItems: 1 - maxItems: 2 required: - clock-names - clocks +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/clock/imx23-clock.yaml b/Documentation/devicetree/bindings/clock/imx23-clock.yaml index ad21899981af8..5e296a00e14f6 100644 --- a/Documentation/devicetree/bindings/clock/imx23-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx23-clock.yaml @@ -87,6 +87,8 @@ examples: serial@8006c000 { compatible = "fsl,imx23-auart"; reg = <0x8006c000 0x2000>; - interrupts = <24 25 23>; + interrupts = <24>; clocks = <&clks 32>; + dmas = <&dma_apbx 6>, <&dma_apbx 7>; + dma-names = "rx", "tx"; }; diff --git a/Documentation/devicetree/bindings/clock/imx28-clock.yaml b/Documentation/devicetree/bindings/clock/imx28-clock.yaml index f1af1108129ee..f831b780f9514 100644 --- a/Documentation/devicetree/bindings/clock/imx28-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx28-clock.yaml @@ -108,8 +108,10 @@ examples: }; serial@8006a000 { - compatible = "fsl,imx28-auart", "fsl,imx23-auart"; + compatible = "fsl,imx28-auart"; reg = <0x8006a000 0x2000>; - interrupts = <112 70 71>; + interrupts = <112>; + dmas = <&dma_apbx 8>, <&dma_apbx 9>; + dma-names = "rx", "tx"; clocks = <&clks 45>; }; diff --git a/Documentation/devicetree/bindings/clock/imx6q-clock.yaml b/Documentation/devicetree/bindings/clock/imx6q-clock.yaml index 92a8e545e212b..4f4637eddb8b7 100644 --- a/Documentation/devicetree/bindings/clock/imx6q-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx6q-clock.yaml @@ -57,6 +57,8 @@ required: - interrupts - '#clock-cells' +additionalProperties: false + examples: # Clock Control Module node: - | diff --git a/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml b/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml index c97bf95b41508..b83c8f43d664c 100644 --- a/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx6sl-clock.yaml @@ -33,6 +33,8 @@ required: - interrupts - '#clock-cells' +additionalProperties: false + examples: # Clock Control Module node: - | diff --git a/Documentation/devicetree/bindings/clock/imx6sll-clock.yaml b/Documentation/devicetree/bindings/clock/imx6sll-clock.yaml index de48924be1915..484894a4b23f4 100644 --- a/Documentation/devicetree/bindings/clock/imx6sll-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx6sll-clock.yaml @@ -49,6 +49,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: # Clock Control Module node: - | diff --git a/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml b/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml index e50cddee43c3d..e6c795657c24d 100644 --- a/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx6sx-clock.yaml @@ -53,6 +53,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: # Clock Control Module node: - | diff --git a/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml b/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml index 36ce7667c9726..6a51a3f51cd98 100644 --- a/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml +++ b/Documentation/devicetree/bindings/clock/imx6ul-clock.yaml @@ -49,6 +49,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: # Clock Control Module node: - | diff --git a/Documentation/devicetree/bindings/clock/imx8m-clock.yaml b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml new file mode 100644 index 0000000000000..625f573a7b90e --- /dev/null +++ b/Documentation/devicetree/bindings/clock/imx8m-clock.yaml @@ -0,0 +1,125 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/imx8m-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP i.MX8M Family Clock Control Module Binding + +maintainers: + - Anson Huang + +description: | + NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock + controller, which generates and supplies to all modules. + +properties: + compatible: + enum: + - fsl,imx8mm-ccm + - fsl,imx8mn-ccm + - fsl,imx8mp-ccm + - fsl,imx8mq-ccm + + reg: + maxItems: 1 + + clocks: + minItems: 6 + maxItems: 7 + + clock-names: + minItems: 6 + maxItems: 7 + + '#clock-cells': + const: 1 + description: + The clock consumer should specify the desired clock by having the clock + ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h + for the full list of i.MX8M clock IDs. + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +allOf: + - if: + properties: + compatible: + contains: + const: fsl,imx8mq-ccm + then: + properties: + clocks: + minItems: 7 + maxItems: 7 + items: + - description: 32k osc + - description: 25m osc + - description: 27m osc + - description: ext1 clock input + - description: ext2 clock input + - description: ext3 clock input + - description: ext4 clock input + clock-names: + minItems: 7 + maxItems: 7 + items: + - const: ckil + - const: osc_25m + - const: osc_27m + - const: clk_ext1 + - const: clk_ext2 + - const: clk_ext3 + - const: clk_ext4 + else: + properties: + clocks: + items: + - description: 32k osc + - description: 24m osc + - description: ext1 clock input + - description: ext2 clock input + - description: ext3 clock input + - description: ext4 clock input + + clock-names: + items: + - const: osc_32k + - const: osc_24m + - const: clk_ext1 + - const: clk_ext2 + - const: clk_ext3 + - const: clk_ext4 + +additionalProperties: false + +examples: + # Clock Control Module node: + - | + clock-controller@30380000 { + compatible = "fsl,imx8mm-ccm"; + reg = <0x30380000 0x10000>; + #clock-cells = <1>; + clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, + <&clk_ext3>, <&clk_ext4>; + clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", + "clk_ext3", "clk_ext4"; + }; + + - | + clock-controller@30390000 { + compatible = "fsl,imx8mq-ccm"; + reg = <0x30380000 0x10000>; + #clock-cells = <1>; + clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>, + <&clk_ext2>, <&clk_ext3>, <&clk_ext4>; + clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1", + "clk_ext2", "clk_ext3", "clk_ext4"; + }; + +... diff --git a/Documentation/devicetree/bindings/clock/imx8mm-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mm-clock.yaml deleted file mode 100644 index ec830db1367b0..0000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mm-clock.yaml +++ /dev/null @@ -1,68 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/imx8mm-clock.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP i.MX8M Mini Clock Control Module Binding - -maintainers: - - Anson Huang - -description: | - NXP i.MX8M Mini clock control module is an integrated clock controller, which - generates and supplies to all modules. - -properties: - compatible: - const: fsl,imx8mm-ccm - - reg: - maxItems: 1 - - clocks: - items: - - description: 32k osc - - description: 24m osc - - description: ext1 clock input - - description: ext2 clock input - - description: ext3 clock input - - description: ext4 clock input - - clock-names: - items: - - const: osc_32k - - const: osc_24m - - const: clk_ext1 - - const: clk_ext2 - - const: clk_ext3 - - const: clk_ext4 - - '#clock-cells': - const: 1 - description: - The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mm-clock.h - for the full list of i.MX8M Mini clock IDs. - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - -examples: - # Clock Control Module node: - - | - clk: clock-controller@30380000 { - compatible = "fsl,imx8mm-ccm"; - reg = <0x30380000 0x10000>; - #clock-cells = <1>; - clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>, - <&clk_ext3>, <&clk_ext4>; - clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2", - "clk_ext3", "clk_ext4"; - }; - -... diff --git a/Documentation/devicetree/bindings/clock/imx8mn-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mn-clock.yaml deleted file mode 100644 index bdaa29616ab1d..0000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mn-clock.yaml +++ /dev/null @@ -1,70 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/imx8mn-clock.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP i.MX8M Nano Clock Control Module Binding - -maintainers: - - Anson Huang - -description: | - NXP i.MX8M Nano clock control module is an integrated clock controller, which - generates and supplies to all modules. - -properties: - compatible: - const: fsl,imx8mn-ccm - - reg: - maxItems: 1 - - clocks: - items: - - description: 32k osc - - description: 24m osc - - description: ext1 clock input - - description: ext2 clock input - - description: ext3 clock input - - description: ext4 clock input - - clock-names: - items: - - const: osc_32k - - const: osc_24m - - const: clk_ext1 - - const: clk_ext2 - - const: clk_ext3 - - const: clk_ext4 - - '#clock-cells': - const: 1 - description: - The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mn-clock.h - for the full list of i.MX8M Nano clock IDs. - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - -additionalProperties: false - -examples: - # Clock Control Module node: - - | - clk: clock-controller@30380000 { - compatible = "fsl,imx8mn-ccm"; - reg = <0x30380000 0x10000>; - #clock-cells = <1>; - clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, - <&clk_ext2>, <&clk_ext3>, <&clk_ext4>; - clock-names = "osc_32k", "osc_24m", "clk_ext1", - "clk_ext2", "clk_ext3", "clk_ext4"; - }; - -... diff --git a/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml deleted file mode 100644 index 4351a1dbb4f7f..0000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mp-clock.yaml +++ /dev/null @@ -1,70 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/imx8mp-clock.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP i.MX8M Plus Clock Control Module Binding - -maintainers: - - Anson Huang - -description: - NXP i.MX8M Plus clock control module is an integrated clock controller, which - generates and supplies to all modules. - -properties: - compatible: - const: fsl,imx8mp-ccm - - reg: - maxItems: 1 - - clocks: - items: - - description: 32k osc - - description: 24m osc - - description: ext1 clock input - - description: ext2 clock input - - description: ext3 clock input - - description: ext4 clock input - - clock-names: - items: - - const: osc_32k - - const: osc_24m - - const: clk_ext1 - - const: clk_ext2 - - const: clk_ext3 - - const: clk_ext4 - - '#clock-cells': - const: 1 - description: - The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mp-clock.h - for the full list of i.MX8M Plus clock IDs. - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - -additionalProperties: false - -examples: - # Clock Control Module node: - - | - clk: clock-controller@30380000 { - compatible = "fsl,imx8mp-ccm"; - reg = <0x30380000 0x10000>; - #clock-cells = <1>; - clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, - <&clk_ext2>, <&clk_ext3>, <&clk_ext4>; - clock-names = "osc_32k", "osc_24m", "clk_ext1", - "clk_ext2", "clk_ext3", "clk_ext4"; - }; - -... diff --git a/Documentation/devicetree/bindings/clock/imx8mq-clock.yaml b/Documentation/devicetree/bindings/clock/imx8mq-clock.yaml deleted file mode 100644 index 05d7d1471e0c5..0000000000000 --- a/Documentation/devicetree/bindings/clock/imx8mq-clock.yaml +++ /dev/null @@ -1,72 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/imx8mq-clock.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: NXP i.MX8M Quad Clock Control Module Binding - -maintainers: - - Anson Huang - -description: | - NXP i.MX8M Quad clock control module is an integrated clock controller, which - generates and supplies to all modules. - -properties: - compatible: - const: fsl,imx8mq-ccm - - reg: - maxItems: 1 - - clocks: - items: - - description: 32k osc - - description: 25m osc - - description: 27m osc - - description: ext1 clock input - - description: ext2 clock input - - description: ext3 clock input - - description: ext4 clock input - - clock-names: - items: - - const: ckil - - const: osc_25m - - const: osc_27m - - const: clk_ext1 - - const: clk_ext2 - - const: clk_ext3 - - const: clk_ext4 - - '#clock-cells': - const: 1 - description: - The clock consumer should specify the desired clock by having the clock - ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8mq-clock.h - for the full list of i.MX8M Quad clock IDs. - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - -examples: - # Clock Control Module node: - - | - clk: clock-controller@30380000 { - compatible = "fsl,imx8mq-ccm"; - reg = <0x30380000 0x10000>; - #clock-cells = <1>; - clocks = <&ckil>, <&osc_25m>, <&osc_27m>, - <&clk_ext1>, <&clk_ext2>, - <&clk_ext3>, <&clk_ext4>; - clock-names = "ckil", "osc_25m", "osc_27m", - "clk_ext1", "clk_ext2", - "clk_ext3", "clk_ext4"; - }; - -... diff --git a/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml b/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml index 1d5e9bcce4c82..33f3010f48c3b 100644 --- a/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml +++ b/Documentation/devicetree/bindings/clock/imx8qxp-lpcg.yaml @@ -62,7 +62,7 @@ examples: }; mmc@5b010000 { - compatible = "fsl,imx8qxp-usdhc"; + compatible = "fsl,imx8qxp-usdhc", "fsl,imx7d-usdhc"; interrupts = ; reg = <0x5b010000 0x10000>; clocks = <&conn_lpcg IMX_CONN_LPCG_SDHC0_IPG_CLK>, diff --git a/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml b/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml index 6dc1414bfb7f6..f3e1a700a2ca5 100644 --- a/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml +++ b/Documentation/devicetree/bindings/clock/intel,cgu-lgm.yaml @@ -33,6 +33,8 @@ required: - reg - '#clock-cells' +additionalProperties: false + examples: - | cgu: clock-controller@e0200000 { diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml new file mode 100644 index 0000000000000..0cdf53f41f84c --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml @@ -0,0 +1,93 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,dispcc-sm8x50.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Display Clock & Reset Controller Binding for SM8150/SM8250 + +maintainers: + - Jonathan Marek + +description: | + Qualcomm display clock control module which supports the clocks, resets and + power domains on SM8150 and SM8250. + + See also: + dt-bindings/clock/qcom,dispcc-sm8150.h + dt-bindings/clock/qcom,dispcc-sm8250.h + +properties: + compatible: + enum: + - qcom,sm8150-dispcc + - qcom,sm8250-dispcc + + clocks: + items: + - description: Board XO source + - description: Byte clock from DSI PHY0 + - description: Pixel clock from DSI PHY0 + - description: Byte clock from DSI PHY1 + - description: Pixel clock from DSI PHY1 + - description: Link clock from DP PHY + - description: VCO DIV clock from DP PHY + + clock-names: + items: + - const: bi_tcxo + - const: dsi0_phy_pll_out_byteclk + - const: dsi0_phy_pll_out_dsiclk + - const: dsi1_phy_pll_out_byteclk + - const: dsi1_phy_pll_out_dsiclk + - const: dp_phy_pll_link_clk + - const: dp_phy_pll_vco_div_clk + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include + clock-controller@af00000 { + compatible = "qcom,sm8250-dispcc"; + reg = <0x0af00000 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>, + <&dsi0_phy 0>, + <&dsi0_phy 1>, + <&dsi1_phy 0>, + <&dsi1_phy 1>, + <&dp_phy 0>, + <&dp_phy 1>; + clock-names = "bi_tcxo", + "dsi0_phy_pll_out_byteclk", + "dsi0_phy_pll_out_dsiclk", + "dsi1_phy_pll_out_byteclk", + "dsi1_phy_pll_out_dsiclk", + "dp_phy_pll_link_clk", + "dp_phy_pll_vco_div_clk"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml index a5766ff89082e..80bd6caf5bc9b 100644 --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sm8250.yaml @@ -56,6 +56,8 @@ required: - '#reset-cells' - '#power-domain-cells' +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml deleted file mode 100644 index 2feea2b91aa9f..0000000000000 --- a/Documentation/devicetree/bindings/clock/qcom,sc7180-videocc.yaml +++ /dev/null @@ -1,65 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/qcom,sc7180-videocc.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm Video Clock & Reset Controller Binding for SC7180 - -maintainers: - - Taniya Das - -description: | - Qualcomm video clock control module which supports the clocks, resets and - power domains on SC7180. - - See also dt-bindings/clock/qcom,videocc-sc7180.h. - -properties: - compatible: - const: qcom,sc7180-videocc - - clocks: - items: - - description: Board XO source - - clock-names: - items: - - const: bi_tcxo - - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' - -additionalProperties: false - -examples: - - | - #include - clock-controller@ab00000 { - compatible = "qcom,sc7180-videocc"; - reg = <0x0ab00000 0x10000>; - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "bi_tcxo"; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - }; -... diff --git a/Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml deleted file mode 100644 index f7a0cf53d5f0e..0000000000000 --- a/Documentation/devicetree/bindings/clock/qcom,sdm845-videocc.yaml +++ /dev/null @@ -1,65 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/clock/qcom,sdm845-videocc.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm Video Clock & Reset Controller Binding for SDM845 - -maintainers: - - Taniya Das - -description: | - Qualcomm video clock control module which supports the clocks, resets and - power domains on SDM845. - - See also dt-bindings/clock/qcom,videocc-sdm845.h. - -properties: - compatible: - const: qcom,sdm845-videocc - - clocks: - items: - - description: Board XO source - - clock-names: - items: - - const: bi_tcxo - - '#clock-cells': - const: 1 - - '#reset-cells': - const: 1 - - '#power-domain-cells': - const: 1 - - reg: - maxItems: 1 - -required: - - compatible - - reg - - clocks - - clock-names - - '#clock-cells' - - '#reset-cells' - - '#power-domain-cells' - -additionalProperties: false - -examples: - - | - #include - clock-controller@ab00000 { - compatible = "qcom,sdm845-videocc"; - reg = <0x0ab00000 0x10000>; - clocks = <&rpmhcc RPMH_CXO_CLK>; - clock-names = "bi_tcxo"; - #clock-cells = <1>; - #reset-cells = <1>; - #power-domain-cells = <1>; - }; -... diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml new file mode 100644 index 0000000000000..567202942b88a --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/qcom,videocc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Video Clock & Reset Controller Binding + +maintainers: + - Taniya Das + +description: | + Qualcomm video clock control module which supports the clocks, resets and + power domains on SDM845/SC7180/SM8150/SM8250. + + See also: + dt-bindings/clock/qcom,videocc-sc7180.h + dt-bindings/clock/qcom,videocc-sdm845.h + dt-bindings/clock/qcom,videocc-sm8150.h + dt-bindings/clock/qcom,videocc-sm8250.h + +properties: + compatible: + enum: + - qcom,sc7180-videocc + - qcom,sdm845-videocc + - qcom,sm8150-videocc + - qcom,sm8250-videocc + + clocks: + items: + - description: Board XO source + + clock-names: + items: + - const: bi_tcxo + + '#clock-cells': + const: 1 + + '#reset-cells': + const: 1 + + '#power-domain-cells': + const: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + - '#reset-cells' + - '#power-domain-cells' + +additionalProperties: false + +examples: + - | + #include + clock-controller@ab00000 { + compatible = "qcom,sdm845-videocc"; + reg = <0x0ab00000 0x10000>; + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "bi_tcxo"; + #clock-cells = <1>; + #reset-cells = <1>; + #power-domain-cells = <1>; + }; +... diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml index e13aee8ab61ad..9b414fbde6d7b 100644 --- a/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mssr.yaml @@ -47,6 +47,7 @@ properties: - renesas,r8a77980-cpg-mssr # R-Car V3H - renesas,r8a77990-cpg-mssr # R-Car E3 - renesas,r8a77995-cpg-mssr # R-Car D3 + - renesas,r8a779a0-cpg-mssr # R-Car V3U reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt deleted file mode 100644 index 349808f4fb8c0..0000000000000 --- a/Documentation/devicetree/bindings/clock/sifive/fu540-prci.txt +++ /dev/null @@ -1,46 +0,0 @@ -SiFive FU540 PRCI bindings - -On the FU540 family of SoCs, most system-wide clock and reset integration -is via the PRCI IP block. - -Required properties: -- compatible: Should be "sifive,-prci". Only one value is - supported: "sifive,fu540-c000-prci" -- reg: Should describe the PRCI's register target physical address region -- clocks: Should point to the hfclk device tree node and the rtcclk - device tree node. The RTC clock here is not a time-of-day clock, - but is instead a high-stability clock source for system timers - and cycle counters. -- #clock-cells: Should be <1> - -The clock consumer should specify the desired clock via the clock ID -macros defined in include/dt-bindings/clock/sifive-fu540-prci.h. -These macros begin with PRCI_CLK_. - -The hfclk and rtcclk nodes are required, and represent physical -crystals or resonators located on the PCB. These nodes should be present -underneath /, rather than /soc. - -Examples: - -/* under /, in PCB-specific DT data */ -hfclk: hfclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <33333333>; - clock-output-names = "hfclk"; -}; -rtcclk: rtcclk { - #clock-cells = <0>; - compatible = "fixed-clock"; - clock-frequency = <1000000>; - clock-output-names = "rtcclk"; -}; - -/* under /soc, in SoC-specific DT data */ -prci: clock-controller@10000000 { - compatible = "sifive,fu540-c000-prci"; - reg = <0x0 0x10000000 0x0 0x1000>; - clocks = <&hfclk>, <&rtcclk>; - #clock-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml new file mode 100644 index 0000000000000..c3be1b6000072 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2020 SiFive, Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/sifive/fu540-prci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI) + +maintainers: + - Sagar Kadam + - Paul Walmsley + +description: + On the FU540 family of SoCs, most system-wide clock and reset integration + is via the PRCI IP block. + The clock consumer should specify the desired clock via the clock ID + macros defined in include/dt-bindings/clock/sifive-fu540-prci.h. + These macros begin with PRCI_CLK_. + + The hfclk and rtcclk nodes are required, and represent physical + crystals or resonators located on the PCB. These nodes should be present + underneath /, rather than /soc. + +properties: + compatible: + const: sifive,fu540-c000-prci + + reg: + maxItems: 1 + + clocks: + items: + - description: high frequency clock. + - description: RTL clock. + + clock-names: + items: + - const: hfclk + - const: rtcclk + + "#clock-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - "#clock-cells" + +additionalProperties: false + +examples: + - | + prci: clock-controller@10000000 { + compatible = "sifive,fu540-c000-prci"; + reg = <0x10000000 0x1000>; + clocks = <&hfclk>, <&rtcclk>; + #clock-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml index c6d091518650c..4069e09cb62de 100644 --- a/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml +++ b/Documentation/devicetree/bindings/clock/sprd,sc9863a-clk.yaml @@ -73,6 +73,8 @@ else: The 'reg' property for the clock node is also required if there is a sub range of registers for the clocks. +additionalProperties: false + examples: - | ap_clk: clock-controller@21500000 { diff --git a/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml b/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml index 869b18ac88d7a..6b419a9878f30 100644 --- a/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml +++ b/Documentation/devicetree/bindings/clock/ti,am654-ehrpwm-tbclk.yaml @@ -26,6 +26,8 @@ required: - "#clock-cells" - reg +additionalProperties: false + examples: - | ehrpwm_tbclk: syscon@4140 { diff --git a/Documentation/devicetree/bindings/connector/samsung,usb-connector-11pin.txt b/Documentation/devicetree/bindings/connector/samsung,usb-connector-11pin.txt deleted file mode 100644 index 3dd8961154abf..0000000000000 --- a/Documentation/devicetree/bindings/connector/samsung,usb-connector-11pin.txt +++ /dev/null @@ -1,49 +0,0 @@ -Samsung micro-USB 11-pin connector -================================== - -Samsung micro-USB 11-pin connector is an extension of micro-USB connector. -It is present in multiple Samsung mobile devices. -It has additional pins to route MHL traffic simultanously with USB. - -The bindings are superset of usb-connector bindings for micro-USB connector[1]. - -Required properties: -- compatible: must be: "samsung,usb-connector-11pin", "usb-b-connector", -- type: must be "micro". - -Required nodes: -- any data bus to the connector should be modeled using the OF graph bindings - specified in bindings/graph.txt, unless the bus is between parent node and - the connector. Since single connector can have multpile data buses every bus - has assigned OF graph port number as follows: - 0: High Speed (HS), - 3: Mobile High-Definition Link (MHL), specific to 11-pin Samsung micro-USB. - -[1]: bindings/connector/usb-connector.yaml - -Example -------- - -Micro-USB connector with HS lines routed via controller (MUIC) and MHL lines -connected to HDMI-MHL bridge (sii8620): - -muic-max77843@66 { - ... - usb_con: connector { - compatible = "samsung,usb-connector-11pin", "usb-b-connector"; - label = "micro-USB"; - type = "micro"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@3 { - reg = <3>; - usb_con_mhl: endpoint { - remote-endpoint = <&sii8620_mhl>; - }; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/connector/usb-connector.yaml b/Documentation/devicetree/bindings/connector/usb-connector.yaml index 9bd52e63c935d..728f82db073d5 100644 --- a/Documentation/devicetree/bindings/connector/usb-connector.yaml +++ b/Documentation/devicetree/bindings/connector/usb-connector.yaml @@ -11,7 +11,8 @@ maintainers: description: A USB connector node represents a physical USB connector. It should be a child - of a USB interface controller. + of a USB interface controller or a separate node when it is attached to both + MUX and USB interface controller. properties: compatible: @@ -25,6 +26,10 @@ properties: - const: gpio-usb-b-connector - const: usb-b-connector + - items: + - const: samsung,usb-connector-11pin + - const: usb-b-connector + label: description: Symbolic name for the connector. @@ -158,6 +163,18 @@ allOf: - required: - id-gpios + - if: + properties: + compatible: + contains: + const: samsung,usb-connector-11pin + then: + properties: + type: + const: micro + +additionalProperties: true + examples: # Micro-USB connector with HS lines routed via controller (MUIC). - | @@ -221,6 +238,33 @@ examples: }; }; + # USB-C connector attached to SoC and USB3 typec port controller(hd3ss3220) + # with SS 2:1 MUX. HS lines routed to SoC, SS lines routed to the MUX and + # the output of MUX is connected to the SoC. + - | + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + hs_ep: endpoint { + remote-endpoint = <&usb3_hs_ep>; + }; + }; + port@1 { + reg = <1>; + ss_ep: endpoint { + remote-endpoint = <&hd3ss3220_in_ep>; + }; + }; + }; + }; + # USB connector with GPIO control lines - | #include @@ -233,3 +277,33 @@ examples: vbus-supply = <&usb_p0_vbus>; }; }; + + # Micro-USB connector with HS lines routed via controller (MUIC) and MHL + # lines connected to HDMI-MHL bridge (sii8620) on Samsung Exynos5433-based + # mobile phone + - | + muic-max77843 { + usb_con4: connector { + compatible = "samsung,usb-connector-11pin", "usb-b-connector"; + label = "micro-USB"; + type = "micro"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + muic_to_usb: endpoint { + remote-endpoint = <&usb_to_muic>; + }; + }; + port@3 { + reg = <3>; + usb_con_mhl: endpoint { + remote-endpoint = <&sii8620_mhl>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt index 33856947c5610..9299028ee7123 100644 --- a/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt +++ b/Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt @@ -8,7 +8,7 @@ Properties: - compatible Usage: required Value type: - Definition: must be "qcom,cpufreq-hw". + Definition: must be "qcom,cpufreq-hw" or "qcom,cpufreq-epss". - clocks Usage: required diff --git a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml index fc823572bcff2..0429fb774f10e 100644 --- a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml +++ b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml @@ -23,7 +23,9 @@ properties: - items: - const: allwinner,sun7i-a20-crypto - const: allwinner,sun4i-a10-crypto + - const: allwinner,sun8i-a33-crypto - items: + - const: allwinner,sun8i-v3s-crypto - const: allwinner,sun8i-a33-crypto reg: @@ -59,7 +61,9 @@ if: properties: compatible: contains: - const: allwinner,sun6i-a31-crypto + enum: + - allwinner,sun6i-a31-crypto + - allwinner,sun8i-a33-crypto then: required: diff --git a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt b/Documentation/devicetree/bindings/crypto/fsl-dcp.txt deleted file mode 100644 index 513499fcdb5b4..0000000000000 --- a/Documentation/devicetree/bindings/crypto/fsl-dcp.txt +++ /dev/null @@ -1,18 +0,0 @@ -Freescale DCP (Data Co-Processor) found on i.MX23/i.MX28 . - -Required properties: -- compatible : Should be "fsl,-dcp" -- reg : Should contain MXS DCP registers location and length -- interrupts : Should contain MXS DCP interrupt numbers, VMI IRQ and DCP IRQ - must be supplied, optionally Secure IRQ can be present, but - is currently not implemented and not used. -- clocks : Clock reference (only required on some SOCs: 6ull and 6sll). -- clock-names : Must be "dcp". - -Example: - -dcp: crypto@80028000 { - compatible = "fsl,imx28-dcp", "fsl,imx23-dcp"; - reg = <0x80028000 0x2000>; - interrupts = <52 53>; -}; diff --git a/Documentation/devicetree/bindings/crypto/fsl-dcp.yaml b/Documentation/devicetree/bindings/crypto/fsl-dcp.yaml new file mode 100644 index 0000000000000..a30bf38a4a49d --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/fsl-dcp.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/fsl-dcp.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale DCP (Data Co-Processor) found on i.MX23/i.MX28 + +maintainers: + - Marek Vasut + +properties: + compatible: + enum: + - fsl,imx23-dcp + - fsl,imx28-dcp + + reg: + maxItems: 1 + + interrupts: + description: Should contain MXS DCP interrupt numbers, VMI IRQ and DCP IRQ + must be supplied, optionally Secure IRQ can be present, but is currently + not implemented and not used. + items: + - description: MXS DCP VMI interrupt + - description: MXS DCP DCP interrupt + - description: MXS DCP secure interrupt + minItems: 2 + maxItems: 3 + + clocks: + maxItems: 1 + + clock-names: + const: dcp + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + crypto@80028000 { + compatible = "fsl,imx23-dcp"; + reg = <0x80028000 0x2000>; + interrupts = <53>, <54>; + }; diff --git a/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt b/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt deleted file mode 100644 index db690b10e582b..0000000000000 --- a/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.txt +++ /dev/null @@ -1,15 +0,0 @@ -Freescale SAHARA Cryptographic Accelerator included in some i.MX chips. -Currently only i.MX27 and i.MX53 are supported. - -Required properties: -- compatible : Should be "fsl,-sahara" -- reg : Should contain SAHARA registers location and length -- interrupts : Should contain SAHARA interrupt number - -Example: - -sah: crypto@10025000 { - compatible = "fsl,imx27-sahara"; - reg = < 0x10025000 0x800>; - interrupts = <75>; -}; diff --git a/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.yaml b/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.yaml new file mode 100644 index 0000000000000..d531f3af3ea45 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/fsl-imx-sahara.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/fsl-imx-sahara.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale SAHARA Cryptographic Accelerator included in some i.MX chips + +maintainers: + - Steffen Trumtrar + +properties: + compatible: + enum: + - fsl,imx27-sahara + - fsl,imx53-sahara + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + crypto@10025000 { + compatible = "fsl,imx27-sahara"; + reg = < 0x10025000 0x800>; + interrupts = <75>; + }; diff --git a/Documentation/devicetree/bindings/crypto/fsl-imx-scc.txt b/Documentation/devicetree/bindings/crypto/fsl-imx-scc.txt deleted file mode 100644 index 7aad448e8a366..0000000000000 --- a/Documentation/devicetree/bindings/crypto/fsl-imx-scc.txt +++ /dev/null @@ -1,21 +0,0 @@ -Freescale Security Controller (SCC) - -Required properties: -- compatible : Should be "fsl,imx25-scc". -- reg : Should contain register location and length. -- interrupts : Should contain interrupt numbers for SCM IRQ and SMN IRQ. -- interrupt-names : Should specify the names "scm" and "smn" for the - SCM IRQ and SMN IRQ. -- clocks: Should contain the clock driving the SCC core. -- clock-names: Should be set to "ipg". - -Example: - - scc: crypto@53fac000 { - compatible = "fsl,imx25-scc"; - reg = <0x53fac000 0x4000>; - clocks = <&clks 111>; - clock-names = "ipg"; - interrupts = <49>, <50>; - interrupt-names = "scm", "smn"; - }; diff --git a/Documentation/devicetree/bindings/crypto/fsl-imx-scc.yaml b/Documentation/devicetree/bindings/crypto/fsl-imx-scc.yaml new file mode 100644 index 0000000000000..563a31605d2b7 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/fsl-imx-scc.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/fsl-imx-scc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale Security Controller (SCC) + +maintainers: + - Steffen Trumtrar + +properties: + compatible: + const: fsl,imx25-scc + + reg: + maxItems: 1 + + interrupts: + items: + - description: SCC SCM interrupt + - description: SCC SMN interrupt + + interrupt-names: + items: + - const: scm + - const: smn + + clocks: + maxItems: 1 + + clock-names: + const: ipg + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + crypto@53fac000 { + compatible = "fsl,imx25-scc"; + reg = <0x53fac000 0x4000>; + clocks = <&clks 111>; + clock-names = "ipg"; + interrupts = <49>, <50>; + interrupt-names = "scm", "smn"; + }; diff --git a/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml b/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml index 04fe5dfa794a3..7743eae049ab5 100644 --- a/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml +++ b/Documentation/devicetree/bindings/crypto/samsung-slimsss.yaml @@ -19,7 +19,7 @@ description: |+ properties: compatible: items: - - const: samsung,exynos5433-slim-ss + - const: samsung,exynos5433-slim-sss reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml index 63f9481752391..7aa330dabc446 100644 --- a/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/allwinner,sun6i-a31-mipi-dsi.yaml @@ -11,9 +11,6 @@ maintainers: - Maxime Ripard properties: - "#address-cells": true - "#size-cells": true - compatible: enum: - allwinner,sun6i-a31-mipi-dsi @@ -57,12 +54,7 @@ properties: port should be the input endpoint, usually coming from the associated TCON. -patternProperties: - "^panel@[0-9]+$": true - required: - - "#address-cells" - - "#size-cells" - compatible - reg - interrupts @@ -74,6 +66,7 @@ required: - port allOf: + - $ref: dsi-controller.yaml# - if: properties: compatible: @@ -99,7 +92,7 @@ allOf: clocks: minItems: 1 -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml new file mode 100644 index 0000000000000..03a76729d26cf --- /dev/null +++ b/Documentation/devicetree/bindings/display/brcm,bcm2711-hdmi.yaml @@ -0,0 +1,117 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/brcm,bcm2711-hdmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM2711 HDMI Controller Device Tree Bindings + +maintainers: + - Eric Anholt + +properties: + compatible: + enum: + - brcm,bcm2711-hdmi0 + - brcm,bcm2711-hdmi1 + + reg: + items: + - description: HDMI controller register range + - description: DVP register range + - description: HDMI PHY register range + - description: Rate Manager register range + - description: Packet RAM register range + - description: Metadata RAM register range + - description: CSC register range + - description: CEC register range + - description: HD register range + + reg-names: + items: + - const: hdmi + - const: dvp + - const: phy + - const: rm + - const: packet + - const: metadata + - const: csc + - const: cec + - const: hd + + clocks: + items: + - description: The HDMI state machine clock + - description: The Pixel BVB clock + - description: The HDMI Audio parent clock + - description: The HDMI CEC parent clock + + clock-names: + items: + - const: hdmi + - const: bvb + - const: audio + - const: cec + + ddc: + allOf: + - $ref: /schemas/types.yaml#/definitions/phandle + description: > + Phandle of the I2C controller used for DDC EDID probing + + hpd-gpios: + description: > + The GPIO pin for the HDMI hotplug detect (if it doesn't appear + as an interrupt/status bit in the HDMI controller itself) + + dmas: + maxItems: 1 + description: > + Should contain one entry pointing to the DMA channel used to + transfer audio data. + + dma-names: + const: audio-rx + + resets: + maxItems: 1 + +required: + - compatible + - reg + - reg-names + - clocks + - resets + - ddc + +additionalProperties: false + +examples: + - | + hdmi0: hdmi@7ef00700 { + compatible = "brcm,bcm2711-hdmi0"; + reg = <0x7ef00700 0x300>, + <0x7ef00300 0x200>, + <0x7ef00f00 0x80>, + <0x7ef00f80 0x80>, + <0x7ef01b00 0x200>, + <0x7ef01f00 0x400>, + <0x7ef00200 0x80>, + <0x7ef04300 0x100>, + <0x7ef20000 0x100>; + reg-names = "hdmi", + "dvp", + "phy", + "rm", + "packet", + "metadata", + "csc", + "cec", + "hd"; + clocks = <&firmware_clocks 13>, <&firmware_clocks 14>, <&dvp 1>, <&clk_27MHz>; + clock-names = "hdmi", "bvb", "audio", "cec"; + resets = <&dvp 0>; + ddc = <&ddc0>; + }; + +... diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml index 3c643b227a70c..eb44e072b6e59 100644 --- a/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml +++ b/Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml @@ -9,6 +9,9 @@ title: Broadcom VC4 (VideoCore4) DSI Controller maintainers: - Eric Anholt +allOf: + - $ref: dsi-controller.yaml# + properties: "#clock-cells": const: 1 diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml index 02410f8d6d498..e826ab0adb75d 100644 --- a/Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml +++ b/Documentation/devicetree/bindings/display/brcm,bcm2835-hvs.yaml @@ -11,7 +11,9 @@ maintainers: properties: compatible: - const: brcm,bcm2835-hvs + enum: + - brcm,bcm2711-hvs + - brcm,bcm2835-hvs reg: maxItems: 1 @@ -19,6 +21,10 @@ properties: interrupts: maxItems: 1 + clocks: + maxItems: 1 + description: Core Clock + required: - compatible - reg @@ -26,6 +32,16 @@ required: additionalProperties: false +if: + properties: + compatible: + contains: + const: brcm,bcm2711-hvs" + +then: + required: + - clocks + examples: - | hvs@7e400000 { diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2835-pixelvalve0.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2835-pixelvalve0.yaml index e60791db1fa12..4e1ba03f6477f 100644 --- a/Documentation/devicetree/bindings/display/brcm,bcm2835-pixelvalve0.yaml +++ b/Documentation/devicetree/bindings/display/brcm,bcm2835-pixelvalve0.yaml @@ -15,6 +15,11 @@ properties: - brcm,bcm2835-pixelvalve0 - brcm,bcm2835-pixelvalve1 - brcm,bcm2835-pixelvalve2 + - brcm,bcm2711-pixelvalve0 + - brcm,bcm2711-pixelvalve1 + - brcm,bcm2711-pixelvalve2 + - brcm,bcm2711-pixelvalve3 + - brcm,bcm2711-pixelvalve4 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/display/brcm,bcm2835-vc4.yaml b/Documentation/devicetree/bindings/display/brcm,bcm2835-vc4.yaml index 0dcf0c3973759..49a5e041aa493 100644 --- a/Documentation/devicetree/bindings/display/brcm,bcm2835-vc4.yaml +++ b/Documentation/devicetree/bindings/display/brcm,bcm2835-vc4.yaml @@ -17,6 +17,7 @@ description: > properties: compatible: enum: + - brcm,bcm2711-vc5 - brcm,bcm2835-vc4 - brcm,cygnus-vc4 diff --git a/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml new file mode 100644 index 0000000000000..74d675fc6e7ba --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/cdns,mhdp8546.yaml @@ -0,0 +1,169 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/bridge/cdns,mhdp8546.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Cadence MHDP8546 bridge + +maintainers: + - Swapnil Jakhade + - Yuti Amonkar + +properties: + compatible: + enum: + - cdns,mhdp8546 + - ti,j721e-mhdp8546 + + reg: + minItems: 1 + maxItems: 2 + items: + - description: + Register block of mhdptx apb registers up to PHY mapped area (AUX_CONFIG_P). + The AUX and PMA registers are not part of this range, they are instead + included in the associated PHY. + - description: + Register block for DSS_EDP0_INTG_CFG_VP registers in case of TI J7 SoCs. + + reg-names: + minItems: 1 + maxItems: 2 + items: + - const: mhdptx + - const: j721e-intg + + clocks: + maxItems: 1 + description: + DP bridge clock, used by the IP to know how to translate a number of + clock cycles into a time (which is used to comply with DP standard timings + and delays). + + phys: + maxItems: 1 + description: + phandle to the DisplayPort PHY. + + phy-names: + items: + - const: dpphy + + power-domains: + maxItems: 1 + + interrupts: + maxItems: 1 + + ports: + type: object + description: + Ports as described in Documentation/devicetree/bindings/graph.txt. + + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + + port@0: + type: object + description: + First input port representing the DP bridge input. + + port@1: + type: object + description: + Second input port representing the DP bridge input. + + port@2: + type: object + description: + Third input port representing the DP bridge input. + + port@3: + type: object + description: + Fourth input port representing the DP bridge input. + + port@4: + type: object + description: + Output port representing the DP bridge output. + + required: + - port@0 + - port@4 + - '#address-cells' + - '#size-cells' + +allOf: + - if: + properties: + compatible: + contains: + const: ti,j721e-mhdp8546 + then: + properties: + reg: + minItems: 2 + reg-names: + minItems: 2 + else: + properties: + reg: + maxItems: 1 + reg-names: + maxItems: 1 + +required: + - compatible + - clocks + - reg + - reg-names + - phys + - phy-names + - interrupts + - ports + +additionalProperties: false + +examples: + - | + #include + bus { + #address-cells = <2>; + #size-cells = <2>; + + mhdp: dp-bridge@f0fb000000 { + compatible = "cdns,mhdp8546"; + reg = <0xf0 0xfb000000 0x0 0x1000000>; + reg-names = "mhdptx"; + clocks = <&mhdp_clock>; + phys = <&dp_phy>; + phy-names = "dpphy"; + interrupts = ; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + dp_bridge_input: endpoint { + remote-endpoint = <&xxx_dpi_output>; + }; + }; + + port@4 { + reg = <4>; + dp_bridge_output: endpoint { + remote-endpoint = <&xxx_dp_connector_input>; + }; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml index 2c500166c65dd..efbb3d0117dc6 100644 --- a/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml +++ b/Documentation/devicetree/bindings/display/bridge/ite,it6505.yaml @@ -31,6 +31,9 @@ properties: compatible: const: ite,it6505 + reg: + maxItems: 1 + ovdd-supply: maxItems: 1 description: I/O voltage @@ -63,6 +66,8 @@ required: - reset-gpios - extcon +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml b/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml new file mode 100644 index 0000000000000..d60208359234b --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/lontium,lt9611.yaml @@ -0,0 +1,176 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/lontium,lt9611.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lontium LT9611 2 Port MIPI to HDMI Bridge + +maintainers: + - Vinod Koul + +description: | + The LT9611 is a bridge device which converts DSI to HDMI + +properties: + compatible: + enum: + - lontium,lt9611 + + reg: + maxItems: 1 + + "#sound-dai-cells": + const: 1 + + interrupts: + maxItems: 1 + + reset-gpios: + maxItems: 1 + description: GPIO connected to active high RESET pin. + + vdd-supply: + description: Regulator for 1.8V MIPI phy power. + + vcc-supply: + description: Regulator for 3.3V IO power. + + ports: + type: object + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: | + Primary MIPI port-1 for MIPI input + + properties: + reg: + const: 0 + + patternProperties: + "^endpoint(@[0-9])$": + type: object + additionalProperties: false + + properties: + remote-endpoint: + $ref: /schemas/types.yaml#/definitions/phandle + + required: + - reg + + port@1: + type: object + description: | + Additional MIPI port-2 for MIPI input, used in combination + with primary MIPI port-1 to drive higher resolution displays + + properties: + reg: + const: 1 + + patternProperties: + "^endpoint(@[0-9])$": + type: object + additionalProperties: false + + properties: + remote-endpoint: + $ref: /schemas/types.yaml#/definitions/phandle + + required: + - reg + + port@2: + type: object + description: | + HDMI port for HDMI output + + properties: + reg: + const: 2 + + patternProperties: + "^endpoint(@[0-9])$": + type: object + additionalProperties: false + + properties: + remote-endpoint: + $ref: /schemas/types.yaml#/definitions/phandle + + required: + - reg + + required: + - "#address-cells" + - "#size-cells" + - port@0 + - port@2 + +required: + - compatible + - reg + - interrupts + - vdd-supply + - vcc-supply + - ports + +additionalProperties: false + +examples: + - | + #include + #include + + i2c10 { + #address-cells = <1>; + #size-cells = <0>; + + hdmi-bridge@3b { + compatible = "lontium,lt9611"; + reg = <0x3b>; + + reset-gpios = <&tlmm 128 GPIO_ACTIVE_HIGH>; + interrupts-extended = <&tlmm 84 IRQ_TYPE_EDGE_FALLING>; + + vdd-supply = <<9611_1v8>; + vcc-supply = <<9611_3v3>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + lt9611_a: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + lt9611_b: endpoint { + remote-endpoint = <&dsi1_out>; + }; + }; + + port@2 { + reg = <2>; + lt9611_out: endpoint { + remote-endpoint = <&hdmi_con>; + }; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml index 68951d56ebba9..e5e3c72630cf8 100644 --- a/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml +++ b/Documentation/devicetree/bindings/display/bridge/lvds-codec.yaml @@ -79,10 +79,16 @@ properties: The GPIO used to control the power down line of this device. maxItems: 1 + power-supply: + maxItems: 1 + required: - compatible - ports +additionalProperties: false + + examples: - | lvds-encoder { diff --git a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml index 04099f5bea3f0..a125b2dd3a2f1 100644 --- a/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/nwl-dsi.yaml @@ -14,6 +14,9 @@ description: | NWL MIPI-DSI host controller found on i.MX8 platforms. This is a dsi bridge for the SOCs NWL MIPI-DSI host controller. +allOf: + - $ref: ../dsi-controller.yaml# + properties: compatible: const: fsl,imx8mq-nwl-dsi @@ -30,6 +33,10 @@ properties: '#size-cells': const: 0 + assigned-clock-parents: true + assigned-clock-rates: true + assigned-clocks: true + clocks: items: - description: DSI core clock @@ -140,10 +147,6 @@ properties: additionalProperties: false -patternProperties: - "^panel@[0-9]+$": - type: object - required: - '#address-cells' - '#size-cells' @@ -159,7 +162,7 @@ required: - reset-names - resets -additionalProperties: false +unevaluatedProperties: false examples: - | @@ -168,7 +171,7 @@ examples: #include #include - mipi_dsi: mipi_dsi@30a00000 { + dsi@30a00000 { #address-cells = <1>; #size-cells = <0>; compatible = "fsl,imx8mq-nwl-dsi"; diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt index 819f3e31013c7..3f60726511828 100644 --- a/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt +++ b/Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt @@ -14,8 +14,10 @@ Required properties: - compatible : Shall contain one or more of - "renesas,r8a774a1-hdmi" for R8A774A1 (RZ/G2M) compatible HDMI TX - "renesas,r8a774b1-hdmi" for R8A774B1 (RZ/G2N) compatible HDMI TX + - "renesas,r8a774e1-hdmi" for R8A774E1 (RZ/G2H) compatible HDMI TX - "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX - "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX + - "renesas,r8a77961-hdmi" for R8A77961 (R-Car M3-W+) compatible HDMI TX - "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX - "renesas,rcar-gen3-hdmi" for the generic R-Car Gen3 and RZ/G2 compatible HDMI TX @@ -42,7 +44,7 @@ Optional properties: Example: hdmi0: hdmi@fead0000 { - compatible = "renesas,r8a7795-dw-hdmi"; + compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; reg = <0 0xfead0000 0 0x10000>; interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_CORE R8A7795_CLK_S0D4>, <&cpg CPG_MOD 729>; diff --git a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml index baaf2a2a6fed3..e5b163951b919 100644 --- a/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml +++ b/Documentation/devicetree/bindings/display/bridge/renesas,lvds.yaml @@ -16,11 +16,13 @@ description: | properties: compatible: enum: + - renesas,r8a7742-lvds # for RZ/G1H compatible LVDS encoders - renesas,r8a7743-lvds # for RZ/G1M compatible LVDS encoders - renesas,r8a7744-lvds # for RZ/G1N compatible LVDS encoders - renesas,r8a774a1-lvds # for RZ/G2M compatible LVDS encoders - renesas,r8a774b1-lvds # for RZ/G2N compatible LVDS encoders - renesas,r8a774c0-lvds # for RZ/G2E compatible LVDS encoders + - renesas,r8a774e1-lvds # for RZ/G2H compatible LVDS encoders - renesas,r8a7790-lvds # for R-Car H2 compatible LVDS encoders - renesas,r8a7791-lvds # for R-Car M2-W compatible LVDS encoders - renesas,r8a7793-lvds # for R-Car M2-N compatible LVDS encoders diff --git a/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml index 012aa8e7cb8cd..e42cb610f545c 100644 --- a/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/bridge/snps,dw-mipi-dsi.yaml @@ -66,3 +66,5 @@ required: - clocks - ports - reg + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358762.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358762.yaml new file mode 100644 index 0000000000000..195025e6803cd --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358762.yaml @@ -0,0 +1,127 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358762.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba TC358762 MIPI DSI to MIPI DPI bridge + +maintainers: + - Marek Vasut + +description: | + The TC358762 is bridge device which converts MIPI DSI to MIPI DPI. + +properties: + compatible: + enum: + - toshiba,tc358762 + + reg: + maxItems: 1 + description: virtual channel number of a DSI peripheral + + vddc-supply: + description: Regulator for 1.2V internal core power. + + ports: + type: object + + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + additionalProperties: false + + description: | + Video port for MIPI DSI input + + properties: + reg: + const: 0 + + patternProperties: + endpoint: + type: object + additionalProperties: false + + properties: + remote-endpoint: true + + required: + - reg + + port@1: + type: object + additionalProperties: false + + description: | + Video port for MIPI DPI output (panel or connector). + + properties: + reg: + const: 1 + + patternProperties: + endpoint: + type: object + additionalProperties: false + + properties: + remote-endpoint: true + + required: + - reg + + required: + - "#address-cells" + - "#size-cells" + - port@0 + - port@1 + +required: + - compatible + - reg + - vddc-supply + - ports + +additionalProperties: false + +examples: + - | + i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + bridge@0 { + reg = <0>; + compatible = "toshiba,tc358762"; + vddc-supply = <&vcc_1v2_reg>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + bridge_in: endpoint { + remote-endpoint = <&dsi_out>; + }; + }; + + port@1 { + reg = <1>; + bridge_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml new file mode 100644 index 0000000000000..31f085d8ab13e --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/toshiba,tc358775.yaml @@ -0,0 +1,215 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/toshiba,tc358775.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba TC358775 DSI to LVDS bridge bindings + +maintainers: + - Vinay Simha BN + +description: | + This binding supports DSI to LVDS bridge TC358775 + + MIPI DSI-RX Data 4-lane, CLK 1-lane with data rates up to 800 Mbps/lane. + Video frame size: + Up to 1600x1200 24-bit/pixel resolution for single-link LVDS display panel + limited by 135 MHz LVDS speed + Up to WUXGA (1920x1200 24-bit pixels) resolution for dual-link LVDS display + panel, limited by 270 MHz LVDS speed. + +properties: + compatible: + const: toshiba,tc358775 + + reg: + maxItems: 1 + description: i2c address of the bridge, 0x0f + + vdd-supply: + maxItems: 1 + description: 1.2V LVDS Power Supply + + vddio-supply: + maxItems: 1 + description: 1.8V IO Power Supply + + stby-gpios: + maxItems: 1 + description: Standby pin, Low active + + reset-gpios: + maxItems: 1 + description: Hardware reset, Low active + + ports: + type: object + description: + A node containing input and output port nodes with endpoint definitions + as documented in + Documentation/devicetree/bindings/media/video-interfaces.txt + properties: + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + port@0: + type: object + description: | + DSI Input. The remote endpoint phandle should be a + reference to a valid mipi_dsi_host device node. + + port@1: + type: object + description: | + Video port for LVDS output (panel or connector). + + port@2: + type: object + description: | + Video port for Dual link LVDS output (panel or connector). + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - vdd-supply + - vddio-supply + - stby-gpios + - reset-gpios + - ports + +examples: + - | + #include + + /* For single-link LVDS display panel */ + + i2c@78b8000 { + /* On High speed expansion */ + label = "HS-I2C2"; + reg = <0x078b8000 0x500>; + clock-frequency = <400000>; /* fastmode operation */ + #address-cells = <1>; + #size-cells = <0>; + + tc_bridge: bridge@f { + compatible = "toshiba,tc358775"; + reg = <0x0f>; + + vdd-supply = <&pm8916_l2>; + vddio-supply = <&pm8916_l6>; + + stby-gpios = <&msmgpio 99 GPIO_ACTIVE_LOW>; + reset-gpios = <&msmgpio 72 GPIO_ACTIVE_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + d2l_in_test: endpoint { + remote-endpoint = <&dsi0_out>; + }; + }; + + port@1 { + reg = <1>; + lvds_out: endpoint { + remote-endpoint = <&panel_in>; + }; + }; + }; + }; + }; + + dsi@1a98000 { + reg = <0x1a98000 0x25c>; + reg-names = "dsi_ctrl"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@1 { + reg = <1>; + dsi0_out: endpoint { + remote-endpoint = <&d2l_in_test>; + data-lanes = <0 1 2 3>; + }; + }; + }; + }; + + - | + /* For dual-link LVDS display panel */ + + i2c@78b8000 { + /* On High speed expansion */ + label = "HS-I2C2"; + reg = <0x078b8000 0x500>; + clock-frequency = <400000>; /* fastmode operation */ + #address-cells = <1>; + #size-cells = <0>; + + tc_bridge_dual: bridge@f { + compatible = "toshiba,tc358775"; + reg = <0x0f>; + + vdd-supply = <&pm8916_l2>; + vddio-supply = <&pm8916_l6>; + + stby-gpios = <&msmgpio 99 GPIO_ACTIVE_LOW>; + reset-gpios = <&msmgpio 72 GPIO_ACTIVE_LOW>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + d2l_in_dual: endpoint { + remote-endpoint = <&dsi0_out_dual>; + }; + }; + + port@1 { + reg = <1>; + lvds0_out: endpoint { + remote-endpoint = <&panel_in0>; + }; + }; + + port@2 { + reg = <2>; + lvds1_out: endpoint { + remote-endpoint = <&panel_in1>; + }; + }; + }; + }; + }; + + dsi@1a98000 { + reg = <0x1a98000 0x25c>; + reg-names = "dsi_ctrl"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@1 { + reg = <1>; + dsi0_out_dual: endpoint { + remote-endpoint = <&d2l_in_dual>; + data-lanes = <0 1 2 3>; + }; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/display/dsi-controller.yaml b/Documentation/devicetree/bindings/display/dsi-controller.yaml index a02039e3aca0e..ca21671f6bddc 100644 --- a/Documentation/devicetree/bindings/display/dsi-controller.yaml +++ b/Documentation/devicetree/bindings/display/dsi-controller.yaml @@ -73,6 +73,8 @@ patternProperties: required: - reg +additionalProperties: true + examples: - | #include diff --git a/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml new file mode 100644 index 0000000000000..f1f25aa794d93 --- /dev/null +++ b/Documentation/devicetree/bindings/display/imx/nxp,imx8mq-dcss.yaml @@ -0,0 +1,108 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 NXP +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/display/imx/nxp,imx8mq-dcss.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: iMX8MQ Display Controller Subsystem (DCSS) + +maintainers: + - Laurentiu Palcu + +description: + + The DCSS (display controller sub system) is used to source up to three + display buffers, compose them, and drive a display using HDMI 2.0a(with HDCP + 2.2) or MIPI-DSI. The DCSS is intended to support up to 4kp60 displays. HDR10 + image processing capabilities are included to provide a solution capable of + driving next generation high dynamic range displays. + +properties: + compatible: + const: nxp,imx8mq-dcss + + reg: + items: + - description: DCSS base address and size, up to IRQ steer start + - description: DCSS BLKCTL base address and size + + interrupts: + items: + - description: Context loader completion and error interrupt + - description: DTG interrupt used to signal context loader trigger time + - description: DTG interrupt for Vblank + + interrupt-names: + items: + - const: ctxld + - const: ctxld_kick + - const: vblank + + clocks: + items: + - description: Display APB clock for all peripheral PIO access interfaces + - description: Display AXI clock needed by DPR, Scaler, RTRAM_CTRL + - description: RTRAM clock + - description: Pixel clock, can be driven either by HDMI phy clock or MIPI + - description: DTRC clock, needed by video decompressor + + clock-names: + items: + - const: apb + - const: axi + - const: rtrm + - const: pix + - const: dtrc + + assigned-clocks: + items: + - description: Phandle and clock specifier of IMX8MQ_CLK_DISP_AXI_ROOT + - description: Phandle and clock specifier of IMX8MQ_CLK_DISP_RTRM + - description: Phandle and clock specifier of either IMX8MQ_VIDEO2_PLL1_REF_SEL or + IMX8MQ_VIDEO_PLL1_REF_SEL + + assigned-clock-parents: + items: + - description: Phandle and clock specifier of IMX8MQ_SYS1_PLL_800M + - description: Phandle and clock specifier of IMX8MQ_SYS1_PLL_800M + - description: Phandle and clock specifier of IMX8MQ_CLK_27M + + assigned-clock-rates: + items: + - description: Must be 800 MHz + - description: Must be 400 MHz + + port: + type: object + description: + A port node pointing to the input port of a HDMI/DP or MIPI display bridge. + +additionalProperties: false + +examples: + - | + #include + dcss: display-controller@32e00000 { + compatible = "nxp,imx8mq-dcss"; + reg = <0x32e00000 0x2d000>, <0x32e2f000 0x1000>; + interrupts = <6>, <8>, <9>; + interrupt-names = "ctxld", "ctxld_kick", "vblank"; + interrupt-parent = <&irqsteer>; + clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>, <&clk IMX8MQ_CLK_DISP_AXI_ROOT>, + <&clk IMX8MQ_CLK_DISP_RTRM_ROOT>, <&clk IMX8MQ_VIDEO2_PLL_OUT>, + <&clk IMX8MQ_CLK_DISP_DTRC>; + clock-names = "apb", "axi", "rtrm", "pix", "dtrc"; + assigned-clocks = <&clk IMX8MQ_CLK_DISP_AXI>, <&clk IMX8MQ_CLK_DISP_RTRM>, + <&clk IMX8MQ_VIDEO2_PLL1_REF_SEL>; + assigned-clock-parents = <&clk IMX8MQ_SYS1_PLL_800M>, <&clk IMX8MQ_SYS1_PLL_800M>, + <&clk IMX8MQ_CLK_27M>; + assigned-clock-rates = <800000000>, + <400000000>; + port { + dcss_out: endpoint { + remote-endpoint = <&hdmi_in>; + }; + }; + }; + diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt index b91e709db7a4e..121220745d465 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt @@ -43,7 +43,7 @@ Required properties (all function blocks): "mediatek,-dpi" - DPI controller, see mediatek,dpi.txt "mediatek,-disp-mutex" - display mutex "mediatek,-disp-od" - overdrive - the supported chips are mt2701, mt2712 and mt8173. + the supported chips are mt2701, mt7623, mt2712 and mt8173. - reg: Physical base address and length of the function block register space - interrupts: The interrupt signal from the function block (required, except for merge and split function blocks). diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt index 77def4456706b..dc1ebd13cc880 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt @@ -7,7 +7,7 @@ output bus. Required properties: - compatible: "mediatek,-dpi" - the supported chips are mt2701 , mt8173 and mt8183. + the supported chips are mt2701, mt7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt index 8e4729de8c85d..f06f24d405a5a 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt @@ -7,7 +7,7 @@ channel output. Required properties: - compatible: "mediatek,-dsi" - the supported chips are mt2701, mt8173 and mt8183. +- the supported chips are mt2701, mt7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks @@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY. Required properties: - compatible: "mediatek,-mipi-tx" - the supported chips are mt2701, mt8173 and mt8183. +- the supported chips are mt2701, 7623, mt8173 and mt8183. - reg: Physical base address and length of the controller's registers - clocks: PLL reference clock - clock-output-names: name of the output clock line to the DSI encoder diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt index 7b124242b0c55..6b1c586403e44 100644 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,hdmi.txt @@ -6,6 +6,7 @@ its parallel input. Required properties: - compatible: Should be "mediatek,-hdmi". +- the supported chips are mt2701, mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clocks @@ -32,6 +33,7 @@ The HDMI CEC controller handles hotplug detection and CEC communication. Required properties: - compatible: Should be "mediatek,-cec" +- the supported chips are mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - interrupts: The interrupt signal from the function block. - clocks: device clock @@ -44,6 +46,7 @@ The Mediatek's I2C controller is used to interface with I2C devices. Required properties: - compatible: Should be "mediatek,-hdmi-ddc" +- the supported chips are mt7623 and mt8173 - reg: Physical base address and length of the controller's registers - clocks: device clock - clock-names: Should be "ddc-i2c". @@ -56,6 +59,7 @@ output and drives the HDMI pads. Required properties: - compatible: "mediatek,-hdmi-phy" +- the supported chips are mt2701, mt7623 and mt8173 - reg: Physical base address and length of the module's registers - clocks: PLL reference clock - clock-names: must contain "pll_ref" diff --git a/Documentation/devicetree/bindings/display/msm/dsi.txt b/Documentation/devicetree/bindings/display/msm/dsi.txt index 7884fd7a85c12..b9a64d3ff1848 100644 --- a/Documentation/devicetree/bindings/display/msm/dsi.txt +++ b/Documentation/devicetree/bindings/display/msm/dsi.txt @@ -90,6 +90,8 @@ Required properties: * "qcom,dsi-phy-14nm-660" * "qcom,dsi-phy-10nm" * "qcom,dsi-phy-10nm-8998" + * "qcom,dsi-phy-7nm" + * "qcom,dsi-phy-7nm-8150" - reg: Physical base address and length of the registers of PLL, PHY. Some revisions require the PHY regulator base address, whereas others require the PHY lane base address. See below for each PHY revision. @@ -98,7 +100,7 @@ Required properties: * "dsi_pll" * "dsi_phy" * "dsi_phy_regulator" - For DSI 14nm and 10nm PHYs: + For DSI 14nm, 10nm and 7nm PHYs: * "dsi_pll" * "dsi_phy" * "dsi_phy_lane" @@ -116,7 +118,7 @@ Required properties: - vcca-supply: phandle to vcca regulator device node For 14nm PHY: - vcca-supply: phandle to vcca regulator device node - For 10nm PHY: + For 10nm and 7nm PHY: - vdds-supply: phandle to vdds regulator device node Optional properties: diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml index 53056dd025977..fe55611d2603c 100644 --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml @@ -89,6 +89,8 @@ required: - iommus - operating-points-v2 +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml b/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml index 76a9068a85dde..c60b3bd74337e 100644 --- a/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml +++ b/Documentation/devicetree/bindings/display/panel/ilitek,ili9881c.yaml @@ -13,7 +13,9 @@ properties: compatible: items: - enum: - - bananapi,lhr050h41 + - bananapi,lhr050h41 + - feixin,k101-im2byl02 + - const: ilitek,ili9881c backlight: true diff --git a/Documentation/devicetree/bindings/display/panel/lvds.yaml b/Documentation/devicetree/bindings/display/panel/lvds.yaml index 946dd354256c1..31164608ba1de 100644 --- a/Documentation/devicetree/bindings/display/panel/lvds.yaml +++ b/Documentation/devicetree/bindings/display/panel/lvds.yaml @@ -112,4 +112,6 @@ oneOf: - required: - ports +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml b/Documentation/devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml new file mode 100644 index 0000000000000..937323cc9aaac --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/mantix,mlaf057we51-x.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/mantix,mlaf057we51-x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mantix MLAF057WE51-X 5.7" 720x1440 TFT LCD panel + +maintainers: + - Guido Günther + +description: + Mantix MLAF057WE51 X is a 720x1440 TFT LCD panel connected using + a MIPI-DSI video interface. + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + enum: + - mantix,mlaf057we51-x + + port: true + reg: + maxItems: 1 + description: DSI virtual channel + + avdd-supply: + description: Positive analog power supply + + avee-supply: + description: Negative analog power supply + + vddi-supply: + description: 1.8V I/O voltage supply + + reset-gpios: true + + backlight: true + +required: + - compatible + - reg + - avdd-supply + - avee-supply + - vddi-supply + - reset-gpios + +additionalProperties: false + +examples: + - | + #include + + dsi { + #address-cells = <1>; + #size-cells = <0>; + panel@0 { + compatible = "mantix,mlaf057we51-x"; + reg = <0>; + avdd-supply = <®_avdd>; + avee-supply = <®_avee>; + vddi-supply = <®_1v8_p>; + reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; + backlight = <&backlight>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/display/panel/panel-common.yaml b/Documentation/devicetree/bindings/display/panel/panel-common.yaml index 45fe8fe5faba6..cd6dc5461721d 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-common.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-common.yaml @@ -163,4 +163,6 @@ dependencies: width-mm: [ height-mm ] height-mm: [ width-mm ] +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml index 6deeeed59e59f..edb53ab0d9eb2 100644 --- a/Documentation/devicetree/bindings/display/panel/panel-simple.yaml +++ b/Documentation/devicetree/bindings/display/panel/panel-simple.yaml @@ -29,6 +29,8 @@ properties: # compatible must be listed in alphabetical order, ordered by compatible. # The description in the comment is mandatory for each compatible. + # Ampire AM-1280800N3TZQW-T00H 10.1" WQVGA TFT LCD panel + - ampire,am-1280800n3tzqw-t00h # Ampire AM-480272H3TMQW-T01H 4.3" WQVGA TFT LCD panel - ampire,am-480272h3tmqw-t01h # Ampire AM-800480R3TMQW-A1H 7.0" WVGA TFT LCD panel @@ -87,6 +89,8 @@ properties: - cdtech,s070swv29hg-dc44 # CDTech(H.K.) Electronics Limited 7" 800x480 color TFT-LCD panel - cdtech,s070wv95-ct16 + # Chefree CH101OLHLWH-002 10.1" (1280x800) color TFT LCD panel + - chefree,ch101olhlwh-002 # Chunghwa Picture Tubes Ltd. 7" WXGA TFT LCD panel - chunghwa,claa070wp03xg # Chunghwa Picture Tubes Ltd. 10.1" WXGA TFT LCD panel @@ -159,6 +163,8 @@ properties: - innolux,n156bge-l21 # Innolux Corporation 7.0" WSVGA (1024x600) TFT LCD panel - innolux,zj070na-01p + # King & Display KD116N21-30NV-A010 eDP TFT LCD panel + - kingdisplay,kd116n21-30nv-a010 # Kaohsiung Opto-Electronics Inc. 5.7" QVGA (320 x 240) TFT LCD panel - koe,tx14d24vm1bpa # Kaohsiung Opto-Electronics Inc. 10.1" WUXGA (1920 x 1200) LVDS TFT LCD panel @@ -219,6 +225,8 @@ properties: - osddisplays,osd070t1718-19ts # One Stop Displays OSD101T2045-53TS 10.1" 1920x1200 panel - osddisplays,osd101t2045-53ts + # POWERTIP PH800480T013-IDF2 7.0" WVGA TFT LCD panel + - powertip,ph800480t013-idf02 # QiaoDian XianShi Corporation 4"3 TFT LCD panel - qiaodian,qd43003c0-40 # Rocktech Displays Ltd. RK101II01D-CT 10.1" TFT 1280x800 diff --git a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml index d5733ef309549..09b5eb7542f8a 100644 --- a/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml +++ b/Documentation/devicetree/bindings/display/panel/rocktech,jh057n00900.yaml @@ -8,10 +8,11 @@ title: Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel maintainers: - Ondrej Jirman + - Guido Gŭnther -description: | - Rocktech JH057N00900 is a 720x1440 TFT LCD panel - connected using a MIPI-DSI video interface. +description: + Rocktech JH057N00900 is a 720x1440 TFT LCD panel + connected using a MIPI-DSI video interface. allOf: - $ref: panel-common.yaml# @@ -19,9 +20,9 @@ allOf: properties: compatible: enum: - # Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel + # Rocktech JH057N00900 5.5" 720x1440 TFT LCD panel - rocktech,jh057n00900 - # Xingbangda XBD599 5.99" 720x1440 TFT LCD panel + # Xingbangda XBD599 5.99" 720x1440 TFT LCD panel - xingbangda,xbd599 port: true @@ -35,13 +36,9 @@ properties: iovcc-supply: description: I/O voltage supply - reset-gpios: - description: GPIO used for the reset pin - maxItems: 1 + reset-gpios: true - backlight: - description: Backlight used by the panel - $ref: "/schemas/types.yaml#/definitions/phandle" + backlight: true required: - compatible @@ -57,15 +54,16 @@ examples: #include dsi { - #address-cells = <1>; - #size-cells = <0>; - panel@0 { - compatible = "rocktech,jh057n00900"; - reg = <0>; - vcc-supply = <®_2v8_p>; - iovcc-supply = <®_1v8_p>; - reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>; - backlight = <&backlight>; - }; + #address-cells = <1>; + #size-cells = <0>; + panel@0 { + compatible = "rocktech,jh057n00900"; + reg = <0>; + vcc-supply = <®_2v8_p>; + iovcc-supply = <®_1v8_p>; + reset-gpios = <&gpio3 13 GPIO_ACTIVE_LOW>; + backlight = <&backlight>; + }; }; + ... diff --git a/Documentation/devicetree/bindings/display/panel/samsung,amoled-mipi-dsi.yaml b/Documentation/devicetree/bindings/display/panel/samsung,amoled-mipi-dsi.yaml index 96bdde9298e04..ccc482570d6a3 100644 --- a/Documentation/devicetree/bindings/display/panel/samsung,amoled-mipi-dsi.yaml +++ b/Documentation/devicetree/bindings/display/panel/samsung,amoled-mipi-dsi.yaml @@ -12,6 +12,17 @@ maintainers: allOf: - $ref: panel-common.yaml# + - if: + properties: + compatible: + contains: + enum: + - samsung,s6e3ha2 + - samsung,s6e3hf2 + then: + required: + - enable-gpios + properties: compatible: enum: @@ -39,7 +50,6 @@ required: - vdd3-supply - vci-supply - reset-gpios - - enable-gpios additionalProperties: false diff --git a/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml b/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml index a51660b73f28d..6f1f02044b4b3 100644 --- a/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml +++ b/Documentation/devicetree/bindings/display/panel/tpo,tpg110.yaml @@ -72,6 +72,8 @@ required: - spi-max-frequency - port +unevaluatedProperties: false + examples: - |+ spi { diff --git a/Documentation/devicetree/bindings/display/renesas,du.txt b/Documentation/devicetree/bindings/display/renesas,du.txt index 51cd4d1627703..7d65c24fcda87 100644 --- a/Documentation/devicetree/bindings/display/renesas,du.txt +++ b/Documentation/devicetree/bindings/display/renesas,du.txt @@ -3,6 +3,7 @@ Required Properties: - compatible: must be one of the following. + - "renesas,du-r8a7742" for R8A7742 (RZ/G1H) compatible DU - "renesas,du-r8a7743" for R8A7743 (RZ/G1M) compatible DU - "renesas,du-r8a7744" for R8A7744 (RZ/G1N) compatible DU - "renesas,du-r8a7745" for R8A7745 (RZ/G1E) compatible DU @@ -10,6 +11,7 @@ Required Properties: - "renesas,du-r8a774a1" for R8A774A1 (RZ/G2M) compatible DU - "renesas,du-r8a774b1" for R8A774B1 (RZ/G2N) compatible DU - "renesas,du-r8a774c0" for R8A774C0 (RZ/G2E) compatible DU + - "renesas,du-r8a774e1" for R8A774E1 (RZ/G2H) compatible DU - "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU - "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU - "renesas,du-r8a7791" for R8A7791 (R-Car M2-W) compatible DU @@ -18,6 +20,7 @@ Required Properties: - "renesas,du-r8a7794" for R8A7794 (R-Car E2) compatible DU - "renesas,du-r8a7795" for R8A7795 (R-Car H3) compatible DU - "renesas,du-r8a7796" for R8A7796 (R-Car M3-W) compatible DU + - "renesas,du-r8a77961" for R8A77961 (R-Car M3-W+) compatible DU - "renesas,du-r8a77965" for R8A77965 (R-Car M3-N) compatible DU - "renesas,du-r8a77970" for R8A77970 (R-Car V3M) compatible DU - "renesas,du-r8a77980" for R8A77980 (R-Car V3H) compatible DU @@ -68,6 +71,7 @@ corresponding to each DU output. Port0 Port1 Port2 Port3 ----------------------------------------------------------------------------- + R8A7742 (RZ/G1H) DPAD 0 LVDS 0 LVDS 1 - R8A7743 (RZ/G1M) DPAD 0 LVDS 0 - - R8A7744 (RZ/G1N) DPAD 0 LVDS 0 - - R8A7745 (RZ/G1E) DPAD 0 DPAD 1 - - @@ -75,6 +79,7 @@ corresponding to each DU output. R8A774A1 (RZ/G2M) DPAD 0 HDMI 0 LVDS 0 - R8A774B1 (RZ/G2N) DPAD 0 HDMI 0 LVDS 0 - R8A774C0 (RZ/G2E) DPAD 0 LVDS 0 LVDS 1 - + R8A774E1 (RZ/G2H) DPAD 0 HDMI 0 LVDS 0 - R8A7779 (R-Car H1) DPAD 0 DPAD 1 - - R8A7790 (R-Car H2) DPAD 0 LVDS 0 LVDS 1 - R8A7791 (R-Car M2-W) DPAD 0 LVDS 0 - - @@ -83,6 +88,7 @@ corresponding to each DU output. R8A7794 (R-Car E2) DPAD 0 DPAD 1 - - R8A7795 (R-Car H3) DPAD 0 HDMI 0 HDMI 1 LVDS 0 R8A7796 (R-Car M3-W) DPAD 0 HDMI 0 LVDS 0 - + R8A77961 (R-Car M3-W+) DPAD 0 HDMI 0 LVDS 0 - R8A77965 (R-Car M3-N) DPAD 0 HDMI 0 LVDS 0 - R8A77970 (R-Car V3M) DPAD 0 LVDS 0 - - R8A77980 (R-Car V3H) DPAD 0 LVDS 0 - - diff --git a/Documentation/devicetree/bindings/display/ssd1307fb.txt b/Documentation/devicetree/bindings/display/ssd1307fb.txt index 27333b9551b33..2dcb6d12d1371 100644 --- a/Documentation/devicetree/bindings/display/ssd1307fb.txt +++ b/Documentation/devicetree/bindings/display/ssd1307fb.txt @@ -19,6 +19,7 @@ Optional properties: - vbat-supply: The supply for VBAT - solomon,segment-no-remap: Display needs normal (non-inverted) data column to segment mapping + - solomon,col-offset: Offset of columns (COL/SEG) that the screen is mapped to. - solomon,com-seq: Display uses sequential COM pin configuration - solomon,com-lrremap: Display uses left-right COM pin remap - solomon,com-invdir: Display uses inverted COM pin scan direction diff --git a/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml b/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml index 69cc7e8bf15a1..327a14d85df85 100644 --- a/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml +++ b/Documentation/devicetree/bindings/display/st,stm32-dsi.yaml @@ -13,6 +13,9 @@ maintainers: description: The STMicroelectronics STM32 DSI controller uses the Synopsys DesignWare MIPI-DSI host controller. +allOf: + - $ref: dsi-controller.yaml# + properties: compatible: const: st,stm32-dsi @@ -65,24 +68,6 @@ properties: description: DSI output port node, connected to a panel or a bridge input port" -patternProperties: - "^(panel|panel-dsi)@[0-9]$": - type: object - description: - A node containing the panel or bridge description as documented in - Documentation/devicetree/bindings/display/mipi-dsi-bus.txt - properties: - port: - type: object - description: - Panel or bridge port node, connected to the DSI output port (port@1) - - "#address-cells": - const: 1 - - "#size-cells": - const: 0 - required: - "#address-cells" - "#size-cells" @@ -92,7 +77,7 @@ required: - clock-names - ports -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt index 47319214b5f6b..ac63ae4a38615 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.txt @@ -51,8 +51,16 @@ of the following host1x client modules: - vi - Tegra210: - power-domains: Must include venc powergate node as vi is in VE partition. - - Tegra210 has CSI part of VI sharing same host interface and register space. - So, VI device node should have CSI child node. + + ports (optional node) + vi can have optional ports node and max 6 ports are supported. Each port + should have single 'endpoint' child node. All port nodes are grouped under + ports node. Please refer to the bindings defined in + Documentation/devicetree/bindings/media/video-interfaces.txt + + csi (required node) + Tegra210 has CSI part of VI sharing same host interface and register space. + So, VI device node should have CSI child node. - csi: mipi csi interface to vi @@ -65,6 +73,46 @@ of the following host1x client modules: - power-domains: Must include sor powergate node as csicil is in SOR partition. + channel (optional nodes) + Maximum 6 channels are supported with each csi brick as either x4 or x2 + based on hw connectivity to sensor. + + Required properties: + - reg: csi port number. Valid port numbers are 0 through 5. + - nvidia,mipi-calibrate: Should contain a phandle and a specifier + specifying which pads are used by this CSI port and need to be + calibrated. See also ../display/tegra/nvidia,tegra114-mipi.txt. + + Each channel node must contain 2 port nodes which can be grouped + under 'ports' node and each port should have a single child 'endpoint' + node. + + ports node + Please refer to the bindings defined in + Documentation/devicetree/bindings/media/video-interfaces.txt + + ports node must contain below 2 port nodes. + port@0 with single child 'endpoint' node always a sink. + port@1 with single child 'endpoint' node always a source. + + port@0 (required node) + Required properties: + - reg: 0 + + endpoint (required node) + Required properties: + - data-lanes: an array of data lane from 1 to 4. Valid array + lengths are 1/2/4. + - remote-endpoint: phandle to sensor 'endpoint' node. + + port@1 (required node) + Required properties: + - reg: 1 + + endpoint (required node) + Required properties: + - remote-endpoint: phandle to vi port 'endpoint' node. + - epp: encoder pre-processor Required properties: @@ -340,6 +388,18 @@ Example: ranges = <0x0 0x0 0x54080000 0x2000>; + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + imx219_vi_in0: endpoint { + remote-endpoint = <&imx219_csi_out0>; + }; + }; + }; + csi@838 { compatible = "nvidia,tegra210-csi"; reg = <0x838 0x1300>; @@ -362,6 +422,34 @@ Example: <&tegra_car TEGRA210_CLK_CSI_TPG>; clock-names = "csi", "cilab", "cilcd", "cile", "csi_tpg"; power-domains = <&pd_sor>; + + #address-cells = <1>; + #size-cells = <0>; + + channel@0 { + reg = <0>; + nvidia,mipi-calibrate = <&mipi 0x001>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + imx219_csi_in0: endpoint { + data-lanes = <1 2>; + remote-endpoint = <&imx219_out0>; + }; + }; + + port@1 { + reg = <1>; + imx219_csi_out0: endpoint { + remote-endpoint = <&imx219_vi_in0>; + }; + }; + }; + }; }; }; diff --git a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt b/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt index 8b2a713956470..3e64075ac7ece 100644 --- a/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt +++ b/Documentation/devicetree/bindings/display/tilcdc/tilcdc.txt @@ -37,7 +37,7 @@ Optional nodes: supports a single port with a single endpoint. - See also Documentation/devicetree/bindings/display/tilcdc/panel.txt and - Documentation/devicetree/bindings/display/bridge/ti,tfp410.txt for connecting + Documentation/devicetree/bindings/display/bridge/ti,tfp410.yaml for connecting tfp410 DVI encoder or lcd panel to lcdc [1] There is an errata about AM335x color wiring. For 16-bit color mode diff --git a/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml b/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml index 9e53472be1947..372679dbd216f 100644 --- a/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml +++ b/Documentation/devicetree/bindings/dma/allwinner,sun50i-a64-dma.yaml @@ -19,9 +19,12 @@ properties: description: The cell is the request line number. compatible: - enum: - - allwinner,sun50i-a64-dma - - allwinner,sun50i-h6-dma + oneOf: + - const: allwinner,sun50i-a64-dma + - const: allwinner,sun50i-h6-dma + - items: + - const: allwinner,sun8i-r40-dma + - const: allwinner,sun50i-a64-dma reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/dma/dma-common.yaml b/Documentation/devicetree/bindings/dma/dma-common.yaml index c365926833407..307b499e89686 100644 --- a/Documentation/devicetree/bindings/dma/dma-common.yaml +++ b/Documentation/devicetree/bindings/dma/dma-common.yaml @@ -49,3 +49,5 @@ properties: required: - "#dma-cells" + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/dma/dma-controller.yaml b/Documentation/devicetree/bindings/dma/dma-controller.yaml index c39f6de76670d..0043b91da95e8 100644 --- a/Documentation/devicetree/bindings/dma/dma-controller.yaml +++ b/Documentation/devicetree/bindings/dma/dma-controller.yaml @@ -17,6 +17,8 @@ properties: $nodename: pattern: "^dma-controller(@.*)?$" +additionalProperties: true + examples: - | dma: dma-controller@48000000 { diff --git a/Documentation/devicetree/bindings/dma/dma-router.yaml b/Documentation/devicetree/bindings/dma/dma-router.yaml index 5b5f07393135d..4cee5667b8a8f 100644 --- a/Documentation/devicetree/bindings/dma/dma-router.yaml +++ b/Documentation/devicetree/bindings/dma/dma-router.yaml @@ -36,6 +36,8 @@ required: - "#dma-cells" - dma-masters +additionalProperties: true + examples: - | sdma_xbar: dma-router@4a002b78 { diff --git a/Documentation/devicetree/bindings/dma/ingenic,dma.yaml b/Documentation/devicetree/bindings/dma/ingenic,dma.yaml index 92794c5005890..00f19b3cac313 100644 --- a/Documentation/devicetree/bindings/dma/ingenic,dma.yaml +++ b/Documentation/devicetree/bindings/dma/ingenic,dma.yaml @@ -62,6 +62,8 @@ required: - interrupts - clocks +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml index 13f1a46be40dc..b548e4723936e 100644 --- a/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml +++ b/Documentation/devicetree/bindings/dma/renesas,rcar-dmac.yaml @@ -16,6 +16,7 @@ properties: compatible: items: - enum: + - renesas,dmac-r8a7742 # RZ/G1H - renesas,dmac-r8a7743 # RZ/G1M - renesas,dmac-r8a7744 # RZ/G1N - renesas,dmac-r8a7745 # RZ/G1E diff --git a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml index 20870f5c14dd0..ef1d6879c158d 100644 --- a/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml +++ b/Documentation/devicetree/bindings/dma/snps,dma-spear1340.yaml @@ -18,12 +18,15 @@ properties: const: snps,dma-spear1340 "#dma-cells": - const: 3 + minimum: 3 + maximum: 4 description: | First cell is a phandle pointing to the DMA controller. Second one is the DMA request line number. Third cell is the memory master identifier for transfers on dynamically allocated channel. Fourth cell is the - peripheral master identifier for transfers on an allocated channel. + peripheral master identifier for transfers on an allocated channel. Fifth + cell is an optional mask of the DMA channels permitted to be allocated + for the corresponding client device. reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml b/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml index 71987878e4ae1..2a5325f480f69 100644 --- a/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml +++ b/Documentation/devicetree/bindings/dma/st,stm32-dma.yaml @@ -81,6 +81,8 @@ required: - clocks - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml b/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml index 915bc4af95688..c8d2b51d8410e 100644 --- a/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml +++ b/Documentation/devicetree/bindings/dma/st,stm32-dmamux.yaml @@ -33,6 +33,8 @@ required: - reg - dma-masters +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml b/Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml index c66543d0c2677..c30be840be1c9 100644 --- a/Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml +++ b/Documentation/devicetree/bindings/dma/st,stm32-mdma.yaml @@ -84,6 +84,8 @@ required: - clocks - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml index dd70ddab4fd1d..9a87fd9041eba 100644 --- a/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml +++ b/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml @@ -141,6 +141,8 @@ then: required: - ti,udma-atype +unevaluatedProperties: false + examples: - |+ cbass_main { diff --git a/Documentation/devicetree/bindings/edac/amazon,al-mc-edac.yaml b/Documentation/devicetree/bindings/edac/amazon,al-mc-edac.yaml new file mode 100644 index 0000000000000..a25387df0865a --- /dev/null +++ b/Documentation/devicetree/bindings/edac/amazon,al-mc-edac.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/edac/amazon,al-mc-edac.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amazon's Annapurna Labs Memory Controller EDAC + +maintainers: + - Talel Shenhar + - Talel Shenhar + +description: | + EDAC node is defined to describe on-chip error detection and correction for + Amazon's Annapurna Labs Memory Controller. + +properties: + + compatible: + const: amazon,al-mc-edac + + reg: + maxItems: 1 + + "#address-cells": + const: 2 + + "#size-cells": + const: 2 + + interrupts: + minItems: 1 + maxItems: 2 + items: + - description: uncorrectable error interrupt + - description: correctable error interrupt + + interrupt-names: + minItems: 1 + maxItems: 2 + items: + - const: ue + - const: ce + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + + +examples: + - | + #include + soc { + #address-cells = <2>; + #size-cells = <2>; + edac@f0080000 { + #address-cells = <2>; + #size-cells = <2>; + compatible = "amazon,al-mc-edac"; + reg = <0x0 0xf0080000 0x0 0x00010000>; + interrupt-parent = <&amazon_al_system_fabric>; + interrupt-names = "ue"; + interrupts = <20 IRQ_TYPE_LEVEL_HIGH>; + }; + }; diff --git a/Documentation/devicetree/bindings/edac/dmc-520.yaml b/Documentation/devicetree/bindings/edac/dmc-520.yaml index 9272d2bd86342..3b6842e92d1b9 100644 --- a/Documentation/devicetree/bindings/edac/dmc-520.yaml +++ b/Documentation/devicetree/bindings/edac/dmc-520.yaml @@ -49,6 +49,8 @@ required: - interrupts - interrupt-names +additionalProperties: false + examples: - | dmc0: dmc@200000 { diff --git a/Documentation/devicetree/bindings/eeprom/at24.yaml b/Documentation/devicetree/bindings/eeprom/at24.yaml index 4cee72d533187..6edfa705b4860 100644 --- a/Documentation/devicetree/bindings/eeprom/at24.yaml +++ b/Documentation/devicetree/bindings/eeprom/at24.yaml @@ -114,6 +114,9 @@ properties: - const: renesas,r1ex24128 - const: atmel,24c128 + label: + description: Descriptive name of the EEPROM. + reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/eeprom/at25.txt b/Documentation/devicetree/bindings/eeprom/at25.txt deleted file mode 100644 index fcacd97abd0ae..0000000000000 --- a/Documentation/devicetree/bindings/eeprom/at25.txt +++ /dev/null @@ -1,45 +0,0 @@ -EEPROMs (SPI) compatible with Atmel at25. - -Required properties: -- compatible : Should be ",", and generic value "atmel,at25". - Example "," values: - "anvo,anv32e61w" - "microchip,25lc040" - "st,m95m02" - "st,m95256" - -- reg : chip select number -- spi-max-frequency : max spi frequency to use -- pagesize : size of the eeprom page -- size : total eeprom size in bytes -- address-width : number of address bits (one of 8, 9, 16, or 24). - For 9 bits, the MSB of the address is sent as bit 3 of the instruction - byte, before the address byte. - -Optional properties: -- spi-cpha : SPI shifted clock phase, as per spi-bus bindings. -- spi-cpol : SPI inverse clock polarity, as per spi-bus bindings. -- read-only : this parameter-less property disables writes to the eeprom -- wp-gpios : GPIO to which the write-protect pin of the chip is connected - -Obsolete legacy properties can be used in place of "size", "pagesize", -"address-width", and "read-only": -- at25,byte-len : total eeprom size in bytes -- at25,addr-mode : addr-mode flags, as defined in include/linux/spi/eeprom.h -- at25,page-size : size of the eeprom page - -Additional compatible properties are also allowed. - -Example: - eeprom@0 { - compatible = "st,m95256", "atmel,at25"; - reg = <0> - spi-max-frequency = <5000000>; - spi-cpha; - spi-cpol; - wp-gpios = <&gpio1 3 0>; - - pagesize = <64>; - size = <32768>; - address-width = <16>; - }; diff --git a/Documentation/devicetree/bindings/eeprom/at25.yaml b/Documentation/devicetree/bindings/eeprom/at25.yaml new file mode 100644 index 0000000000000..9810619a2b5c8 --- /dev/null +++ b/Documentation/devicetree/bindings/eeprom/at25.yaml @@ -0,0 +1,129 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/eeprom/at25.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: SPI EEPROMs compatible with Atmel's AT25 + +maintainers: + - Christian Eggers + +properties: + $nodename: + pattern: "^eeprom@[0-9a-f]{1,2}$" + + # There are multiple known vendors who manufacture EEPROM chips compatible + # with Atmel's AT25. The compatible string requires two items where the + # 'vendor' and 'model' parts of the first are the actual chip and the second + # item is fixed to "atmel,at25". Some existing bindings only have the + # "atmel,at25" part and should be fixed by somebody who knows vendor and + # product. + compatible: + oneOf: + - items: + - enum: + - anvo,anv32e61w + - atmel,at25256B + - fujitsu,mb85rs1mt + - fujitsu,mb85rs64 + - microchip,at25160bn + - microchip,25lc040 + - st,m95m02 + - st,m95256 + + - const: atmel,at25 + + # Please don't use this alternative for new bindings. + - items: + - const: atmel,at25 + + reg: + description: + Chip select number. + + spi-max-frequency: true + + pagesize: + $ref: /schemas/types.yaml#definitions/uint32 + enum: [1, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768, 65536, 131072] + description: + Size of the eeprom page. + + size: + $ref: /schemas/types.yaml#definitions/uint32 + description: + Total eeprom size in bytes. + + address-width: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 8, 9, 16, 24 ] + description: + Number of address bits. + For 9 bits, the MSB of the address is sent as bit 3 of the instruction + byte, before the address byte. + + spi-cpha: true + + spi-cpol: true + + read-only: + description: + Disable writes to the eeprom. + type: boolean + + wp-gpios: + maxItems: 1 + description: + GPIO to which the write-protect pin of the chip is connected. + + # Deprecated: at25,byte-len, at25,addr-mode, at25,page-size + at25,byte-len: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Total eeprom size in bytes. Deprecated, use "size" property instead. + deprecated: true + + at25,addr-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Addr-mode flags, as defined in include/linux/spi/eeprom.h. + Deprecated, use "address-width" property instead. + deprecated: true + + at25,page-size: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Size of the eeprom page. Deprecated, use "pagesize" property instead. + deprecated: true + +required: + - compatible + - reg + - spi-max-frequency + - pagesize + - size + - address-width + +additionalProperties: false + +examples: + - | + #include + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + eeprom@0 { + compatible = "st,m95256", "atmel,at25"; + reg = <0>; + spi-max-frequency = <5000000>; + spi-cpha; + spi-cpol; + wp-gpios = <&gpio1 3 0>; + + pagesize = <64>; + size = <32768>; + address-width = <16>; + }; + }; diff --git a/Documentation/devicetree/bindings/example-schema.yaml b/Documentation/devicetree/bindings/example-schema.yaml index 822975dbeafad..a97f39109f8d0 100644 --- a/Documentation/devicetree/bindings/example-schema.yaml +++ b/Documentation/devicetree/bindings/example-schema.yaml @@ -81,6 +81,8 @@ properties: maxItems: 1 description: bus clock. A description is only needed for a single item if there's something unique to add. + The items should have a fixed order, so pattern matching names are + discouraged. clock-names: items: @@ -97,6 +99,8 @@ properties: A variable number of interrupts warrants a description of what conditions affect the number of interrupts. Otherwise, descriptions on standard properties are not necessary. + The items should have a fixed order, so pattern matching names are + discouraged. interrupt-names: # minItems must be specified here because the default would be 2 @@ -196,14 +200,24 @@ required: # # If the conditionals become too unweldy, then it may be better to just split # the binding into separate schema documents. -if: - properties: - compatible: - contains: - const: vendor,soc2-ip -then: - required: - - foo-supply +allOf: + - if: + properties: + compatible: + contains: + const: vendor,soc2-ip + then: + required: + - foo-supply + # Altering schema depending on presence of properties is usually done by + # dependencies (see above), however some adjustments might require if: + - if: + required: + - vendor,bool-property + then: + properties: + vendor,int-property: + enum: [2, 4, 6] # Ideally, the schema should have this line otherwise any other properties # present are allowed. There's a few common properties such as 'status' and @@ -211,6 +225,9 @@ then: # # This can't be used in cases where another schema is referenced # (i.e. allOf: [{$ref: ...}]). +# If and only if another schema is referenced and arbitrary children nodes can +# appear, "unevaluatedProperties: false" could be used. A typical example is +# an I2C controller where no name pattern matching for children can be added. additionalProperties: false examples: diff --git a/Documentation/devicetree/bindings/extcon/extcon-ptn5150.txt b/Documentation/devicetree/bindings/extcon/extcon-ptn5150.txt deleted file mode 100644 index 936fbdf12815d..0000000000000 --- a/Documentation/devicetree/bindings/extcon/extcon-ptn5150.txt +++ /dev/null @@ -1,27 +0,0 @@ -* PTN5150 CC (Configuration Channel) Logic device - -PTN5150 is a small thin low power CC logic chip supporting the USB Type-C -connector application with CC control logic detection and indication functions. -It is interfaced to the host controller using an I2C interface. - -Required properties: -- compatible: should be "nxp,ptn5150" -- reg: specifies the I2C slave address of the device -- int-gpio: should contain a phandle and GPIO specifier for the GPIO pin - connected to the PTN5150's INTB pin. -- vbus-gpio: should contain a phandle and GPIO specifier for the GPIO pin which - is used to control VBUS. -- pinctrl-names : a pinctrl state named "default" must be defined. -- pinctrl-0 : phandle referencing pin configuration of interrupt and vbus - control. - -Example: - ptn5150@1d { - compatible = "nxp,ptn5150"; - reg = <0x1d>; - int-gpio = <&msmgpio 78 GPIO_ACTIVE_HIGH>; - vbus-gpio = <&msmgpio 148 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&ptn5150_default>; - status = "okay"; - }; diff --git a/Documentation/devicetree/bindings/extcon/extcon-ptn5150.yaml b/Documentation/devicetree/bindings/extcon/extcon-ptn5150.yaml new file mode 100644 index 0000000000000..4b0f414486d28 --- /dev/null +++ b/Documentation/devicetree/bindings/extcon/extcon-ptn5150.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/extcon/extcon-ptn5150.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PTN5150 CC (Configuration Channel) Logic device + +maintainers: + - Krzysztof Kozlowski + +description: | + PTN5150 is a small thin low power CC logic chip supporting the USB Type-C + connector application with CC control logic detection and indication + functions. It is interfaced to the host controller using an I2C interface. + +properties: + compatible: + const: nxp,ptn5150 + + int-gpios: + deprecated: true + description: + GPIO pin (input) connected to the PTN5150's INTB pin. + Use "interrupts" instead. + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + vbus-gpios: + description: + GPIO pin (output) used to control VBUS. If skipped, no such control + takes place. + +required: + - compatible + - interrupts + - reg + +additionalProperties: false + +examples: + - | + #include + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + ptn5150@1d { + compatible = "nxp,ptn5150"; + reg = <0x1d>; + interrupt-parent = <&msmgpio>; + interrupts = <78 IRQ_TYPE_LEVEL_HIGH>; + vbus-gpios = <&msmgpio 148 GPIO_ACTIVE_HIGH>; + }; + }; diff --git a/Documentation/devicetree/bindings/extcon/wlf,arizona.yaml b/Documentation/devicetree/bindings/extcon/wlf,arizona.yaml index f9845dc2f5ae5..5fe784f487c5e 100644 --- a/Documentation/devicetree/bindings/extcon/wlf,arizona.yaml +++ b/Documentation/devicetree/bindings/extcon/wlf,arizona.yaml @@ -123,3 +123,5 @@ properties: $ref: "/schemas/types.yaml#/definitions/uint32" minimum: 0 maximum: 3 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/fsi/fsi-master-aspeed.txt b/Documentation/devicetree/bindings/fsi/fsi-master-aspeed.txt index b758f91914f79..9853fefff5d83 100644 --- a/Documentation/devicetree/bindings/fsi/fsi-master-aspeed.txt +++ b/Documentation/devicetree/bindings/fsi/fsi-master-aspeed.txt @@ -12,6 +12,13 @@ Required properties: - pinctrl-0: phandle to pinctrl node - pinctrl-names: pinctrl state +Optional properties: + - cfam-reset-gpios: GPIO for CFAM reset + + - fsi-routing-gpios: GPIO for setting the FSI mux (internal or cabled) + - fsi-mux-gpios: GPIO for detecting the desired FSI mux state + + Examples: fsi-master { @@ -21,4 +28,9 @@ Examples: pinctrl-names = "default"; pinctrl-0 = <&pinctrl_fsi1_default>; clocks = <&syscon ASPEED_CLK_GATE_FSICLK>; + + fsi-routing-gpios = <&gpio0 ASPEED_GPIO(Q, 7) GPIO_ACTIVE_HIGH>; + fsi-mux-gpios = <&gpio0 ASPEED_GPIO(B, 0) GPIO_ACTIVE_HIGH>; + + cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_LOW>; }; diff --git a/Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml b/Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml index b26d4b4be743f..e425278653f5b 100644 --- a/Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml +++ b/Documentation/devicetree/bindings/fsi/ibm,fsi2spi.yaml @@ -19,6 +19,7 @@ properties: compatible: enum: - ibm,fsi2spi + - ibm,fsi2spi-restricted reg: items: @@ -28,6 +29,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | fsi2spi@1c00 { diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt index 2aaf661c04eee..b109911669e4b 100644 --- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt +++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.txt @@ -7,6 +7,7 @@ Required properties: For Tegra132 must contain "nvidia,tegra132-efuse", "nvidia,tegra124-efuse". For Tegra210 must contain "nvidia,tegra210-efuse". For Tegra186 must contain "nvidia,tegra186-efuse". For Tegra194 must contain "nvidia,tegra194-efuse". + For Tegra234 must contain "nvidia,tegra234-efuse". Details: nvidia,tegra20-efuse: Tegra20 requires using APB DMA to read the fuse data due to a hardware bug. Tegra20 also lacks certain information which is diff --git a/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml index 0b223abe8cfb7..f57d22d1ebd6e 100644 --- a/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/fsl-imx-gpio.yaml @@ -11,12 +11,33 @@ maintainers: properties: compatible: - enum: - - fsl,imx1-gpio - - fsl,imx21-gpio - - fsl,imx31-gpio - - fsl,imx35-gpio - - fsl,imx7d-gpio + oneOf: + - enum: + - fsl,imx1-gpio + - fsl,imx21-gpio + - fsl,imx31-gpio + - fsl,imx35-gpio + - fsl,imx7d-gpio + - items: + - const: fsl,imx35-gpio + - const: fsl,imx31-gpio + - items: + - enum: + - fsl,imx50-gpio + - fsl,imx51-gpio + - fsl,imx53-gpio + - fsl,imx6q-gpio + - fsl,imx6sl-gpio + - fsl,imx6sll-gpio + - fsl,imx6sx-gpio + - fsl,imx6ul-gpio + - fsl,imx7d-gpio + - fsl,imx8mm-gpio + - fsl,imx8mn-gpio + - fsl,imx8mp-gpio + - fsl,imx8mq-gpio + - fsl,imx8qxp-gpio + - const: fsl,imx35-gpio reg: maxItems: 1 @@ -41,6 +62,28 @@ properties: const: 2 gpio-controller: true + gpio-line-names: true + gpio-ranges: true + + power-domains: + maxItems: 1 + +patternProperties: + "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$": + type: object + properties: + gpio-hog: true + gpios: true + input: true + output-high: true + output-low: true + line-name: true + + required: + - gpio-hog + - gpios + + additionalProperties: false required: - compatible diff --git a/Documentation/devicetree/bindings/gpio/gpio-max732x.txt b/Documentation/devicetree/bindings/gpio/gpio-max732x.txt deleted file mode 100644 index b3a9c0c328231..0000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-max732x.txt +++ /dev/null @@ -1,58 +0,0 @@ -* MAX732x-compatible I/O expanders - -Required properties: - - compatible: Should be one of the following: - - "maxim,max7319": For the Maxim MAX7319 - - "maxim,max7320": For the Maxim MAX7320 - - "maxim,max7321": For the Maxim MAX7321 - - "maxim,max7322": For the Maxim MAX7322 - - "maxim,max7323": For the Maxim MAX7323 - - "maxim,max7324": For the Maxim MAX7324 - - "maxim,max7325": For the Maxim MAX7325 - - "maxim,max7326": For the Maxim MAX7326 - - "maxim,max7327": For the Maxim MAX7327 - - reg: I2C slave address for this device. - - gpio-controller: Marks the device node as a GPIO controller. - - #gpio-cells: Should be 2. - - first cell is the GPIO number - - second cell specifies GPIO flags, as defined in . - Only the GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. - -Optional properties: - - The I/O expander can detect input state changes, and thus optionally act as - an interrupt controller. When the expander interrupt line is connected all the - following properties must be set. For more information please see the - interrupt controller device tree bindings documentation available at - Documentation/devicetree/bindings/interrupt-controller/interrupts.txt. - - - interrupt-controller: Identifies the node as an interrupt controller. - - #interrupt-cells: Number of cells to encode an interrupt source, shall be 2. - - first cell is the pin number - - second cell is used to specify flags - - interrupts: Interrupt specifier for the controllers interrupt. - -Please refer to gpio.txt in this directory for details of the common GPIO -bindings used by client devices. - -Example 1. MAX7325 with interrupt support enabled (CONFIG_GPIO_MAX732X_IRQ=y): - - expander: max7325@6d { - compatible = "maxim,max7325"; - reg = <0x6d>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - interrupt-parent = <&gpio4>; - interrupts = <29 IRQ_TYPE_EDGE_FALLING>; - }; - -Example 2. MAX7325 with interrupt support disabled (CONFIG_GPIO_MAX732X_IRQ=n): - - expander: max7325@6d { - compatible = "maxim,max7325"; - reg = <0x6d>; - gpio-controller; - #gpio-cells = <2>; - }; diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt b/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt deleted file mode 100644 index 3126c3817e2ab..0000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt +++ /dev/null @@ -1,90 +0,0 @@ -* NXP PCA953x I2C GPIO multiplexer - -Required properties: - - compatible: Has to contain one of the following: - nxp,pca6416 - nxp,pca9505 - nxp,pca9534 - nxp,pca9535 - nxp,pca9536 - nxp,pca9537 - nxp,pca9538 - nxp,pca9539 - nxp,pca9554 - nxp,pca9555 - nxp,pca9556 - nxp,pca9557 - nxp,pca9574 - nxp,pca9575 - nxp,pca9698 - nxp,pcal6416 - nxp,pcal6524 - nxp,pcal9535 - nxp,pcal9555a - maxim,max7310 - maxim,max7312 - maxim,max7313 - maxim,max7315 - ti,pca6107 - ti,pca9536 - ti,tca6408 - ti,tca6416 - ti,tca6424 - ti,tca9539 - ti,tca9554 - onnn,cat9554 - onnn,pca9654 - exar,xra1202 - - gpio-controller: if used as gpio expander. - - #gpio-cells: if used as gpio expander. - - interrupt-controller: if to be used as interrupt expander. - - #interrupt-cells: if to be used as interrupt expander. - -Optional properties: - - interrupts: interrupt specifier for the device's interrupt output. - - reset-gpios: GPIO specification for the RESET input. This is an - active low signal to the PCA953x. - - vcc-supply: power supply regulator. - -Example: - - - gpio@20 { - compatible = "nxp,pca9505"; - reg = <0x20>; - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_pca9505>; - gpio-controller; - #gpio-cells = <2>; - interrupt-parent = <&gpio3>; - interrupts = <23 IRQ_TYPE_LEVEL_LOW>; - }; - - -Example with Interrupts: - - - gpio99: gpio@22 { - compatible = "nxp,pcal6524"; - reg = <0x22>; - interrupt-parent = <&gpio6>; - interrupts = <1 IRQ_TYPE_EDGE_FALLING>; /* gpio6_161 */ - interrupt-controller; - #interrupt-cells = <2>; - vcc-supply = <&vdds_1v8_main>; - gpio-controller; - #gpio-cells = <2>; - gpio-line-names = - "hdmi-ct-hpd", "hdmi.ls-oe", "p02", "p03", "vibra", "fault2", "p06", "p07", - "en-usb", "en-host1", "en-host2", "chg-int", "p14", "p15", "mic-int", "en-modem", - "shdn-hs-amp", "chg-status+red", "green", "blue", "en-esata", "fault1", "p26", "p27"; - }; - - ts3a227@3b { - compatible = "ti,ts3a227e"; - reg = <0x3b>; - interrupt-parent = <&gpio99>; - interrupts = <14 IRQ_TYPE_EDGE_RISING>; - ti,micbias = <0>; /* 2.1V */ - }; - diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml new file mode 100644 index 0000000000000..183ec23eda39b --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-pca95xx.yaml @@ -0,0 +1,232 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/gpio-pca95xx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP PCA95xx I2C GPIO multiplexer + +maintainers: + - Krzysztof Kozlowski + +description: |+ + Bindings for the family of I2C GPIO multiplexers/expanders: NXP PCA95xx, + Maxim MAX73xx + +properties: + compatible: + enum: + - exar,xra1202 + - maxim,max7310 + - maxim,max7312 + - maxim,max7313 + - maxim,max7315 + - maxim,max7319 + - maxim,max7320 + - maxim,max7321 + - maxim,max7322 + - maxim,max7323 + - maxim,max7324 + - maxim,max7325 + - maxim,max7326 + - maxim,max7327 + - nxp,pca6416 + - nxp,pca9505 + - nxp,pca9534 + - nxp,pca9535 + - nxp,pca9536 + - nxp,pca9537 + - nxp,pca9538 + - nxp,pca9539 + - nxp,pca9554 + - nxp,pca9555 + - nxp,pca9556 + - nxp,pca9557 + - nxp,pca9574 + - nxp,pca9575 + - nxp,pca9698 + - nxp,pcal6416 + - nxp,pcal6524 + - nxp,pcal9535 + - nxp,pcal9555a + - onnn,cat9554 + - onnn,pca9654 + - ti,pca6107 + - ti,pca9536 + - ti,tca6408 + - ti,tca6416 + - ti,tca6424 + - ti,tca9539 + - ti,tca9554 + + reg: + maxItems: 1 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + gpio-line-names: + minItems: 1 + maxItems: 32 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + reset-gpios: + description: + GPIO specification for the RESET input. This is an active low signal to + the PCA953x. Not valid for Maxim MAX732x devices. + + vcc-supply: + description: + Optional power supply. Not valid for Maxim MAX732x devices. + + wakeup-source: + $ref: /schemas/types.yaml#/definitions/flag + +patternProperties: + "^(hog-[0-9]+|.+-hog(-[0-9]+)?)$": + type: object + properties: + gpio-hog: true + gpios: true + input: true + output-high: true + output-low: true + line-name: true + + required: + - gpio-hog + - gpios + + additionalProperties: false + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + +additionalProperties: false + +allOf: + - if: + properties: + compatible: + contains: + enum: + - maxim,max7320 + - maxim,max7321 + - maxim,max7322 + - maxim,max7323 + - maxim,max7324 + - maxim,max7325 + - maxim,max7326 + - maxim,max7327 + then: + properties: + reset-gpios: false + vcc-supply: false + +examples: + - | + #include + #include + + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + gpio@20 { + compatible = "nxp,pca9505"; + reg = <0x20>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_pca9505>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&gpio3>; + interrupts = <23 IRQ_TYPE_LEVEL_LOW>; + + usb3-sata-sel-hog { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "usb3_sata_sel"; + }; + }; + }; + + - | + #include + + i2c1 { + #address-cells = <1>; + #size-cells = <0>; + + gpio99: gpio@22 { + compatible = "nxp,pcal6524"; + reg = <0x22>; + interrupt-parent = <&gpio6>; + interrupts = <1 IRQ_TYPE_EDGE_FALLING>; /* gpio6_161 */ + interrupt-controller; + #interrupt-cells = <2>; + vcc-supply = <&vdds_1v8_main>; + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "hdmi-ct-hpd", "hdmi.ls-oe", "p02", "p03", + "vibra", "fault2", "p06", "p07", "en-usb", + "en-host1", "en-host2", "chg-int", "p14", "p15", + "mic-int", "en-modem", "shdn-hs-amp", + "chg-status+red", "green", "blue", "en-esata", + "fault1", "p26", "p27"; + }; + + ts3a227@3b { + compatible = "ti,ts3a227e"; + reg = <0x3b>; + interrupt-parent = <&gpio99>; + interrupts = <14 IRQ_TYPE_EDGE_RISING>; + ti,micbias = <0>; /* 2.1V */ + }; + }; + + - | + #include + + i2c2 { + #address-cells = <1>; + #size-cells = <0>; + + /* MAX7325 with interrupt support enabled */ + gpio@6d { + compatible = "maxim,max7325"; + reg = <0x6d>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupt-parent = <&gpio4>; + interrupts = <29 IRQ_TYPE_EDGE_FALLING>; + }; + }; + + - | + i2c3 { + #address-cells = <1>; + #size-cells = <0>; + + /* MAX7325 with interrupt support disabled */ + gpio@6e { + compatible = "maxim,max7325"; + reg = <0x6e>; + gpio-controller; + #gpio-cells = <2>; + }; + }; diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.txt b/Documentation/devicetree/bindings/gpio/gpio-vf610.txt deleted file mode 100644 index ae254aadee354..0000000000000 --- a/Documentation/devicetree/bindings/gpio/gpio-vf610.txt +++ /dev/null @@ -1,63 +0,0 @@ -* Freescale VF610 PORT/GPIO module - -The Freescale PORT/GPIO modules are two adjacent modules providing GPIO -functionality. Each pair serves 32 GPIOs. The VF610 has 5 instances of -each, and each PORT module has its own interrupt. - -Required properties for GPIO node: -- compatible : Should be "fsl,-gpio", below is supported list: - "fsl,vf610-gpio" - "fsl,imx7ulp-gpio" -- reg : The first reg tuple represents the PORT module, the second tuple - the GPIO module. -- interrupts : Should be the port interrupt shared by all 32 pins. -- gpio-controller : Marks the device node as a gpio controller. -- #gpio-cells : Should be two. The first cell is the pin number and - the second cell is used to specify the gpio polarity: - 0 = active high - 1 = active low -- interrupt-controller: Marks the device node as an interrupt controller. -- #interrupt-cells : Should be 2. The first cell is the GPIO number. - The second cell bits[3:0] is used to specify trigger type and level flags: - 1 = low-to-high edge triggered. - 2 = high-to-low edge triggered. - 4 = active high level-sensitive. - 8 = active low level-sensitive. - -Optional properties: --clocks: Must contain an entry for each entry in clock-names. - See common clock-bindings.txt for details. --clock-names: A list of clock names. For imx7ulp, it must contain - "gpio", "port". - -Note: Each GPIO port should have an alias correctly numbered in "aliases" -node. - -Examples: - -aliases { - gpio0 = &gpio1; - gpio1 = &gpio2; -}; - -gpio1: gpio@40049000 { - compatible = "fsl,vf610-gpio"; - reg = <0x40049000 0x1000 0x400ff000 0x40>; - interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&iomuxc 0 0 32>; -}; - -gpio2: gpio@4004a000 { - compatible = "fsl,vf610-gpio"; - reg = <0x4004a000 0x1000 0x400ff040 0x40>; - interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - gpio-ranges = <&iomuxc 0 32 32>; -}; diff --git a/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml new file mode 100644 index 0000000000000..19738a457a58c --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/gpio-vf610.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/gpio-vf610.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale VF610 PORT/GPIO module + +maintainers: + - Stefan Agner + +description: | + The Freescale PORT/GPIO modules are two adjacent modules providing GPIO + functionality. Each pair serves 32 GPIOs. The VF610 has 5 instances of + each, and each PORT module has its own interrupt. + + Note: Each GPIO port should have an alias correctly numbered in "aliases" + node. + +properties: + compatible: + oneOf: + - const: fsl,vf610-gpio + - items: + - const: fsl,imx7ulp-gpio + - const: fsl,vf610-gpio + + reg: + description: The first reg tuple represents the PORT module, the second tuple + represents the GPIO module. + maxItems: 2 + + interrupts: + maxItems: 1 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + "#gpio-cells": + const: 2 + + gpio-controller: true + + clocks: + items: + - description: SoC GPIO clock + - description: SoC PORT clock + + clock-names: + items: + - const: gpio + - const: port + + gpio-ranges: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - "#interrupt-cells" + - "#gpio-cells" + - gpio-controller + +additionalProperties: false + +examples: + - | + #include + + gpio1: gpio@40049000 { + compatible = "fsl,vf610-gpio"; + reg = <0x40049000 0x1000>, <0x400ff000 0x40>; + interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&iomuxc 0 0 32>; + }; diff --git a/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml new file mode 100644 index 0000000000000..e2d2c10e536a6 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/kontron,sl28cpld-gpio.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/kontron,sl28cpld-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: GPIO driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + + There are three flavors of the GPIO controller, one full featured + input/output with interrupt support (kontron,sl28cpld-gpio), one + output-only (kontron,sl28-gpo) and one input-only (kontron,sl28-gpi). + + Each controller supports 8 GPIO lines. + +properties: + compatible: + enum: + - kontron,sl28cpld-gpio + - kontron,sl28cpld-gpi + - kontron,sl28cpld-gpo + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#interrupt-cells": + const: 2 + + interrupt-controller: true + + "#gpio-cells": + const: 2 + + gpio-controller: true + + gpio-line-names: + minItems: 1 + maxItems: 8 + +required: + - compatible + - "#gpio-cells" + - gpio-controller + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml b/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml index 313b172292475..bd35cbf7fa09c 100644 --- a/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/pl061-gpio.yaml @@ -51,7 +51,10 @@ properties: gpio-controller: true + gpio-line-names: true + gpio-ranges: + minItems: 1 maxItems: 8 required: diff --git a/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml b/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml index 3ad229307bd55..5026662e45081 100644 --- a/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml @@ -37,6 +37,7 @@ properties: - renesas,gpio-r8a774a1 # RZ/G2M - renesas,gpio-r8a774b1 # RZ/G2N - renesas,gpio-r8a774c0 # RZ/G2E + - renesas,gpio-r8a774e1 # RZ/G2H - renesas,gpio-r8a7795 # R-Car H3 - renesas,gpio-r8a7796 # R-Car M3-W - renesas,gpio-r8a77961 # R-Car M3-W+ diff --git a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml index 1240f62892491..b391cc1b45906 100644 --- a/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/snps,dw-apb-gpio.yaml @@ -61,8 +61,14 @@ patternProperties: '#gpio-cells': const: 2 + ngpios: + default: 32 + minimum: 1 + maximum: 32 + snps,nr-gpios: description: The number of GPIO pins exported by the port. + deprecated: true $ref: /schemas/types.yaml#/definitions/uint32 default: 32 minimum: 1 diff --git a/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml b/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml index c58ff9a94f45d..1a54db04f29d8 100644 --- a/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml +++ b/Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml @@ -64,6 +64,8 @@ required: - gpio-ranges - socionext,interrupt-ranges +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml index 80d519a76db29..e9c42b59f30f8 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml @@ -74,6 +74,7 @@ properties: - const: bus mali-supply: true + opp-table: true power-domains: maxItems: 1 diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml index 6226d31ec4b7a..eceaa176bd57e 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml @@ -8,7 +8,7 @@ title: ARM Mali Utgard GPU maintainers: - Rob Herring - - Maxime Ripard + - Maxime Ripard - Heiko Stuebner properties: @@ -25,6 +25,7 @@ properties: - allwinner,sun4i-a10-mali - allwinner,sun7i-a20-mali - allwinner,sun8i-h3-mali + - allwinner,sun8i-r40-mali - allwinner,sun50i-a64-mali - rockchip,rk3036-mali - rockchip,rk3066-mali @@ -100,6 +101,8 @@ properties: mali-supply: true + opp-table: true + power-domains: maxItems: 1 @@ -129,6 +132,7 @@ allOf: enum: - allwinner,sun4i-a10-mali - allwinner,sun7i-a20-mali + - allwinner,sun8i-r40-mali - allwinner,sun50i-a64-mali - allwinner,sun50i-h5-mali - amlogic,meson8-mali diff --git a/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml b/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml index 665c6e3b31d32..62486f55177d7 100644 --- a/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml +++ b/Documentation/devicetree/bindings/gpu/samsung-rotator.yaml @@ -22,6 +22,12 @@ properties: interrupts: maxItems: 1 + iommus: + maxItems: 1 + + power-domains: + maxItems: 1 + clocks: maxItems: 1 diff --git a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml index 4843df1ddbb66..3ed1726299740 100644 --- a/Documentation/devicetree/bindings/gpu/vivante,gc.yaml +++ b/Documentation/devicetree/bindings/gpu/vivante,gc.yaml @@ -21,12 +21,19 @@ properties: interrupts: maxItems: 1 + '#cooling-cells': + const: 2 + + assigned-clock-parents: true + assigned-clock-rates: true + assigned-clocks: true + clocks: items: - description: AXI/master interface clock - description: GPU core clock - description: Shader clock (only required if GPU has feature PIPE_3D) - - description: AHB/slave interface clock (only required if GPU can gate + - description: AHB/slave interface clock (only required if GPU can gate slave interface independently) minItems: 1 maxItems: 4 diff --git a/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt b/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt deleted file mode 100644 index 8d365f89694ce..0000000000000 --- a/Documentation/devicetree/bindings/hwlock/omap-hwspinlock.txt +++ /dev/null @@ -1,41 +0,0 @@ -TI HwSpinlock for OMAP and K3 based SoCs -========================================= - -Required properties: -- compatible: Should be one of the following, - "ti,omap4-hwspinlock" for - OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs - "ti,am654-hwspinlock" for - K3 AM65x and J721E SoCs -- reg: Contains the hwspinlock module register address space - (base address and length) -- ti,hwmods: Name of the hwmod associated with the hwspinlock device - (for OMAP architecture based SoCs only) -- #hwlock-cells: Should be 1. The OMAP hwspinlock users will use a - 0-indexed relative hwlock number as the argument - specifier value for requesting a specific hwspinlock - within a hwspinlock bank. - -Please look at the generic hwlock binding for usage information for consumers, -"Documentation/devicetree/bindings/hwlock/hwlock.txt" - -Example: - -1. OMAP4 SoCs -hwspinlock: spinlock@4a0f6000 { - compatible = "ti,omap4-hwspinlock"; - reg = <0x4a0f6000 0x1000>; - ti,hwmods = "spinlock"; - #hwlock-cells = <1>; -}; - -2. AM65x SoCs and J721E SoCs -&cbass_main { - cbass_main_navss: interconnect0 { - hwspinlock: spinlock@30e00000 { - compatible = "ti,am654-hwspinlock"; - reg = <0x00 0x30e00000 0x00 0x1000>; - #hwlock-cells = <1>; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml new file mode 100644 index 0000000000000..ac35491a6f65c --- /dev/null +++ b/Documentation/devicetree/bindings/hwlock/ti,omap-hwspinlock.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwlock/ti,omap-hwspinlock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI HwSpinlock for OMAP and K3 based SoCs + +maintainers: + - Suman Anna + +properties: + compatible: + enum: + - ti,omap4-hwspinlock # for OMAP44xx, OMAP54xx, AM33xx, AM43xx, DRA7xx SoCs + - ti,am654-hwspinlock # for K3 AM65x, J721E and J7200 SoCs + + reg: + maxItems: 1 + + "#hwlock-cells": + const: 1 + description: | + The OMAP hwspinlock users will use a 0-indexed relative hwlock number as + the argument specifier value for requesting a specific hwspinlock within + a hwspinlock bank. + + Please look at the generic hwlock binding for usage information for + consumers, "Documentation/devicetree/bindings/hwlock/hwlock.txt" + +required: + - compatible + - reg + - "#hwlock-cells" + +additionalProperties: false + +examples: + + - | + /* OMAP4 SoCs */ + hwspinlock: spinlock@4a0f6000 { + compatible = "ti,omap4-hwspinlock"; + reg = <0x4a0f6000 0x1000>; + #hwlock-cells = <1>; + }; + + - | + / { + /* K3 AM65x SoCs */ + model = "Texas Instruments K3 AM654 SoC"; + compatible = "ti,am654-evm", "ti,am654"; + #address-cells = <2>; + #size-cells = <2>; + + bus@100000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ + <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>; /* Main NavSS */ + + bus@30800000 { + compatible = "simple-mfd"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x30800000 0x00 0x30800000 0x00 0x0bc00000>; + + spinlock@30e00000 { + compatible = "ti,am654-hwspinlock"; + reg = <0x00 0x30e00000 0x00 0x1000>; + #hwlock-cells = <1>; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml b/Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml new file mode 100644 index 0000000000000..43b4f4f57b499 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/adi,adm1266.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/adi,adm1266.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADM1266 Cascadable Super Sequencer with Margin + Control and Fault Recording + +maintainers: + - Alexandru Tachici + +description: | + Analog Devices ADM1266 Cascadable Super Sequencer with Margin + Control and Fault Recording. + https://www.analog.com/media/en/technical-documentation/data-sheets/ADM1266.pdf + +properties: + compatible: + enum: + - adi,adm1266 + + reg: + description: | + I2C address of slave device. + items: + minimum: 0x40 + maximum: 0x4F + + avcc-supply: + description: | + Phandle to the Avcc power supply. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + adm1266@40 { + compatible = "adi,adm1266"; + reg = <0x40>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml b/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml index 7898b9dba5a58..6747b870f2978 100644 --- a/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml +++ b/Documentation/devicetree/bindings/hwmon/adi,axi-fan-control.yaml @@ -44,6 +44,8 @@ required: - interrupts - pulses-per-revolution +additionalProperties: false + examples: - | fpga_axi: fpga-axi { diff --git a/Documentation/devicetree/bindings/hwmon/adt7475.yaml b/Documentation/devicetree/bindings/hwmon/adt7475.yaml index dfa821c0aaccf..ad0ec9f35bd8e 100644 --- a/Documentation/devicetree/bindings/hwmon/adt7475.yaml +++ b/Documentation/devicetree/bindings/hwmon/adt7475.yaml @@ -65,6 +65,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/hwmon/baikal,bt1-pvt.yaml b/Documentation/devicetree/bindings/hwmon/baikal,bt1-pvt.yaml index 84ae4cdd08ed1..00a6511354e6c 100644 --- a/Documentation/devicetree/bindings/hwmon/baikal,bt1-pvt.yaml +++ b/Documentation/devicetree/bindings/hwmon/baikal,bt1-pvt.yaml @@ -79,7 +79,7 @@ properties: minimum: 0 maximum: 7130 -unevaluatedProperties: false +additionalProperties: false required: - compatible @@ -99,7 +99,7 @@ examples: interrupts = ; - baikal,pvt-temp-trim-millicelsius = <1000>; + baikal,pvt-temp-offset-millicelsius = <1000>; clocks = <&ccu_sys>, <&ccu_sys>; clock-names = "ref", "pclk"; diff --git a/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml new file mode 100644 index 0000000000000..010333cb25c0e --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/kontron,sl28cpld-hwmon.yaml @@ -0,0 +1,27 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/kontron,sl28cpld-hwmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hardware monitoring driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + +properties: + compatible: + enum: + - kontron,sl28cpld-fan + + reg: + maxItems: 1 + +required: + - compatible + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/hwmon/lm75.txt b/Documentation/devicetree/bindings/hwmon/lm75.txt deleted file mode 100644 index 273616702c51b..0000000000000 --- a/Documentation/devicetree/bindings/hwmon/lm75.txt +++ /dev/null @@ -1,39 +0,0 @@ -*LM75 hwmon sensor. - -Required properties: -- compatible: manufacturer and chip name, one of - "adi,adt75", - "dallas,ds1775", - "dallas,ds75", - "dallas,ds7505", - "gmt,g751", - "national,lm75", - "national,lm75a", - "national,lm75b", - "maxim,max6625", - "maxim,max6626", - "maxim,max31725", - "maxim,max31726", - "maxim,mcp980x", - "nxp,pct2075", - "st,stds75", - "st,stlm75", - "microchip,tcn75", - "ti,tmp100", - "ti,tmp101", - "ti,tmp105", - "ti,tmp112", - "ti,tmp175", - "ti,tmp275", - "ti,tmp75", - "ti,tmp75b", - "ti,tmp75c", - -- reg: I2C bus address of the device - -Example: - -sensor@48 { - compatible = "st,stlm75"; - reg = <0x48>; -}; diff --git a/Documentation/devicetree/bindings/hwmon/lm75.yaml b/Documentation/devicetree/bindings/hwmon/lm75.yaml new file mode 100644 index 0000000000000..96eed5cc7841b --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/lm75.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/lm75.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LM75 hwmon sensor + +maintainers: + - Jean Delvare + - Guenter Roeck + +properties: + compatible: + enum: + - adi,adt75 + - dallas,ds1775 + - dallas,ds75 + - dallas,ds7505 + - gmt,g751 + - national,lm75 + - national,lm75a + - national,lm75b + - maxim,max6625 + - maxim,max6626 + - maxim,max31725 + - maxim,max31726 + - maxim,mcp980x + - nxp,pct2075 + - st,stds75 + - st,stlm75 + - microchip,tcn75 + - ti,tmp100 + - ti,tmp101 + - ti,tmp105 + - ti,tmp112 + - ti,tmp175 + - ti,tmp275 + - ti,tmp75 + - ti,tmp75b + - ti,tmp75c + + reg: + maxItems: 1 + + vs-supply: + description: phandle to the regulator that provides the +VS supply + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + sensor@48 { + compatible = "st,stlm75"; + reg = <0x48>; + vs-supply = <&vs>; + }; + }; diff --git a/Documentation/devicetree/bindings/hwmon/maxim,max20730.yaml b/Documentation/devicetree/bindings/hwmon/maxim,max20730.yaml new file mode 100644 index 0000000000000..93e86e3b4602a --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/maxim,max20730.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- + +$id: http://devicetree.org/schemas/hwmon/maxim,max20730.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim max20730 + +maintainers: + - Jean Delvare + - Guenter Roeck + +description: | + The MAX20730 is a fully integrated, highly efficient switching regulator + with PMBus for applications operating from 4.5V to 16V and requiring + up to 25A (max) load. This single-chip regulator provides extremely + compact, high efficiency power-delivery solutions with high-precision + output voltages and excellent transient response. + + Datasheets: + https://datasheets.maximintegrated.com/en/ds/MAX20730.pdf + https://datasheets.maximintegrated.com/en/ds/MAX20734.pdf + https://datasheets.maximintegrated.com/en/ds/MAX20743.pdf + +properties: + compatible: + enum: + - maxim,max20730 + - maxim,max20734 + - maxim,max20743 + + reg: + maxItems: 1 + + vout-voltage-divider: + description: | + If voltage divider present at vout, the voltage at voltage sensor pin + will be scaled. The properties will convert the raw reading to a more + meaningful number if voltage divider present. It has two numbers, + the first number is the output resistor, the second number is the total + resistance. Therefore, the adjusted vout is equal to + Vout = Vout * output_resistance / total resistance. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 2 + maxItems: 2 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + max20730@10 { + compatible = "maxim,max20730"; + reg = <0x10>; + vout-voltage-divider = <1000 2000>; // vout would be scaled to 0.5 + }; + }; diff --git a/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml b/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml new file mode 100644 index 0000000000000..6f3e3c01f7172 --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/moortec,mr75203.yaml @@ -0,0 +1,71 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/moortec,mr75203.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Moortec Semiconductor MR75203 PVT Controller bindings + +maintainers: + - Rahul Tanwar + +properties: + compatible: + const: moortec,mr75203 + + reg: + items: + - description: PVT common registers + - description: PVT temprature sensor registers + - description: PVT process detector registers + - description: PVT voltage monitor registers + + reg-names: + items: + - const: common + - const: ts + - const: pd + - const: vm + + intel,vm-map: + description: + PVT controller has 5 VM (voltage monitor) sensors. + vm-map defines CPU core to VM instance mapping. A + value of 0xff means that VM sensor is unused. + $ref: /schemas/types.yaml#definitions/uint8-array + maxItems: 5 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + "#thermal-sensor-cells": + const: 1 + +required: + - compatible + - reg + - reg-names + - intel,vm-map + - clocks + - resets + - "#thermal-sensor-cells" + +additionalProperties: false + +examples: + - | + pvt: pvt@e0680000 { + compatible = "moortec,mr75203"; + reg = <0xe0680000 0x80>, + <0xe0680080 0x180>, + <0xe0680200 0x200>, + <0xe0680400 0xc00>; + reg-names = "common", "ts", "pd", "vm"; + intel,vm-map = [03 01 04 ff ff]; + clocks = <&osc0>; + resets = <&rcu0 0x40 7>; + #thermal-sensor-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml b/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml new file mode 100644 index 0000000000000..c523a1beb2b7c --- /dev/null +++ b/Documentation/devicetree/bindings/hwmon/sensirion,shtc1.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwmon/sensirion,shtc1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Sensirion SHTC1 Humidity and Temperature Sensor IC + +maintainers: + - Christopher Ruehl chris.ruehl@gtsys.com.hk + +description: | + The SHTC1, SHTW1 and SHTC3 are digital humidity and temperature sensor + designed especially for battery-driven high-volume consumer electronics + applications. + For further information refere to Documentation/hwmon/shtc1.rst + + This binding document describes the binding for the hardware monitor + portion of the driver. + +properties: + compatible: + enum: + - sensirion,shtc1 + - sensirion,shtw1 + - sensirion,shtc3 + + reg: + const: 0x70 + + sensirion,blocking-io: + $ref: /schemas/types.yaml#definitions/flag + description: + If set, the driver hold the i2c bus until measurement is finished. + + sensirion,low-precision: + $ref: /schemas/types.yaml#definitions/flag + description: + If set, the sensor aquire data with low precision (not recommended). + The driver aquire data with high precision by default. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + clock-frequency = <400000>; + + shtc3@70 { + compatible = "sensirion,shtc3"; + reg = <0x70>; + sensirion,blocking-io; + }; + }; +... diff --git a/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml b/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml index 49cad273c8e5c..6ecb0270d88d8 100644 --- a/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/amlogic,meson6-i2c.yaml @@ -36,6 +36,8 @@ required: - interrupts - clocks +unevaluatedProperties: false + examples: - | i2c@c8100500 { diff --git a/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml b/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml index dc0952f3780fe..1ca1cd19bd1dd 100644 --- a/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml +++ b/Documentation/devicetree/bindings/i2c/cdns,i2c-r1p10.yaml @@ -44,6 +44,8 @@ required: - clocks - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml b/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml index 78ffcab2428cf..cc3aa2a5e70bf 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-gpio.yaml @@ -70,4 +70,6 @@ required: - sda-gpios - scl-gpios +unevaluatedProperties: false + ... diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml index ac0bc5dd64d67..29b9447f3b84a 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-imx-lpi2c.yaml @@ -9,12 +9,18 @@ title: Freescale Low Power Inter IC (LPI2C) for i.MX maintainers: - Anson Huang +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + properties: compatible: - enum: - - fsl,imx7ulp-lpi2c - - fsl,imx8qxp-lpi2c - - fsl,imx8qm-lpi2c + oneOf: + - enum: + - fsl,imx7ulp-lpi2c + - fsl,imx8qm-lpi2c + - items: + - const: fsl,imx8qxp-lpi2c + - const: fsl,imx7ulp-lpi2c reg: maxItems: 1 @@ -22,23 +28,34 @@ properties: interrupts: maxItems: 1 + assigned-clock-parents: true + assigned-clock-rates: true + assigned-clocks: true + clock-frequency: true + + clock-names: + maxItems: 1 + clocks: maxItems: 1 + power-domains: + maxItems: 1 + required: - compatible - reg - interrupts - clocks -additionalProperties: false +unevaluatedProperties: false examples: - | #include #include - lpi2c7@40a50000 { + i2c@40a50000 { compatible = "fsl,imx7ulp-lpi2c"; reg = <0x40A50000 0x10000>; interrupt-parent = <&intc>; diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml index 810536953177f..f23966b0d6c6c 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-imx.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-imx.yaml @@ -9,6 +9,9 @@ title: Freescale Inter IC (I2C) and High Speed Inter IC (HS-I2C) for i.MX maintainers: - Wolfram Sang +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + properties: compatible: oneOf: @@ -18,6 +21,9 @@ properties: - items: - const: fsl,imx35-i2c - const: fsl,imx1-i2c + - items: + - const: fsl,imx7d-i2c + - const: fsl,imx21-i2c - items: - enum: - fsl,imx25-i2c @@ -75,7 +81,7 @@ required: - interrupts - clocks -additionalProperties: false +unevaluatedProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml index 790aa7218ee0f..7f254d79558c8 100644 --- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml +++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.yaml @@ -117,6 +117,8 @@ then: required: - rockchip,grf +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/i2c/i2c.txt b/Documentation/devicetree/bindings/i2c/i2c.txt index a21c359b9f026..df41f72afc878 100644 --- a/Documentation/devicetree/bindings/i2c/i2c.txt +++ b/Documentation/devicetree/bindings/i2c/i2c.txt @@ -87,6 +87,11 @@ wants to support one of the below features, it should adapt these bindings. this information to detect a stalled bus more reliably, for example. Can not be combined with 'multi-master'. +- smbus + states that additional SMBus restrictions and features apply to this bus. + Examples of features are SMBusHostNotify and SMBusAlert. Examples of + restrictions are more reserved addresses and timeout definitions. + Required properties (per child device) -------------------------------------- diff --git a/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml b/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml index 682ed1bbf5c6f..0e7b4b8a7e48d 100644 --- a/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/ingenic,i2c.yaml @@ -17,9 +17,13 @@ properties: pattern: "^i2c@[0-9a-f]+$" compatible: - enum: - - ingenic,jz4780-i2c - - ingenic,x1000-i2c + oneOf: + - enum: + - ingenic,jz4770-i2c + - ingenic,x1000-i2c + - items: + - const: ingenic,jz4780-i2c + - const: ingenic,jz4770-i2c reg: maxItems: 1 @@ -60,7 +64,7 @@ examples: #include #include i2c@10054000 { - compatible = "ingenic,jz4780-i2c"; + compatible = "ingenic,jz4780-i2c", "ingenic,jz4770-i2c"; #address-cells = <1>; #size-cells = <0>; reg = <0x10054000 0x1000>; diff --git a/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt new file mode 100644 index 0000000000000..566ea861aa000 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/mellanox,i2c-mlxbf.txt @@ -0,0 +1,42 @@ +Device tree configuration for the Mellanox I2C SMBus on BlueField SoCs + +Required Properties: + +- compatible : should be "mellanox,i2c-mlxbf1" or "mellanox,i2c-mlxbf2". + +- reg : address offset and length of the device registers. The + registers consist of the following set of resources: + 1) Smbus block registers. + 2) Cause master registers. + 3) Cause slave registers. + 4) Cause coalesce registers (if compatible isn't set + to "mellanox,i2c-mlxbf1"). + +- interrupts : interrupt number. + +Optional Properties: + +- clock-frequency : bus frequency used to configure timing registers; + allowed values are 100000, 400000 and 1000000; + those are expressed in Hz. Default is 100000. + +Example: + +i2c@2804000 { + compatible = "mellanox,i2c-mlxbf1"; + reg = <0x02804000 0x800>, + <0x02801200 0x020>, + <0x02801260 0x020>; + interrupts = <57>; + clock-frequency = <100000>; +}; + +i2c@2808800 { + compatible = "mellanox,i2c-mlxbf2"; + reg = <0x02808800 0x600>, + <0x02808e00 0x020>, + <0x02808e20 0x020>, + <0x02808e40 0x010>; + interrupts = <57>; + clock-frequency = <400000>; +}; diff --git a/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml b/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml index 15abc022968e2..c76131902b77b 100644 --- a/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml +++ b/Documentation/devicetree/bindings/i2c/socionext,uniphier-fi2c.yaml @@ -37,6 +37,8 @@ required: - interrupts - clocks +unevaluatedProperties: false + examples: - | i2c0: i2c@58780000 { diff --git a/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml b/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml index ef998def554e0..ddde08636ab07 100644 --- a/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/socionext,uniphier-i2c.yaml @@ -37,6 +37,8 @@ required: - interrupts - clocks +unevaluatedProperties: false + examples: - | i2c0: i2c@58400000 { diff --git a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml index f2fcbb3611803..d747f4990ad8b 100644 --- a/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml +++ b/Documentation/devicetree/bindings/i2c/st,stm32-i2c.yaml @@ -94,6 +94,8 @@ required: - resets - clocks +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml b/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml index 67c1c84ba3dc2..ffb2ed039a5eb 100644 --- a/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml +++ b/Documentation/devicetree/bindings/i2c/xlnx,xps-iic-2.00.a.yaml @@ -36,6 +36,8 @@ required: - interrupts - clocks +unevaluatedProperties: false + examples: - | axi_iic_0: i2c@40800000 { diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml index 4147f02b5e3c2..4fcbfd93e2189 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adis16240.yaml @@ -25,11 +25,15 @@ properties: interrupts: maxItems: 1 + spi-max-frequency: true + required: - compatible - reg - interrupts +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml index fd4eaa3d0ab41..11d32a2885352 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl345.yaml @@ -32,6 +32,8 @@ properties: spi-cpol: true + spi-max-frequency: true + interrupts: maxItems: 1 @@ -40,6 +42,8 @@ required: - reg - interrupts +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml index e7daffec88d36..38b59b6454ce7 100644 --- a/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml +++ b/Documentation/devicetree/bindings/iio/accel/adi,adxl372.yaml @@ -25,11 +25,15 @@ properties: interrupts: maxItems: 1 + spi-max-frequency: true + required: - compatible - reg - interrupts +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml b/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml index d61ab4fa3d71e..390b87242fcbf 100644 --- a/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml +++ b/Documentation/devicetree/bindings/iio/accel/kionix,kxsd9.yaml @@ -29,10 +29,14 @@ properties: mount-matrix: description: an optional 3x3 mounting rotation matrix. + spi-max-frequency: true + required: - compatible - reg +additionalProperties: false + examples: - | # include diff --git a/Documentation/devicetree/bindings/iio/adc/ad7949.txt b/Documentation/devicetree/bindings/iio/adc/ad7949.txt deleted file mode 100644 index c7f5057356b19..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/ad7949.txt +++ /dev/null @@ -1,16 +0,0 @@ -* Analog Devices AD7949/AD7682/AD7689 - -Required properties: - - compatible: Should be one of - * "adi,ad7949" - * "adi,ad7682" - * "adi,ad7689" - - reg: spi chip select number for the device - - vref-supply: The regulator supply for ADC reference voltage - -Example: -adc@0 { - compatible = "adi,ad7949"; - reg = <0>; - vref-supply = <&vdd_supply>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml index deb34deff0e87..f1c574c896cb4 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7124.yaml @@ -52,6 +52,8 @@ properties: avdd-supply: description: avdd supply can be used as reference for conversion. + spi-max-frequency: true + required: - compatible - reg @@ -108,6 +110,8 @@ patternProperties: - reg - diff-channels +additionalProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml index d0913034b1d8d..e0cc3b2e89574 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml @@ -30,6 +30,8 @@ properties: spi-cpha: true + spi-max-frequency: true + clocks: maxItems: 1 description: phandle to the master clock (mclk) @@ -92,6 +94,8 @@ required: - spi-cpol - spi-cpha +additionalProperties: false + examples: - | spi0 { diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml new file mode 100644 index 0000000000000..6feafb7e531e3 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7291.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7291.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AD7291 8-Channel, I2C, 12-Bit SAR ADC with Temperature Sensor + +maintainers: + - Michael Auchter + +description: | + Analog Devices AD7291 8-Channel I2C 12-Bit SAR ADC with Temperature Sensor + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7291.pdf + +properties: + compatible: + enum: + - adi,ad7291 + + reg: + maxItems: 1 + + vref-supply: + description: | + The regulator supply for ADC reference voltage. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + ad7291: adc@0 { + compatible = "adi,ad7291"; + reg = <0>; + vref-supply = <&adc_vref>; + }; + }; +... \ No newline at end of file diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml index e1f6d64bdccd1..108d202b288f7 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7292.yaml @@ -30,6 +30,8 @@ properties: spi-cpha: true + spi-max-frequency: true + '#address-cells': const: 1 @@ -63,6 +65,8 @@ patternProperties: required: - reg +additionalProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml index cbb8819d70693..73775174cf57d 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7606.yaml @@ -31,6 +31,10 @@ properties: spi-cpha: true + spi-cpol: true + + spi-max-frequency: true + avcc-supply: true interrupts: @@ -102,6 +106,8 @@ required: - interrupts - adi,conversion-start-gpios +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.txt b/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.txt deleted file mode 100644 index 9f5b88cf680d6..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.txt +++ /dev/null @@ -1,41 +0,0 @@ -Analog Devices AD7768-1 ADC device driver - -Required properties for the AD7768-1: - -- compatible: Must be "adi,ad7768-1" -- reg: SPI chip select number for the device -- spi-max-frequency: Max SPI frequency to use - see: Documentation/devicetree/bindings/spi/spi-bus.txt -- clocks: phandle to the master clock (mclk) - see: Documentation/devicetree/bindings/clock/clock-bindings.txt -- clock-names: Must be "mclk". -- interrupts: IRQ line for the ADC - see: Documentation/devicetree/bindings/interrupt-controller/interrupts.txt -- vref-supply: vref supply can be used as reference for conversion -- adi,sync-in-gpios: must be the device tree identifier of the SYNC-IN pin. Enables - synchronization of multiple devices that require simultaneous sampling. - A pulse is always required if the configuration is changed in any way, for example - if the filter decimation rate changes. As the line is active low, it should - be marked GPIO_ACTIVE_LOW. - -Optional properties: - - - reset-gpios : GPIO spec for the RESET pin. If specified, it will be asserted during - driver probe. As the line is active low, it should be marked GPIO_ACTIVE_LOW. - -Example: - - adc@0 { - compatible = "adi,ad7768-1"; - reg = <0>; - spi-max-frequency = <2000000>; - spi-cpol; - spi-cpha; - vref-supply = <&adc_vref>; - interrupts = <25 IRQ_TYPE_EDGE_RISING>; - interrupt-parent = <&gpio>; - adi,sync-in-gpios = <&gpio 22 GPIO_ACTIVE_LOW>; - reset-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; - clocks = <&ad7768_mclk>; - clock-names = "mclk"; - }; diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml new file mode 100644 index 0000000000000..d3733ad8785ae --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7768-1.yaml @@ -0,0 +1,89 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7768-1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7768-1 ADC device driver + +maintainers: + - Michael Hennerich + +description: | + Datasheet at: + https://www.analog.com/media/en/technical-documentation/data-sheets/ad7768-1.pdf + +properties: + compatible: + const: adi,ad7768-1 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: mclk + + interrupts: + maxItems: 1 + + vref-supply: + description: + ADC reference voltage supply + + adi,sync-in-gpios: + description: + Enables synchronization of multiple devices that require simultaneous + sampling. A pulse is always required if the configuration is changed + in any way, for example if the filter decimation rate changes. + As the line is active low, it should be marked GPIO_ACTIVE_LOW. + + reset-gpios: + maxItems: 1 + + spi-max-frequency: true + + spi-cpol: true + spi-cpha : true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - vref-supply + - spi-cpol + - spi-cpha + - adi,sync-in-gpios + +additionalProperties: false + +examples: + - | + #include + #include + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad7768-1"; + reg = <0>; + spi-max-frequency = <2000000>; + spi-cpol; + spi-cpha; + vref-supply = <&adc_vref>; + interrupts = <25 IRQ_TYPE_EDGE_RISING>; + interrupt-parent = <&gpio>; + adi,sync-in-gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + reset-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; + clocks = <&ad7768_mclk>; + clock-names = "mclk"; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml index a11b918e0016f..e82194974eea6 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7923.yaml @@ -43,10 +43,14 @@ properties: '#size-cells': const: 0 + spi-max-frequency: true + required: - compatible - reg +additionalProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml new file mode 100644 index 0000000000000..9b56bd4d5510d --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7949.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7949.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7949/AD7682/AD7689 analog to digital converters + +maintainers: + - Charles-Antoine Couret + +description: | + Specifications on the converters can be found at: + AD7949: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7949.pdf + AD7682/AD7698: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7682_7689.pdf + +properties: + compatible: + enum: + - adi,ad7682 + - adi,ad7689 + - adi,ad7949 + + reg: + maxItems: 1 + + vref-supply: + description: + ADC reference voltage supply + + spi-max-frequency: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad7949"; + reg = <0>; + vref-supply = <&vdd_supply>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml index c4f57fa6aad12..b5aed40d8a501 100644 --- a/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad9467.yaml @@ -4,21 +4,30 @@ $id: http://devicetree.org/schemas/iio/adc/adi,ad9467.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Analog Devices AD9467 High-Speed ADC +title: Analog Devices AD9467 and similar High-Speed ADCs maintainers: - Michael Hennerich - Alexandru Ardelean description: | - The AD9467 is a 16-bit, monolithic, IF sampling analog-to-digital - converter (ADC). + The AD9467 and the parts similar with it, are high-speed analog-to-digital + converters (ADCs), operating in the range of 100 to 500 mega samples + per second (MSPS). Some parts support higher MSPS and some + lower MSPS, suitable for the intended application of each part. + All the parts support the register map described by Application Note AN-877 + https://www.analog.com/media/en/technical-documentation/application-notes/AN-877.pdf + + https://www.analog.com/media/en/technical-documentation/data-sheets/AD9265.pdf + https://www.analog.com/media/en/technical-documentation/data-sheets/AD9434.pdf https://www.analog.com/media/en/technical-documentation/data-sheets/AD9467.pdf properties: compatible: enum: + - adi,ad9265 + - adi,ad9434 - adi,ad9467 reg: diff --git a/Documentation/devicetree/bindings/iio/adc/ads1015.txt b/Documentation/devicetree/bindings/iio/adc/ads1015.txt deleted file mode 100644 index 918a507d1159f..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/ads1015.txt +++ /dev/null @@ -1,73 +0,0 @@ -ADS1015 (I2C) - -This device is a 12-bit A-D converter with 4 inputs. - -The inputs can be used single ended or in certain differential combinations. - -For configuration all possible combinations are mapped to 8 channels: - 0: Voltage over AIN0 and AIN1. - 1: Voltage over AIN0 and AIN3. - 2: Voltage over AIN1 and AIN3. - 3: Voltage over AIN2 and AIN3. - 4: Voltage over AIN0 and GND. - 5: Voltage over AIN1 and GND. - 6: Voltage over AIN2 and GND. - 7: Voltage over AIN3 and GND. - -Each channel can be configured individually: - - pga is the programmable gain amplifier (values are full scale) - 0: +/- 6.144 V - 1: +/- 4.096 V - 2: +/- 2.048 V (default) - 3: +/- 1.024 V - 4: +/- 0.512 V - 5: +/- 0.256 V - - data_rate in samples per second - 0: 128 - 1: 250 - 2: 490 - 3: 920 - 4: 1600 (default) - 5: 2400 - 6: 3300 - -1) The /ads1015 node - - Required properties: - - - compatible : must be "ti,ads1015" - - reg : I2C bus address of the device - - #address-cells : must be <1> - - #size-cells : must be <0> - - The node contains child nodes for each channel that the platform uses. - - Example ADS1015 node: - - ads1015@49 { - compatible = "ti,ads1015"; - reg = <0x49>; - #address-cells = <1>; - #size-cells = <0>; - - [ child node definitions... ] - } - -2) channel nodes - - Required properties: - - - reg : the channel number - - Optional properties: - - - ti,gain : the programmable gain amplifier setting - - ti,datarate : the converter data rate - - Example ADS1015 channel node: - - channel@4 { - reg = <4>; - ti,gain = <3>; - ti,datarate = <5>; - }; diff --git a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt deleted file mode 100644 index d57e9df25f4fa..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.txt +++ /dev/null @@ -1,48 +0,0 @@ -* Amlogic Meson SAR (Successive Approximation Register) A/D converter - -Required properties: -- compatible: depending on the SoC this should be one of: - - "amlogic,meson8-saradc" for Meson8 - - "amlogic,meson8b-saradc" for Meson8b - - "amlogic,meson8m2-saradc" for Meson8m2 - - "amlogic,meson-gxbb-saradc" for GXBB - - "amlogic,meson-gxl-saradc" for GXL - - "amlogic,meson-gxm-saradc" for GXM - - "amlogic,meson-axg-saradc" for AXG - - "amlogic,meson-g12a-saradc" for AXG - along with the generic "amlogic,meson-saradc" -- reg: the physical base address and length of the registers -- interrupts: the interrupt indicating end of sampling -- clocks: phandle and clock identifier (see clock-names) -- clock-names: mandatory clocks: - - "clkin" for the reference clock (typically XTAL) - - "core" for the SAR ADC core clock - optional clocks: - - "adc_clk" for the ADC (sampling) clock - - "adc_sel" for the ADC (sampling) clock mux -- vref-supply: the regulator supply for the ADC reference voltage -- #io-channel-cells: must be 1, see ../iio-bindings.txt - -Optional properties: -- amlogic,hhi-sysctrl: phandle to the syscon which contains the 5th bit - of the TSC (temperature sensor coefficient) on - Meson8b and Meson8m2 (which used to calibrate the - temperature sensor) -- nvmem-cells: phandle to the temperature_calib eFuse cells -- nvmem-cell-names: if present (to enable the temperature sensor - calibration) this must contain "temperature_calib" - - -Example: - saradc: adc@8680 { - compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; - #io-channel-cells = <1>; - reg = <0x0 0x8680 0x0 0x34>; - interrupts = ; - clocks = <&xtal>, - <&clkc CLKID_SAR_ADC>, - <&clkc CLKID_SANA>, - <&clkc CLKID_SAR_ADC_CLK>, - <&clkc CLKID_SAR_ADC_SEL>; - clock-names = "clkin", "core", "sana", "adc_clk", "adc_sel"; - }; diff --git a/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml new file mode 100644 index 0000000000000..3be8955587e4f --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/amlogic,meson-saradc.yaml @@ -0,0 +1,149 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Amlogic Meson SAR (Successive Approximation Register) A/D converter + +maintainers: + - Martin Blumenstingl + +description: + Binding covers a range of ADCs found on Amlogic Meson SoCs. + +properties: + compatible: + oneOf: + - const: amlogic,meson-saradc + - items: + - enum: + - amlogic,meson8-saradc + - amlogic,meson8b-saradc + - amlogic,meson8m2-saradc + - amlogic,meson-gxbb-saradc + - amlogic,meson-gxl-saradc + - amlogic,meson-gxm-saradc + - amlogic,meson-axg-saradc + - amlogic,meson-g12a-saradc + - const: amlogic,meson-saradc + + reg: + maxItems: 1 + + interrupts: + description: Interrupt indicates end of sampling. + maxItems: 1 + + clocks: + minItems: 2 + maxItems: 4 + + clock-names: + minItems: 2 + maxItems: 4 + items: + - const: clkin + - const: core + - const: adc_clk + - const: adc_sel + + vref-supply: true + + "#io-channel-cells": + const: 1 + + amlogic,hhi-sysctrl: + $ref: /schemas/types.yaml#/definitions/phandle + description: + Syscon which contains the 5th bit of the TSC (temperature sensor + coefficient) on Meson8b and Meson8m2 (which used to calibrate the + temperature sensor) + + nvmem-cells: + description: phandle to the temperature_calib eFuse cells + maxItems: 1 + + nvmem-cell-names: + const: temperature_calib + +allOf: + - if: + properties: + compatible: + contains: + enum: + - amlogic,meson8-saradc + - amlogic,meson8b-saradc + - amlogic,meson8m2-saradc + then: + properties: + clocks: + maxItems: 2 + clock-names: + maxItems: 2 + else: + properties: + nvmem-cells: false + mvmem-cel-names: false + clocks: + minItems: 4 + clock-names: + minItems: 4 + + - if: + properties: + compatible: + contains: + enum: + - amlogic,meson8b-saradc + - amlogic,meson8m2-saradc + then: + properties: + amlogic,hhi-sysctrl: true + else: + properties: + amlogic,hhi-sysctrl: false + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include + #include + #include + soc { + #address-cells = <2>; + #size-cells = <2>; + adc@8680 { + compatible = "amlogic,meson-gxl-saradc", "amlogic,meson-saradc"; + #io-channel-cells = <1>; + reg = <0x0 0x8680 0x0 0x34>; + interrupts = ; + clocks = <&xtal>, + <&clkc CLKID_SAR_ADC>, + <&clkc CLKID_SAR_ADC_CLK>, + <&clkc CLKID_SAR_ADC_SEL>; + clock-names = "clkin", "core", "adc_clk", "adc_sel"; + }; + adc@9680 { + compatible = "amlogic,meson8b-saradc", "amlogic,meson-saradc"; + #io-channel-cells = <1>; + reg = <0x0 0x9680 0x0 0x34>; + interrupts = ; + clocks = <&xtal>, <&clkc CLKID_SAR_ADC>; + clock-names = "clkin", "core"; + nvmem-cells = <&tsens_caldata>; + nvmem-cell-names = "temperature_calib"; + amlogic,hhi-sysctrl = <&hhi>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/aspeed,ast2400-adc.yaml b/Documentation/devicetree/bindings/iio/adc/aspeed,ast2400-adc.yaml new file mode 100644 index 0000000000000..7f534a933e924 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/aspeed,ast2400-adc.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/aspeed,ast2400-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ADC that forms part of an ASPEED server management processor. + +maintainers: + - Joel Stanley + +description: + This device is a 10-bit converter for 16 voltage channels. All inputs are + single ended. + +properties: + compatible: + enum: + - aspeed,ast2400-adc + - aspeed,ast2500-adc + + reg: + maxItems: 1 + + clocks: + description: + Input clock used to derive the sample clock. Expected to be the + SoC's APB clock. + + resets: + maxItems: 1 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - resets + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include + adc@1e6e9000 { + compatible = "aspeed,ast2400-adc"; + reg = <0x1e6e9000 0xb0>; + clocks = <&syscon ASPEED_CLK_APB>; + resets = <&syscon ASPEED_RESET_ADC>; + #io-channel-cells = <1>; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt b/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt deleted file mode 100644 index 034fc2ba100e7..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt +++ /dev/null @@ -1,22 +0,0 @@ -Aspeed ADC - -This device is a 10-bit converter for 16 voltage channels. All inputs are -single ended. - -Required properties: -- compatible: Should be "aspeed,ast2400-adc" or "aspeed,ast2500-adc" -- reg: memory window mapping address and length -- clocks: Input clock used to derive the sample clock. Expected to be the - SoC's APB clock. -- resets: Reset controller phandle -- #io-channel-cells: Must be set to <1> to indicate channels are selected - by index. - -Example: - adc@1e6e9000 { - compatible = "aspeed,ast2400-adc"; - reg = <0x1e6e9000 0xb0>; - clocks = <&syscon ASPEED_CLK_APB>; - resets = <&syscon ASPEED_RESET_ADC>; - #io-channel-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/iio/adc/berlin2_adc.txt b/Documentation/devicetree/bindings/iio/adc/berlin2_adc.txt deleted file mode 100644 index 908334c6b07f5..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/berlin2_adc.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Berlin Analog to Digital Converter (ADC) - -The Berlin ADC has 8 channels, with one connected to a temperature sensor. -It is part of the system controller register set. The ADC node should be a -sub-node of the system controller node. - -Required properties: -- compatible: must be "marvell,berlin2-adc" -- interrupts: the interrupts for the ADC and the temperature sensor -- interrupt-names: should be "adc" and "tsen" - -Example: - -adc: adc { - compatible = "marvell,berlin2-adc"; - interrupt-parent = <&sic>; - interrupts = <12>, <14>; - interrupt-names = "adc", "tsen"; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/cc10001_adc.txt b/Documentation/devicetree/bindings/iio/adc/cc10001_adc.txt deleted file mode 100644 index 904f76de90552..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/cc10001_adc.txt +++ /dev/null @@ -1,22 +0,0 @@ -* Cosmic Circuits - Analog to Digital Converter (CC-10001-ADC) - -Required properties: - - compatible: Should be "cosmic,10001-adc" - - reg: Should contain adc registers location and length. - - clock-names: Should contain "adc". - - clocks: Should contain a clock specifier for each entry in clock-names - - vref-supply: The regulator supply ADC reference voltage. - -Optional properties: - - adc-reserved-channels: Bitmask of reserved channels, - i.e. channels that cannot be used by the OS. - -Example: -adc: adc@18101600 { - compatible = "cosmic,10001-adc"; - reg = <0x18101600 0x24>; - adc-reserved-channels = <0x2>; - clocks = <&adc_clk>; - clock-names = "adc"; - vref-supply = <®_1v8>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/cosmic,10001-adc.yaml b/Documentation/devicetree/bindings/iio/adc/cosmic,10001-adc.yaml new file mode 100644 index 0000000000000..5d92b477e23f9 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/cosmic,10001-adc.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/cosmic,10001-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Cosmic Circuits CC-10001 ADC + +maintainers: + - Jonathan Cameron + +description: + Cosmic Circuits 10001 10-bit ADC device. + +properties: + compatible: + const: cosmic,10001-adc + + reg: + maxItems: 1 + + adc-reserved-channels: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Bitmask of reserved channels, i.e. channels that cannot be + used by the OS. + + clocks: + maxItems: 1 + + clock-names: + const: adc + + vref-supply: true + + "#io-channel-cells": + const: 1 + + +required: + - compatible + - reg + - clocks + - clock-names + - vref-supply + +additionalProperties: false + +examples: + - | + adc@18101600 { + compatible = "cosmic,10001-adc"; + reg = <0x18101600 0x24>; + adc-reserved-channels = <0x2>; + clocks = <&adc_clk>; + clock-names = "adc"; + vref-supply = <®_1v8>; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/cpcap-adc.txt b/Documentation/devicetree/bindings/iio/adc/cpcap-adc.txt deleted file mode 100644 index ec04008e8f4fd..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/cpcap-adc.txt +++ /dev/null @@ -1,17 +0,0 @@ -Motorola CPCAP PMIC ADC binding - -Required properties: -- compatible: Should be "motorola,cpcap-adc" or "motorola,mapphone-cpcap-adc" -- interrupts: The interrupt number for the ADC device -- interrupt-names: Should be "adcdone" -- #io-channel-cells: Number of cells in an IIO specifier - -Example: - -cpcap_adc: adc { - compatible = "motorola,mapphone-cpcap-adc"; - interrupt-parent = <&cpcap>; - interrupts = <8 IRQ_TYPE_NONE>; - interrupt-names = "adcdone"; - #io-channel-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/da9150-gpadc.txt b/Documentation/devicetree/bindings/iio/adc/da9150-gpadc.txt deleted file mode 100644 index c07228da92acf..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/da9150-gpadc.txt +++ /dev/null @@ -1,16 +0,0 @@ -Dialog Semiconductor DA9150 IIO GPADC bindings - -Required properties: -- compatible: "dlg,da9150-gpadc" for DA9150 IIO GPADC -- #io-channel-cells: Should be set to <1> - (See Documentation/devicetree/bindings/iio/iio-bindings.txt for further info) - -For further information on GPADC channels, see device datasheet. - - -Example: - - gpadc: da9150-gpadc { - compatible = "dlg,da9150-gpadc"; - #io-channel-cells = <1>; - }; diff --git a/Documentation/devicetree/bindings/iio/adc/dlg,da9150-gpadc.yaml b/Documentation/devicetree/bindings/iio/adc/dlg,da9150-gpadc.yaml new file mode 100644 index 0000000000000..cc29a2f2111a4 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/dlg,da9150-gpadc.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/dlg,da9150-gpadc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Dialog Semiconductor DA9150 IIO GPADC + +maintainers: + - Adam Thomson + +description: + This patch adds support for general purpose ADC within the + DA9150 Charger & Fuel-Gauge IC. + +properties: + compatible: + const: dlg,da9150-gpadc + + "#io-channel-cells": + const: 1 + +required: + - compatible + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + adc { + compatible = "dlg,da9150-gpadc"; + #io-channel-cells = <1>; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt deleted file mode 100644 index eebdcec3dab5c..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.txt +++ /dev/null @@ -1,57 +0,0 @@ -Freescale i.MX25 ADC GCQ device - -This is a generic conversion queue device that can convert any of the -analog inputs using the ADC unit of the i.MX25. - -Required properties: - - compatible: Should be "fsl,imx25-gcq". - - reg: Should be the register range of the module. - - interrupts: Should be the interrupt number of the module. - Typically this is <1>. - - #address-cells: Should be <1> (setting for the subnodes) - - #size-cells: Should be <0> (setting for the subnodes) - -Optional properties: - - vref-ext-supply: The regulator supplying the ADC reference voltage. - Required when at least one subnode uses the this reference. - - vref-xp-supply: The regulator supplying the ADC reference voltage on pin XP. - Required when at least one subnode uses this reference. - - vref-yp-supply: The regulator supplying the ADC reference voltage on pin YP. - Required when at least one subnode uses this reference. - -Sub-nodes: -Optionally you can define subnodes which define the reference voltage -for the analog inputs. - -Required properties for subnodes: - - reg: Should be the number of the analog input. - 0: xp - 1: yp - 2: xn - 3: yn - 4: wiper - 5: inaux0 - 6: inaux1 - 7: inaux2 -Optional properties for subnodes: - - fsl,adc-refp: specifies the positive reference input as defined in - - - fsl,adc-refn: specifies the negative reference input as defined in - - -Example: - - adc: adc@50030800 { - compatible = "fsl,imx25-gcq"; - reg = <0x50030800 0x60>; - interrupt-parent = <&tscadc>; - interrupts = <1>; - #address-cells = <1>; - #size-cells = <0>; - - inaux@5 { - reg = <5>; - fsl,adc-refp = ; - fsl,adc-refn = ; - }; - }; diff --git a/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.yaml b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.yaml new file mode 100644 index 0000000000000..e9103497e3a4b --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/fsl,imx25-gcq.yaml @@ -0,0 +1,131 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/fsl,imx25-gcq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale ADC GCQ device + +description: + This is a generic conversion queue device that can convert any of the + analog inputs using the ADC unit of the i.MX25. + +maintainers: + - Jonathan Cameron + +properties: + compatible: + const: fsl,imx25-gcq + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vref-ext-supply: + description: + The regulator supplying the ADC reference voltage. + Required when at least one subnode uses the this reference. + + vref-xp-supply: + description: + The regulator supplying the ADC reference voltage on pin XP. + Required when at least one subnode uses this reference. + + vref-yp-supply: + description: + The regulator supplying the ADC reference voltage on pin YP. + Required when at least one subnode uses this reference. + + "#io-channel-cells": + const: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +required: + - compatible + - reg + - interrupts + - "#address-cells" + - "#size-cells" + +patternProperties: + "[a-z][a-z0-9]+@[0-9a-f]+$": + type: object + description: + Child nodes used to define the reference voltages used for each channel + + properties: + reg: + description: | + Number of the analog input. + 0: xp + 1: yp + 2: xn + 3: yn + 4: wiper + 5: inaux0 + 6: inaux1 + 7: inaux2 + items: + - minimum: 0 + maximum: 7 + + fsl,adc-refp: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Specifies the positive reference input as defined in + + 0: YP voltage reference + 1: XP voltage reference + 2: External voltage reference + 3: Internal voltage reference (default) + minimum: 0 + maximum: 3 + + fsl,adc-refn: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Specifies the negative reference input as defined in + + 0: XN ground reference + 1: YN ground reference + 2: Internal ground reference + 3: External ground reference (default) + minimum: 0 + maximum: 3 + + required: + - reg + + additionalProperties: false + +additionalProperties: false + +examples: + - | + #include + soc { + #address-cells = <1>; + #size-cells = <1>; + adc@50030800 { + compatible = "fsl,imx25-gcq"; + reg = <0x50030800 0x60>; + interrupt-parent = <&tscadc>; + interrupts = <1>; + #address-cells = <1>; + #size-cells = <0>; + + inaux@5 { + reg = <5>; + fsl,adc-refp = ; + fsl,adc-refn = ; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/fsl,imx7d-adc.yaml b/Documentation/devicetree/bindings/iio/adc/fsl,imx7d-adc.yaml new file mode 100644 index 0000000000000..afc5cc48a0ce6 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/fsl,imx7d-adc.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/fsl,imx7d-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale ADC found on the imx7d SoC + +maintainers: + - Haibo Chen + +properties: + compatible: + const: fsl,imx7d-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: adc + + vref-supply: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - vref-supply + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include + #include + #include + soc { + #address-cells = <1>; + #size-cells = <1>; + adc@30610000 { + compatible = "fsl,imx7d-adc"; + reg = <0x30610000 0x10000>; + interrupts = ; + clocks = <&clks IMX7D_ADC_ROOT_CLK>; + clock-names = "adc"; + vref-supply = <®_vcc_3v3_mcu>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml b/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml new file mode 100644 index 0000000000000..1ca571056ea95 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/fsl,vf610-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ADC found on Freescale vf610 and similar SoCs + +maintainers: + - Fugang Duan + +description: + ADCs found on vf610/i.MX6slx and upward SoCs from Freescale. + +properties: + compatible: + const: fsl,vf610-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + description: ADC source clock (ipg clock) + maxItems: 1 + + clock-names: + const: adc + + vref-supply: + description: ADC reference voltage supply. + + fsl,adck-max-frequency: + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 3 + maxItems: 3 + description: | + Maximum frequencies from datasheet operating requirements. + Three values necessary to cover the 3 conversion modes. + * Frequency in normal mode (ADLPC=0, ADHSC=0) + * Frequency in high-speed mode (ADLPC=0, ADHSC=1) + * Frequency in low-power mode (ADLPC=1, ADHSC=0) + + min-sample-time: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Minimum sampling time in nanoseconds. This value has + to be chosen according to the conversion mode and the connected analog + source resistance (R_as) and capacitance (C_as). Refer the datasheet's + operating requirements. A safe default across a wide range of R_as and + C_as as well as conversion modes is 1000ns. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - vref-supply + +additionalProperties: false + +examples: + - | + #include + adc@4003b000 { + compatible = "fsl,vf610-adc"; + reg = <0x4003b000 0x1000>; + interrupts = <0 53 0x04>; + clocks = <&clks VF610_CLK_ADC0>; + clock-names = "adc"; + fsl,adck-max-frequency = <30000000>, <40000000>, <20000000>; + vref-supply = <®_vcc_3v3_mcu>; + min-sample-time = <10000>; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/hi8435.txt b/Documentation/devicetree/bindings/iio/adc/hi8435.txt deleted file mode 100644 index 3b0348c5e5166..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/hi8435.txt +++ /dev/null @@ -1,21 +0,0 @@ -Holt Integrated Circuits HI-8435 threshold detector bindings - -Required properties: - - compatible: should be "holt,hi8435" - - reg: spi chip select number for the device - -Recommended properties: - - spi-max-frequency: definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Optional properties: - - gpios: GPIO used for controlling the reset pin - -Example: -sensor@0 { - compatible = "holt,hi8435"; - reg = <0>; - gpios = <&gpio6 1 0>; - - spi-max-frequency = <1000000>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml b/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml new file mode 100644 index 0000000000000..9514c3381c422 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/holt,hi8435.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/holt,hi8435.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Holt Integrated Circuits HI-8435 SPI threshold detector + +maintainers: + - Vladimir Barinov + +description: | + Datasheet: http://www.holtic.com/documents/427-hi-8435_v-rev-lpdf.do + +properties: + compatible: + const: holt,hi8435 + + reg: + maxItems: 1 + + gpios: + description: + GPIO used for controlling the reset pin + maxItems: 1 + + spi-max-frequency: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + threshold-detector@0 { + compatible = "holt,hi8435"; + reg = <0>; + gpios = <&gpio6 1 0>; + spi-max-frequency = <1000000>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/imx7d-adc.txt b/Documentation/devicetree/bindings/iio/adc/imx7d-adc.txt deleted file mode 100644 index f1f3a552459b3..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/imx7d-adc.txt +++ /dev/null @@ -1,24 +0,0 @@ -Freescale imx7d ADC bindings - -The devicetree bindings are for the ADC driver written for -imx7d SoC. - -Required properties: -- compatible: Should be "fsl,imx7d-adc" -- reg: Offset and length of the register set for the ADC device -- interrupts: The interrupt number for the ADC device -- clocks: The root clock of the ADC controller -- clock-names: Must contain "adc", matching entry in the clocks property -- vref-supply: The regulator supply ADC reference voltage -- #io-channel-cells: Must be 1 as per ../iio-bindings.txt - -Example: -adc1: adc@30610000 { - compatible = "fsl,imx7d-adc"; - reg = <0x30610000 0x10000>; - interrupts = ; - clocks = <&clks IMX7D_ADC_ROOT_CLK>; - clock-names = "adc"; - vref-supply = <®_vcc_3v3_mcu>; - #io-channel-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml new file mode 100644 index 0000000000000..6a176f551d755 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/lltc,ltc2497.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/lltc,ltc2497.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Linear Technology / Analog Devices LTC2497 ADC + +maintainers: + - Michael Hennerich + +description: | + 16bit ADC supporting up to 16 single ended or 8 differential inputs. + I2C interface. + +properties: + compatible: + const: + lltc,ltc2497 + + reg: true + vref-supply: true + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc@76 { + compatible = "lltc,ltc2497"; + reg = <0x76>; + vref-supply = <<c2497_reg>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/lpc1850-adc.txt b/Documentation/devicetree/bindings/iio/adc/lpc1850-adc.txt deleted file mode 100644 index 9ada5abd45fa0..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/lpc1850-adc.txt +++ /dev/null @@ -1,20 +0,0 @@ -NXP LPC1850 ADC bindings - -Required properties: -- compatible: Should be "nxp,lpc1850-adc" -- reg: Offset and length of the register set for the ADC device -- interrupts: The interrupt number for the ADC device -- clocks: The root clock of the ADC controller -- vref-supply: The regulator supply ADC reference voltage -- resets: phandle to reset controller and line specifier - -Example: - -adc0: adc@400e3000 { - compatible = "nxp,lpc1850-adc"; - reg = <0x400e3000 0x1000>; - interrupts = <17>; - clocks = <&ccu1 CLK_APB3_ADC0>; - vref-supply = <®_vdda>; - resets = <&rgu 40>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/lpc32xx-adc.txt b/Documentation/devicetree/bindings/iio/adc/lpc32xx-adc.txt deleted file mode 100644 index 3a1bc669bd51a..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/lpc32xx-adc.txt +++ /dev/null @@ -1,21 +0,0 @@ -* NXP LPC32xx SoC ADC controller - -Required properties: -- compatible: must be "nxp,lpc3220-adc" -- reg: physical base address of the controller and length of memory mapped - region. -- interrupts: The ADC interrupt - -Optional: - - vref-supply: The regulator supply ADC reference voltage, optional - for legacy reason, but highly encouraging to us in new device tree - -Example: - - adc@40048000 { - compatible = "nxp,lpc3220-adc"; - reg = <0x40048000 0x1000>; - interrupt-parent = <&mic>; - interrupts = <39 0>; - vref-supply = <&vcc>; - }; diff --git a/Documentation/devicetree/bindings/iio/adc/ltc2497.txt b/Documentation/devicetree/bindings/iio/adc/ltc2497.txt deleted file mode 100644 index a237ed99c0d8d..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/ltc2497.txt +++ /dev/null @@ -1,13 +0,0 @@ -* Linear Technology / Analog Devices LTC2497 ADC - -Required properties: - - compatible: Must be "lltc,ltc2497" - - reg: Must contain the ADC I2C address - - vref-supply: The regulator supply for ADC reference voltage - -Example: - ltc2497: adc@76 { - compatible = "lltc,ltc2497"; - reg = <0x76>; - vref-supply = <<c2497_reg>; - }; diff --git a/Documentation/devicetree/bindings/iio/adc/marvell,berlin2-adc.yaml b/Documentation/devicetree/bindings/iio/adc/marvell,berlin2-adc.yaml new file mode 100644 index 0000000000000..b3b292fb1c595 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/marvell,berlin2-adc.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/marvell,berlin2-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Berlin 2 Analog to Digital Converter (ADC) + +maintainers: + - Antoine Tenart + +description: + The Berlin ADC has 8 channels, with one connected to a temperature sensor. + It is part of the system controller register set. The ADC node should be a + sub-node of the system controller node. + +properties: + compatible: + const: marvell,berlin2-adc + + interrupts: + minItems: 2 + maxItems: 2 + + interrupt-names: + items: + - const: adc + - const: tsen + + "#io-channel-cells": + const: 1 + +required: + - compatible + - interrupts + - interrupt-names + +additionalProperties: false + +examples: + - | + sysctrl { + adc { + compatible = "marvell,berlin2-adc"; + interrupt-parent = <&sic>; + interrupts = <12>, <14>; + interrupt-names = "adc", "tsen"; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/max11100.txt b/Documentation/devicetree/bindings/iio/adc/max11100.txt deleted file mode 100644 index b7f7177b8aca0..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/max11100.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Maxim max11100 Analog to Digital Converter (ADC) - -Required properties: - - compatible: Should be "maxim,max11100" - - reg: the adc unit address - - vref-supply: phandle to the regulator that provides reference voltage - -Optional properties: - - spi-max-frequency: SPI maximum frequency - -Example: - -max11100: adc@0 { - compatible = "maxim,max11100"; - reg = <0>; - vref-supply = <&adc0_vref>; - spi-max-frequency = <240000>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/max1118.txt b/Documentation/devicetree/bindings/iio/adc/max1118.txt deleted file mode 100644 index cf33d0b15a6d7..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/max1118.txt +++ /dev/null @@ -1,21 +0,0 @@ -* MAX1117/MAX1118/MAX1119 8-bit, dual-channel ADCs - -Required properties: - - compatible: Should be one of - * "maxim,max1117" - * "maxim,max1118" - * "maxim,max1119" - - reg: spi chip select number for the device - - (max1118 only) vref-supply: The regulator supply for ADC reference voltage - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: -adc@0 { - compatible = "maxim,max1118"; - reg = <0>; - vref-supply = <&vdd_supply>; - spi-max-frequency = <1000000>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/max9611.txt b/Documentation/devicetree/bindings/iio/adc/max9611.txt deleted file mode 100644 index ab4f43145ae57..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/max9611.txt +++ /dev/null @@ -1,27 +0,0 @@ -* Maxim max9611/max9612 current sense amplifier with 12-bits ADC interface - -Maxim max9611/max9612 is an high-side current sense amplifier with integrated -12-bits ADC communicating over I2c bus. -The device node for this driver shall be a child of a I2c controller. - -Required properties - - compatible: Should be "maxim,max9611" or "maxim,max9612" - - reg: The 7-bits long I2c address of the device - - shunt-resistor-micro-ohms: Value, in micro Ohms, of the current sense shunt - resistor - -Example: - -&i2c4 { - csa: adc@7c { - compatible = "maxim,max9611"; - reg = <0x7c>; - - shunt-resistor-micro-ohms = <5000>; - }; -}; - -This device node describes a current sense amplifier sitting on I2c4 bus -with address 0x7c (read address is 0xf9, write address is 0xf8). -A sense resistor of 0,005 Ohm is installed between RS+ and RS- current-sensing -inputs. diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml new file mode 100644 index 0000000000000..0cf87556ef823 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max11100.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/maxim,max11100.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX11100 ADC + +maintainers: + - Jacopo Mondi + +description: | + Single channel 16 bit ADC with SPI interface. + +properties: + compatible: + const: maxim,max11100 + + reg: + maxItems: 1 + + vref-supply: + description: External reference, needed to establish input scaling. + + spi-max-frequency: + minimum: 100000 + maximum: 4800000 + +additionalProperties: false + +required: + - compatible + - reg + - vref-supply + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "maxim,max11100"; + reg = <0>; + vref-supply = <&adc_vref>; + spi-max-frequency = <240000>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml new file mode 100644 index 0000000000000..e948b3e37b0c6 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1118.yaml @@ -0,0 +1,62 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/maxim,max1118.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX1118 and similar ADCs + +maintainers: + - Akinobu Mita + +description: | + Dual channel 8bit ADCs. + +properties: + compatible: + enum: + - maxim,max1117 + - maxim,max1118 + - maxim,max1119 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 5000000 + + vref-supply: + description: External reference, needed to establish input scaling + +if: + properties: + compatible: + contains: + const: maxim,max1118 +then: + required: + - vref-supply +else: + properties: + vref-supply: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "maxim,max1118"; + reg = <0>; + vref-supply = <&adc_vref>; + spi-max-frequency = <1000000>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml index cccd3033a55ba..50bcd72ac9d6a 100644 --- a/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1238.yaml @@ -62,6 +62,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml index f562505f5ecd4..4c7e0d94bff14 100644 --- a/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1241.yaml @@ -39,12 +39,16 @@ properties: thus enabling power-down mode. maxItems: 1 + spi-max-frequency: true + required: - compatible - reg - vdd-supply - vref-supply +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml index 48377549c39a4..e04f09f356018 100644 --- a/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max1363.yaml @@ -36,6 +36,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/iio/adc/maxim,max9611.yaml b/Documentation/devicetree/bindings/iio/adc/maxim,max9611.yaml new file mode 100644 index 0000000000000..9475a9e6e9207 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/maxim,max9611.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/maxim,max9611.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Maxim MAX9611 and similar current sense amplifiers with integrated ADCs + +maintainers: + - Jacopo Mondi + +description: | + These devices combine a high-side current sense amplifier with a 12 bit ADC. + They have an i2c interface. + +properties: + compatible: + enum: + - maxim,max9611 + - maxim,max9612 + + reg: + maxItems: 1 + + shunt-resistor-micro-ohms: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Value in micro Ohms of the shunt resistor connected between the RS+ and + RS- inputs, across which the current is measured. Value needed to compute + the scaling of the measured current. + +additionalProperties: false + +required: + - compatible + - reg + - shunt-resistor-micro-ohms + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc@7c { + compatible = "maxim,max9611"; + reg = <0x7c>; + shunt-resistor-micro-ohms = <5000>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/mcp320x.txt b/Documentation/devicetree/bindings/iio/adc/mcp320x.txt deleted file mode 100644 index 56373d643f768..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/mcp320x.txt +++ /dev/null @@ -1,57 +0,0 @@ -* Microchip Analog to Digital Converter (ADC) - -The node for this driver must be a child node of a SPI controller, hence -all mandatory properties described in - - Documentation/devicetree/bindings/spi/spi-bus.txt - -must be specified. - -Required properties: - - compatible: Must be one of the following, depending on the - model: - "mcp3001" (DEPRECATED) - "mcp3002" (DEPRECATED) - "mcp3004" (DEPRECATED) - "mcp3008" (DEPRECATED) - "mcp3201" (DEPRECATED) - "mcp3202" (DEPRECATED) - "mcp3204" (DEPRECATED) - "mcp3208" (DEPRECATED) - "mcp3301" (DEPRECATED) - - "microchip,mcp3001" - "microchip,mcp3002" - "microchip,mcp3004" - "microchip,mcp3008" - "microchip,mcp3201" - "microchip,mcp3202" - "microchip,mcp3204" - "microchip,mcp3208" - "microchip,mcp3301" - "microchip,mcp3550-50" - "microchip,mcp3550-60" - "microchip,mcp3551" - "microchip,mcp3553" - - NOTE: The use of the compatibles with no vendor prefix - is deprecated and only listed because old DT use them. - - - spi-cpha, spi-cpol (boolean): - Either SPI mode (0,0) or (1,1) must be used, so specify - none or both of spi-cpha, spi-cpol. The MCP3550/1/3 - is more efficient in mode (1,1) as only 3 instead of - 4 bytes need to be read from the ADC, but not all SPI - masters support it. - - - vref-supply: Phandle to the external reference voltage supply. - -Examples: -spi_controller { - mcp3x0x@0 { - compatible = "microchip,mcp3002"; - reg = <0>; - spi-max-frequency = <1000000>; - vref-supply = <&vref_reg>; - }; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/mcp3422.txt b/Documentation/devicetree/bindings/iio/adc/mcp3422.txt deleted file mode 100644 index 82bcce07255d4..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/mcp3422.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Microchip mcp3421/2/3/4/6/7/8 chip family (ADC) - -Required properties: - - compatible: Should be - "microchip,mcp3421" or - "microchip,mcp3422" or - "microchip,mcp3423" or - "microchip,mcp3424" or - "microchip,mcp3425" or - "microchip,mcp3426" or - "microchip,mcp3427" or - "microchip,mcp3428" - - reg: I2C address for the device - -Example: -adc@0 { - compatible = "microchip,mcp3424"; - reg = <0x68>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml new file mode 100644 index 0000000000000..cbbac4ce56d6a --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/microchip,mcp3201.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3201.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip mcp3201 and similar ADCs + +maintainers: + - Oskar Andero + +description: | + Family of simple ADCs with an I2C inteface. + +properties: + compatible: + enum: + - microchip,mcp3001 + - microchip,mcp3002 + - microchip,mcp3004 + - microchip,mcp3008 + - microchip,mcp3201 + - microchip,mcp3202 + - microchip,mcp3204 + - microchip,mcp3208 + - microchip,mcp3301 + - microchip,mcp3550-50 + - microchip,mcp3550-60 + - microchip,mcp3551 + - microchip,mcp3553 + + reg: + maxItems: 1 + + spi-max-frequency: true + spi-cpha: true + spi-cpol: true + + vref-supply: + description: External reference. + + "#io-channel-cells": + const: 1 + +dependencies: + spi-cpol: [ spi-cpha ] + spi-cpha: [ spi-cpol ] + +required: + - compatible + - reg + - vref-supply + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "microchip,mcp3002"; + reg = <0>; + vref-supply = <&vref_reg>; + spi-cpha; + spi-cpol; + #io-channel-cells = <1>; + }; + adc@1 { + compatible = "microchip,mcp3002"; + reg = <1>; + vref-supply = <&vref_reg>; + spi-max-frequency = <1500000>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.yaml b/Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.yaml new file mode 100644 index 0000000000000..a6cb857a232da --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/motorola,cpcap-adc.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/motorola,cpcap-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Motorola CPCAP PMIC ADC binding + +maintainers: + - Tony Lindgren + +description: + On Motorola phones like droid 4 there is a custom CPCAP PMIC. This PMIC + has ADCs that are used for battery charging and USB PHY VBUS and ID pin + detection. + +properties: + compatible: + enum: + - motorola,cpcap-adc + - motorola,mapphone-cpcap-adc + + interrupts: + maxItems: 1 + + interrupt-names: + const: adcdone + + "#io-channel-cells": + const: 1 + +required: + - compatible + - interrupts + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include + pmic { + #address-cells = <1>; + #size-cells = <0>; + adc { + compatible = "motorola,mapphone-cpcap-adc"; + interrupt-parent = <&cpcap>; + interrupts = <8 IRQ_TYPE_NONE>; + interrupt-names = "adcdone"; + #io-channel-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/nuvoton,nau7802.yaml b/Documentation/devicetree/bindings/iio/adc/nuvoton,nau7802.yaml new file mode 100644 index 0000000000000..04566ff02eb69 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/nuvoton,nau7802.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/nuvoton,nau7802.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton NAU7802 I2c Analog to Digital Converter (ADC) + +maintainers: + - Alexandre Belloni + - Maxime Ripard + +properties: + compatible: + const: nuvoton,nau7802 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + nuvoton,vldo: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Internal reference voltage in millivolts to be configured. + minimum: 2400 + maximum: 4500 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + nau7802@2a { + compatible = "nuvoton,nau7802"; + reg = <0x2a>; + nuvoton,vldo = <3000>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt deleted file mode 100644 index ef8eeec1a997f..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm-adc.txt +++ /dev/null @@ -1,26 +0,0 @@ -Nuvoton NPCM Analog to Digital Converter (ADC) - -The NPCM ADC is a 10-bit converter for eight channel inputs. - -Required properties: -- compatible: "nuvoton,npcm750-adc" for the NPCM7XX BMC. -- reg: specifies physical base address and size of the registers. -- interrupts: Contain the ADC interrupt with flags for falling edge. -- resets : phandle to the reset control for this device. - -Optional properties: -- clocks: phandle of ADC reference clock, in case the clock is not - added the ADC will use the default ADC sample rate. -- vref-supply: The regulator supply ADC reference voltage, in case the - vref-supply is not added the ADC will use internal voltage - reference. - -Example: - -adc: adc@f000c000 { - compatible = "nuvoton,npcm750-adc"; - reg = <0xf000c000 0x8>; - interrupts = ; - clocks = <&clk NPCM7XX_CLK_ADC>; - resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_ADC>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml new file mode 100644 index 0000000000000..001cf263b7d5e --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/nuvoton,npcm750-adc.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/nuvoton,npcm750-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton NPCM BMC Analog to Digital Converter (ADC) + +maintainers: + - Tomer Maimon + +description: + The NPCM ADC is a 10-bit converter for eight channel inputs. + +properties: + compatible: + const: nuvoton,npcm750-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: ADC interrupt, should be set for falling edge. + + resets: + maxItems: 1 + + clocks: + maxItems: 1 + description: If not provided the defulat ADC sample rate will be used. + + vref-supply: + description: If not supplied, the internal voltage reference will be used. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - resets + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + soc { + #address-cells = <1>; + #size-cells = <1>; + adc@f000c000 { + compatible = "nuvoton,npcm750-adc"; + reg = <0xf000c000 0x8>; + interrupts = ; + clocks = <&clk NPCM7XX_CLK_ADC>; + resets = <&rstc NPCM7XX_RESET_IPSRST1 NPCM7XX_RESET_ADC>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/nuvoton-nau7802.txt b/Documentation/devicetree/bindings/iio/adc/nuvoton-nau7802.txt deleted file mode 100644 index e9582e6fe3500..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/nuvoton-nau7802.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Nuvoton NAU7802 Analog to Digital Converter (ADC) - -Required properties: - - compatible: Should be "nuvoton,nau7802" - - reg: Should contain the ADC I2C address - -Optional properties: - - nuvoton,vldo: Internal reference voltage in millivolts to be - configured valid values are between 2400 mV and 4500 mV. - - interrupts: IRQ line for the ADC. If not used the driver will use - polling. - -Example: -adc2: nau7802@2a { - compatible = "nuvoton,nau7802"; - reg = <0x2a>; - nuvoton,vldo = <3000>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/nxp,lpc1850-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nxp,lpc1850-adc.yaml new file mode 100644 index 0000000000000..6404fb73f8edc --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/nxp,lpc1850-adc.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/nxp,lpc1850-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP LPC1850 ADC bindings + +maintainers: + - Joachim Eastwood + +description: + Supports the ADC found on the LPC1850 SoC. + +properties: + compatible: + const: nxp,lpc1850-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + vref-supply: true + + resets: + maxItems: 1 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - vref-supply + - resets + +additionalProperties: false + +examples: + - | + #include + soc { + #address-cells = <1>; + #size-cells = <1>; + adc@400e3000 { + compatible = "nxp,lpc1850-adc"; + reg = <0x400e3000 0x1000>; + interrupts = <17>; + clocks = <&ccu1 CLK_APB3_ADC0>; + vref-supply = <®_vdda>; + resets = <&rgu 40>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/nxp,lpc3220-adc.yaml b/Documentation/devicetree/bindings/iio/adc/nxp,lpc3220-adc.yaml new file mode 100644 index 0000000000000..2c5032be83bd0 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/nxp,lpc3220-adc.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/nxp,lpc3220-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP LPC3220 SoC ADC controller + +maintainers: + - Gregory Clement + +description: + This hardware block has been used on several LPC32XX SoCs. + +properties: + compatible: + const: nxp,lpc3220-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vref-supply: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + soc { + #address-cells = <1>; + #size-cells = <1>; + adc@40048000 { + compatible = "nxp,lpc3220-adc"; + reg = <0x40048000 0x1000>; + interrupt-parent = <&mic>; + interrupts = <39 0>; + vref-supply = <&vcc>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml index 0ca992465a218..7f4f827c57a7e 100644 --- a/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/qcom,spmi-vadc.yaml @@ -48,6 +48,8 @@ properties: description: End of conversion interrupt. + io-channel-ranges: true + required: - compatible - reg @@ -232,6 +234,8 @@ allOf: enum: [ 1, 2, 4, 8, 16 ] default: 1 +additionalProperties: false + examples: - | spmi_bus { diff --git a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml index cc3c8ea6a8948..5ebb0ab250bd3 100644 --- a/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml +++ b/Documentation/devicetree/bindings/iio/adc/samsung,exynos-adc.yaml @@ -41,11 +41,16 @@ properties: maxItems: 2 interrupts: - maxItems: 1 + description: + ADC interrupt followed by optional touchscreen interrupt. + minItems: 1 + maxItems: 2 "#io-channel-cells": const: 1 + io-channel-ranges: true + vdd-supply: true samsung,syscon-phandle: @@ -68,6 +73,9 @@ required: - "#io-channel-cells" - vdd-supply +additionalProperties: + type: object + allOf: - if: properties: @@ -78,7 +86,6 @@ allOf: - samsung,exynos-adc-v2 - samsung,exynos3250-adc - samsung,exynos4212-adc - - samsung,s5pv210-adc then: required: - samsung,syscon-phandle @@ -107,6 +114,15 @@ allOf: items: - const: adc + - if: + required: + - has-touchscreen + then: + properties: + interrupts: + minItems: 2 + maxItems: 2 + examples: - | adc: adc@12d10000 { diff --git a/Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.yaml b/Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.yaml new file mode 100644 index 0000000000000..caa3ee0b4b8c3 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/sprd,sc2720-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Spreadtrum SC27XX series PMICs ADC binding + +maintainers: + - Baolin Wang + +description: + Supports the ADC found on these PMICs. + +properties: + compatible: + enum: + - sprd,sc2720-adc + - sprd,sc2721-adc + - sprd,sc2723-adc + - sprd,sc2730-adc + - sprd,sc2731-adc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#io-channel-cells": + const: 1 + + hwlocks: + maxItems: 1 + + nvmem-cells: + maxItems: 2 + + nvmem-cell-names: + items: + - const: big_scale_calib + - const: small_scale_calib + +required: + - compatible + - reg + - interrupts + - "#io-channel-cells" + - hwlocks + - nvmem-cells + - nvmem-cell-names + +additionalProperties: false + +examples: + - | + #include + pmic { + #address-cells = <1>; + #size-cells = <0>; + adc@480 { + compatible = "sprd,sc2731-adc"; + reg = <0x480>; + interrupt-parent = <&sc2731_pmic>; + interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; + #io-channel-cells = <1>; + hwlocks = <&hwlock 4>; + nvmem-cells = <&adc_big_scale>, <&adc_small_scale>; + nvmem-cell-names = "big_scale_calib", "small_scale_calib"; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt b/Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt deleted file mode 100644 index b4daa15dcf15f..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/sprd,sc27xx-adc.txt +++ /dev/null @@ -1,40 +0,0 @@ -Spreadtrum SC27XX series PMICs ADC binding - -Required properties: -- compatible: Should be one of the following. - "sprd,sc2720-adc" - "sprd,sc2721-adc" - "sprd,sc2723-adc" - "sprd,sc2730-adc" - "sprd,sc2731-adc" -- reg: The address offset of ADC controller. -- interrupt-parent: The interrupt controller. -- interrupts: The interrupt number for the ADC device. -- #io-channel-cells: Number of cells in an IIO specifier. -- hwlocks: Reference to a phandle of a hwlock provider node. -- nvmem-cells: A phandle to the calibration cells provided by eFuse device. -- nvmem-cell-names: Should be "big_scale_calib", "small_scale_calib". - -Example: - - sc2731_pmic: pmic@0 { - compatible = "sprd,sc2731"; - reg = <0>; - spi-max-frequency = <26000000>; - interrupts = ; - interrupt-controller; - #interrupt-cells = <2>; - #address-cells = <1>; - #size-cells = <0>; - - pmic_adc: adc@480 { - compatible = "sprd,sc2731-adc"; - reg = <0x480>; - interrupt-parent = <&sc2731_pmic>; - interrupts = <0 IRQ_TYPE_LEVEL_HIGH>; - #io-channel-cells = <1>; - hwlocks = <&hwlock 4>; - nvmem-cells = <&adc_big_scale>, <&adc_small_scale>; - nvmem-cell-names = "big_scale_calib", "small_scale_calib"; - }; - }; diff --git a/Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml b/Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml new file mode 100644 index 0000000000000..9049c699152f7 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/st,stmpe-adc.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/st,stmpe-adc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ADC on an STMPE multifunction device. + +maintainers: + - Stefan Agner + +description: + This ADC forms part of an ST microelectronics STMPE multifunction device . + The ADC is shared with the STMPE touchscreen. As a result some ADC related + settings are specified in the parent node. + The node name myst be stmpe_adc and should be a child node of the stmpe node + to which it belongs. + +properties: + compatible: + const: st,stmpe-adc + + st,norequest-mask: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Bitmask specifying which ADC channels should _not_ be + requestable due to different usage (e.g. touch). + + "#io-channel-cells": + const: 1 + +required: + - compatible + +additionalProperties: false + +examples: + - | + stmpe { + stmpe_adc { + compatible = "st,stmpe-adc"; + st,norequest-mask = <0x0F>; /* dont use ADC CH3-0 */ + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/stmpe-adc.txt b/Documentation/devicetree/bindings/iio/adc/stmpe-adc.txt deleted file mode 100644 index 480e664226255..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/stmpe-adc.txt +++ /dev/null @@ -1,21 +0,0 @@ -STMPE ADC driver ----------------- - -Required properties: - - compatible: "st,stmpe-adc" - -Optional properties: -Note that the ADC is shared with the STMPE touchscreen. ADC related settings -have to be done in the mfd. -- st,norequest-mask: bitmask specifying which ADC channels should _not_ be - requestable due to different usage (e.g. touch) - -Node name must be stmpe_adc and should be child node of stmpe node to -which it belongs. - -Example: - - stmpe_adc { - compatible = "st,stmpe-adc"; - st,norequest-mask = <0x0F>; /* dont use ADC CH3-0 */ - }; diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml new file mode 100644 index 0000000000000..f5a923cc847f4 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc0832.yaml @@ -0,0 +1,56 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,adc0832.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADC0832 and similar ADCs + +maintainers: + - Akinobu Mita + +description: | + 8 bit ADCs with 1, 2, 4 or 8 inputs for single ended or differential + conversion. + +properties: + compatible: + enum: + - ti,adc0831 + - ti,adc0832 + - ti,adc0834 + - ti,adc0838 + + reg: + maxItems: 1 + + spi-max-frequency: true + + vref-supply: + description: External reference, needed to establish input scaling + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,adc0832"; + reg = <0>; + vref-supply = <&vdd_supply>; + spi-max-frequency = <200000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml new file mode 100644 index 0000000000000..54955f03df931 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc108s102.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,adc108s102.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADC108S102 and ADC128S102 + +maintainers: + - Bogdan Pricop + +description: | + Family of 8 channel, 10/12 bit, SPI, single ended ADCs. + +properties: + compatible: + const: + ti,adc108s102 + + reg: true + vref-supply: true + spi-max-frequency: true + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +additionalProperties: false + +examples: + - | + spi { + #address-cells= <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,adc108s102"; + reg = <0>; + vref-supply = <&vdd_supply>; + spi-max-frequency = <1000000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml new file mode 100644 index 0000000000000..ec3b2edf1fb7d --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc12138.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,adc12138.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADC12138 and similar self-calibrating ADCs + +maintainers: + - Akinobu Mita + +description: | + 13 bit ADCs with 1, 2 or 8 inputs and self calibrating circuitry to + correct for linearity, zero and full scale errors. + +properties: + compatible: + enum: + - ti,adc12130 + - ti,adc12132 + - ti,adc12138 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + description: End of Conversion (EOC) interrupt + + clocks: + maxItems: 1 + description: Conversion clock input. + + spi-max-frequency: true + + vref-p-supply: + description: The regulator supply for positive analog voltage reference + + vref-n-supply: + description: | + The regulator supply for negative analog voltage reference + (Note that this must not go below GND or exceed vref-p) + If not specified, this is assumed to be analog ground. + + ti,acquisition-time: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [ 6, 10, 18, 34 ] + description: | + The number of conversion clock periods for the S/H's acquisition time. + For high source impedances, this value can be increased to 18 or 34. + For less ADC accuracy and/or slower CCLK frequencies this value may be + decreased to 6. See section 6.0 INPUT SOURCE RESISTANCE in the + datasheet for details. + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - vref-p-supply + +additionalProperties: false + +examples: + - | + #include + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,adc12138"; + reg = <0>; + interrupts = <28 IRQ_TYPE_EDGE_RISING>; + interrupt-parent = <&gpio1>; + clocks = <&cclk>; + vref-p-supply = <&ldo4_reg>; + spi-max-frequency = <5000000>; + ti,acquisition-time = <6>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml new file mode 100644 index 0000000000000..d54a0183f024d --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc128s052.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,adc128s052.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADC128S052 and similar ADCs + +maintainers: + - Angelo Compagnucci + +description: | + Family of 12 bit SPI ADCs with 2 to 8 channels with a range of different + target sample rates. + +properties: + compatible: + enum: + - ti,adc122s021 + - ti,adc122s051 + - ti,adc122s101 + - ti,adc124s021 + - ti,adc124s051 + - ti,adc124s101 + - ti,adc128s052 + + reg: + maxItems: 1 + + spi-max-frequency: true + + vref-supply: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +additionalProperties: false + +examples: + - | + #include + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,adc128s052"; + reg = <0>; + vref-supply = <&vdd_supply>; + spi-max-frequency = <1000000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml b/Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml new file mode 100644 index 0000000000000..3f4f334d6f732 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,adc161s626.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,adc161s626.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADC141S626 and ADC161S626 ADCs + +maintainers: + - Matt Ranostay + +description: | + Single channel 14/16bit differential ADCs + +properties: + compatible: + enum: + - ti,adc141s626 + - ti,adc161s626 + + reg: + maxItems: 1 + + spi-max-frequency: true + + vdda-supply: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,adc161s626"; + vdda-supply = <&vdda_fixed>; + reg = <0>; + spi-max-frequency = <4300000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml new file mode 100644 index 0000000000000..2c2d01bbc296d --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads1015.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI ADS1015 4 channel I2C analog to digital converter + +maintainers: + - Daniel Baluta + +description: | + Datasheet at: https://www.ti.com/lit/gpn/ads1015 + Supports both single ended and differential channels. + +properties: + compatible: + const: ti,ads1015 + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +additionalProperties: false + +patternProperties: + "^channel@[0-7]+$": + type: object + description: + Child nodes needed for each channel that the platform uses. + + properties: + reg: + description: | + 0: Voltage over AIN0 and AIN1. + 1: Voltage over AIN0 and AIN3. + 2: Voltage over AIN1 and AIN3. + 3: Voltage over AIN2 and AIN3. + 4: Voltage over AIN0 and GND. + 5: Voltage over AIN1 and GND. + 6: Voltage over AIN2 and GND. + 7: Voltage over AIN3 and GND. + items: + - minimum: 0 + maximum: 7 + + ti,gain: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 5 + description: | + pga is the programmable gain amplifier (values are full scale) + 0: +/- 6.144 V + 1: +/- 4.096 V + 2: +/- 2.048 V (default) + 3: +/- 1.024 V + 4: +/- 0.512 V + 5: +/- 0.256 V + + ti,datarate: + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 6 + description: | + Data acquisition rate in samples per second + 0: 128 + 1: 250 + 2: 490 + 3: 920 + 4: 1600 (default) + 5: 2400 + 6: 3300 + + required: + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + adc@49 { + compatible = "ti,ads1015"; + reg = <0x49>; + #address-cells = <1>; + #size-cells = <0>; + channel@0 { + reg = <0>; + }; + channel@4 { + reg = <4>; + ti,gain = <3>; + ti,datarate = <5>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads7950.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads7950.yaml new file mode 100644 index 0000000000000..5ab5027be97e0 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads7950.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads7950.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADS7950 and similar ADCs + +maintainers: + - David Lechner + +description: | + Family of 4-16 channel, 8-12 bit ADCs with SPI interface. + +properties: + compatible: + enum: + - ti,ads7950 + - ti,ads7951 + - ti,ads7952 + - ti,ads7953 + - ti,ads7954 + - ti,ads7955 + - ti,ads7956 + - ti,ads7957 + - ti,ads7958 + - ti,ads7959 + - ti,ads7960 + - ti,ads7961 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 20000000 + + vref-supply: + description: Supplies the 2.5V or 5V reference voltage + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,ads7957"; + reg = <0>; + vref-supply = <&refin_supply>; + spi-max-frequency = <10000000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml new file mode 100644 index 0000000000000..b8c398187d5cb --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads8344.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,ads8344.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments ADS8344 ADC + +maintainers: + - Gregory Clement + +description: | + 16bit 8-channel ADC with single ended inputs. + +properties: + compatible: + const: ti,ads8344 + + reg: + maxItems: 1 + + spi-max-frequency: true + + vref-supply: + description: Supply the 2.5V or 5V reference voltage + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,ads8344"; + reg = <0>; + vref-supply = <&refin_supply>; + spi-max-frequency = <10000000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml b/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml index 97fe6cbb2efab..a0af4b24877f2 100644 --- a/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml +++ b/Documentation/devicetree/bindings/iio/adc/ti,ads8688.yaml @@ -25,10 +25,14 @@ properties: description: Optional external reference. If not supplied, assume REFSEL input tied low to enable the internal reference. + spi-max-frequency: true + required: - compatible - reg +additionalProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml b/Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml new file mode 100644 index 0000000000000..6c2539b3d7077 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,tlc4541.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,tlc4541.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Texas Instruments TLC4541 and similar ADCs + +maintainers: + - Phil Reid + +description: | + 14/16bit single channel ADC with SPI interface. + +properties: + compatible: + enum: + - ti,tlc3541 + - ti,tlc4541 + + reg: + maxItems: 1 + + spi-max-frequency: true + + vref-supply: true + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - vref-supply + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "ti,tlc4541"; + reg = <0>; + vref-supply = <&vdd_supply>; + spi-max-frequency = <200000>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/ti,twl4030-madc.yaml b/Documentation/devicetree/bindings/iio/adc/ti,twl4030-madc.yaml new file mode 100644 index 0000000000000..6781ad2f0f517 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/ti,twl4030-madc.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/ti,twl4030-madc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MADC subsystem in the TWL4030 power module + +maintainers: + - Sebastian Reichel + +description: + The MADC subsystem in the TWL4030 consists of a 10-bit ADC + combined with a 16-input analog multiplexer. + +properties: + compatible: + const: ti,twl4030-madc + + interrupts: + maxItems: 1 + + ti,system-uses-second-madc-irq: + type: boolean + description: + Set if the second madc irq register should be used, which is intended + to be used by Co-Processors (e.g. a modem). + + "#io-channel-cells": + const: 1 + +required: + - compatible + - interrupts + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + twl { + madc { + compatible = "ti,twl4030-madc"; + interrupts = <3>; + #io-channel-cells = <1>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/adc/ti-adc0832.txt b/Documentation/devicetree/bindings/iio/adc/ti-adc0832.txt deleted file mode 100644 index d91130587d016..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/ti-adc0832.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Texas Instruments' ADC0831/ADC0832/ADC0832/ADC0838 - -Required properties: - - compatible: Should be one of - * "ti,adc0831" - * "ti,adc0832" - * "ti,adc0834" - * "ti,adc0838" - - reg: spi chip select number for the device - - vref-supply: The regulator supply for ADC reference voltage - - spi-max-frequency: Max SPI frequency to use (< 400000) - -Example: -adc@0 { - compatible = "ti,adc0832"; - reg = <0>; - vref-supply = <&vdd_supply>; - spi-max-frequency = <200000>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/ti-adc108s102.txt b/Documentation/devicetree/bindings/iio/adc/ti-adc108s102.txt deleted file mode 100644 index bbbbb4a9f58f3..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/ti-adc108s102.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Texas Instruments' ADC108S102 and ADC128S102 ADC chip - -Required properties: - - compatible: Should be "ti,adc108s102" - - reg: spi chip select number for the device - - vref-supply: The regulator supply for ADC reference voltage - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: -adc@0 { - compatible = "ti,adc108s102"; - reg = <0>; - vref-supply = <&vdd_supply>; - spi-max-frequency = <1000000>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/ti-adc12138.txt b/Documentation/devicetree/bindings/iio/adc/ti-adc12138.txt deleted file mode 100644 index 049a1d36f0130..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/ti-adc12138.txt +++ /dev/null @@ -1,37 +0,0 @@ -* Texas Instruments' ADC12130/ADC12132/ADC12138 - -Required properties: - - compatible: Should be one of - * "ti,adc12130" - * "ti,adc12132" - * "ti,adc12138" - - reg: SPI chip select number for the device - - interrupts: Should contain interrupt for EOC (end of conversion) - - clocks: phandle to conversion clock input - - spi-max-frequency: Definision as per - Documentation/devicetree/bindings/spi/spi-bus.txt - - vref-p-supply: The regulator supply for positive analog voltage reference - -Optional properties: - - vref-n-supply: The regulator supply for negative analog voltage reference - (Note that this must not go below GND or exceed vref-p) - If not specified, this is assumed to be analog ground. - - ti,acquisition-time: The number of conversion clock periods for the S/H's - acquisition time. Should be one of 6, 10, 18, 34. If not specified, - default value of 10 is used. - For high source impedances, this value can be increased to 18 or 34. - For less ADC accuracy and/or slower CCLK frequencies this value may be - decreased to 6. See section 6.0 INPUT SOURCE RESISTANCE in the - datasheet for details. - -Example: -adc@0 { - compatible = "ti,adc12138"; - reg = <0>; - interrupts = <28 IRQ_TYPE_EDGE_RISING>; - interrupt-parent = <&gpio1>; - clocks = <&cclk>; - vref-p-supply = <&ldo4_reg>; - spi-max-frequency = <5000000>; - ti,acquisition-time = <6>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt b/Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt deleted file mode 100644 index c07ce1a3f5c4f..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt +++ /dev/null @@ -1,25 +0,0 @@ -* Texas Instruments' ADC128S052, ADC122S021 and ADC124S021 ADC chip - -Required properties: - - compatible: Should be one of: - - "ti,adc128s052" - - "ti,adc122s021" - - "ti,adc122s051" - - "ti,adc122s101" - - "ti,adc124s021" - - "ti,adc124s051" - - "ti,adc124s101" - - reg: spi chip select number for the device - - vref-supply: The regulator supply for ADC reference voltage - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: -adc@0 { - compatible = "ti,adc128s052"; - reg = <0>; - vref-supply = <&vdd_supply>; - spi-max-frequency = <1000000>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/ti-adc161s626.txt b/Documentation/devicetree/bindings/iio/adc/ti-adc161s626.txt deleted file mode 100644 index 3d25011f0c99b..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/ti-adc161s626.txt +++ /dev/null @@ -1,18 +0,0 @@ -* Texas Instruments ADC141S626 and ADC161S626 chips - -Required properties: - - compatible: Should be "ti,adc141s626" or "ti,adc161s626" - - reg: spi chip select number for the device - - vdda-supply: supply voltage to VDDA pin - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: -adc@0 { - compatible = "ti,adc161s626"; - vdda-supply = <&vdda_fixed>; - reg = <0>; - spi-max-frequency = <4300000>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/ti-ads7950.txt b/Documentation/devicetree/bindings/iio/adc/ti-ads7950.txt deleted file mode 100644 index e77a6f7e10016..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/ti-ads7950.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Texas Instruments ADS7950 family of A/DC chips - -Required properties: - - compatible: Must be one of "ti,ads7950", "ti,ads7951", "ti,ads7952", - "ti,ads7953", "ti,ads7954", "ti,ads7955", "ti,ads7956", "ti,ads7957", - "ti,ads7958", "ti,ads7959", "ti,ads7960", or "ti,ads7961" - - reg: SPI chip select number for the device - - #io-channel-cells: Must be 1 as per ../iio-bindings.txt - - vref-supply: phandle to a regulator node that supplies the 2.5V or 5V - reference voltage - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: -adc@0 { - compatible = "ti,ads7957"; - reg = <0>; - #io-channel-cells = <1>; - vref-supply = <&refin_supply>; - spi-max-frequency = <10000000>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/ti-ads8344.txt b/Documentation/devicetree/bindings/iio/adc/ti-ads8344.txt deleted file mode 100644 index e47c3759a82b3..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/ti-ads8344.txt +++ /dev/null @@ -1,19 +0,0 @@ -* Texas Instruments ADS8344 A/DC chip - -Required properties: - - compatible: Must be "ti,ads8344" - - reg: SPI chip select number for the device - - vref-supply: phandle to a regulator node that supplies the - reference voltage - -Recommended properties: - - spi-max-frequency: Definition as per - Documentation/devicetree/bindings/spi/spi-bus.txt - -Example: -adc@0 { - compatible = "ti,ads8344"; - reg = <0>; - vref-supply = <&refin_supply>; - spi-max-frequency = <10000000>; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/twl4030-madc.txt b/Documentation/devicetree/bindings/iio/adc/twl4030-madc.txt deleted file mode 100644 index 6bdd21404b57c..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/twl4030-madc.txt +++ /dev/null @@ -1,24 +0,0 @@ -* TWL4030 Monitoring Analog to Digital Converter (MADC) - -The MADC subsystem in the TWL4030 consists of a 10-bit ADC -combined with a 16-input analog multiplexer. - -Required properties: - - compatible: Should contain "ti,twl4030-madc". - - interrupts: IRQ line for the MADC submodule. - - #io-channel-cells: Should be set to <1>. - -Optional properties: - - ti,system-uses-second-madc-irq: boolean, set if the second madc irq register - should be used, which is intended to be used - by Co-Processors (e.g. a modem). - -Example: - -&twl { - madc { - compatible = "ti,twl4030-madc"; - interrupts = <3>; - #io-channel-cells = <1>; - }; -}; diff --git a/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt b/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt deleted file mode 100644 index 1aad0514e6474..0000000000000 --- a/Documentation/devicetree/bindings/iio/adc/vf610-adc.txt +++ /dev/null @@ -1,36 +0,0 @@ -Freescale vf610 Analog to Digital Converter bindings - -The devicetree bindings are for the new ADC driver written for -vf610/i.MX6slx and upward SoCs from Freescale. - -Required properties: -- compatible: Should contain "fsl,vf610-adc" -- reg: Offset and length of the register set for the device -- interrupts: Should contain the interrupt for the device -- clocks: The clock is needed by the ADC controller, ADC clock source is ipg clock. -- clock-names: Must contain "adc", matching entry in the clocks property. -- vref-supply: The regulator supply ADC reference voltage. - -Recommended properties: -- fsl,adck-max-frequency: Maximum frequencies according to datasheets operating - requirements. Three values are required, depending on conversion mode: - - Frequency in normal mode (ADLPC=0, ADHSC=0) - - Frequency in high-speed mode (ADLPC=0, ADHSC=1) - - Frequency in low-power mode (ADLPC=1, ADHSC=0) -- min-sample-time: Minimum sampling time in nanoseconds. This value has - to be chosen according to the conversion mode and the connected analog - source resistance (R_as) and capacitance (C_as). Refer the datasheet's - operating requirements. A safe default across a wide range of R_as and - C_as as well as conversion modes is 1000ns. - -Example: -adc0: adc@4003b000 { - compatible = "fsl,vf610-adc"; - reg = <0x4003b000 0x1000>; - interrupts = <0 53 0x04>; - clocks = <&clks VF610_CLK_ADC0>; - clock-names = "adc"; - fsl,adck-max-frequency = <30000000>, <40000000>, - <20000000>; - vref-supply = <®_vcc_3v3_mcu>; -}; diff --git a/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml b/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml index 5342360e96b12..a557761d8016c 100644 --- a/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml +++ b/Documentation/devicetree/bindings/iio/amplifiers/adi,hmc425a.yaml @@ -33,6 +33,8 @@ required: - compatible - ctrl-gpios +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/chemical/atlas,sensor.yaml b/Documentation/devicetree/bindings/iio/chemical/atlas,sensor.yaml index 9a89b34bdd8ff..4646deeb6f7b2 100644 --- a/Documentation/devicetree/bindings/iio/chemical/atlas,sensor.yaml +++ b/Documentation/devicetree/bindings/iio/chemical/atlas,sensor.yaml @@ -19,6 +19,8 @@ description: | http://www.atlas-scientific.com/_files/_datasheets/_oem/pH_oem_datasheet.pdf http://www.atlas-scientific.com/_files/_datasheets/_oem/RTD_oem_datasheet.pdf http://www.atlas-scientific.com/_files/_datasheets/_probe/EZO_CO2_Datasheet.pdf + https://www.atlas-scientific.com/files/EZO_O2_datasheet.pdf + https://www.atlas-scientific.com/files/EZO_HUM_Datasheet.pdf properties: compatible: @@ -29,6 +31,8 @@ properties: - atlas,ph-sm - atlas,rtd-sm - atlas,co2-ezo + - atlas,o2-ezo + - atlas,hum-ezo reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/iio/common.yaml b/Documentation/devicetree/bindings/iio/common.yaml index 97ffcb77043dd..f845b41d74c4f 100644 --- a/Documentation/devicetree/bindings/iio/common.yaml +++ b/Documentation/devicetree/bindings/iio/common.yaml @@ -32,4 +32,6 @@ properties: considered 'near' to the device (an object is near to the sensor). +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml b/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml index 82424e06be27d..fb2c48fc7ce43 100644 --- a/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml +++ b/Documentation/devicetree/bindings/iio/dac/adi,ad5770r.yaml @@ -49,6 +49,14 @@ properties: asserted during driver probe. maxItems: 1 + spi-max-frequency: true + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + channel@0: description: Represents an external channel which are connected to the DAC. Channel 0 can act both as a current @@ -130,6 +138,8 @@ required: - channel@4 - channel@5 +additionalProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml b/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml new file mode 100644 index 0000000000000..edf804d0aca20 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/iio/dac/lltc,ltc2632.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Linear Technology LTC263x 12-/10-/8-Bit Rail-to-Rail DAC + +maintainers: + - Michael Hennerich + +description: | + Bindings for the Linear Technology LTC2632/2634/2636 DAC + Datasheet can be found here: https://www.analog.com/media/en/technical-documentation/data-sheets/LTC263[246].pdf + +properties: + compatible: + enum: + - lltc,ltc2632-l12 + - lltc,ltc2632-l10 + - lltc,ltc2632-l8 + - lltc,ltc2632-h12 + - lltc,ltc2632-h10 + - lltc,ltc2632-h8 + - lltc,ltc2634-l12 + - lltc,ltc2634-l10 + - lltc,ltc2634-l8 + - lltc,ltc2634-h12 + - lltc,ltc2634-h10 + - lltc,ltc2634-h8 + - lltc,ltc2636-l12 + - lltc,ltc2636-l10 + - lltc,ltc2636-l8 + - lltc,ltc2636-h12 + - lltc,ltc2636-h10 + - lltc,ltc2636-h8 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 2000000 + + vref-supply: + description: + Phandle to the external reference voltage supply. This should + only be set if there is an external reference voltage connected to the VREF + pin. If the property is not set the internal reference is used. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + vref: regulator-vref { + compatible = "regulator-fixed"; + regulator-name = "vref-ltc2632"; + regulator-min-microvolt = <1250000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + }; + + spi { + #address-cells = <1>; + #size-cells = <0>; + + dac@0 { + compatible = "lltc,ltc2632"; + reg = <0>; /* CS0 */ + spi-max-frequency = <1000000>; + vref-supply = <&vref>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/dac/ltc2632.txt b/Documentation/devicetree/bindings/iio/dac/ltc2632.txt deleted file mode 100644 index 1ab9570cf2192..0000000000000 --- a/Documentation/devicetree/bindings/iio/dac/ltc2632.txt +++ /dev/null @@ -1,49 +0,0 @@ -Linear Technology LTC2632/2634/2636 DAC - -Required properties: - - compatible: Has to contain one of the following: - lltc,ltc2632-l12 - lltc,ltc2632-l10 - lltc,ltc2632-l8 - lltc,ltc2632-h12 - lltc,ltc2632-h10 - lltc,ltc2632-h8 - lltc,ltc2634-l12 - lltc,ltc2634-l10 - lltc,ltc2634-l8 - lltc,ltc2634-h12 - lltc,ltc2634-h10 - lltc,ltc2634-h8 - lltc,ltc2636-l12 - lltc,ltc2636-l10 - lltc,ltc2636-l8 - lltc,ltc2636-h12 - lltc,ltc2636-h10 - lltc,ltc2636-h8 - -Property rules described in Documentation/devicetree/bindings/spi/spi-bus.txt -apply. In particular, "reg" and "spi-max-frequency" properties must be given. - -Optional properties: - - vref-supply: Phandle to the external reference voltage supply. This should - only be set if there is an external reference voltage connected to the VREF - pin. If the property is not set the internal reference is used. - -Example: - - vref: regulator-vref { - compatible = "regulator-fixed"; - regulator-name = "vref-ltc2632"; - regulator-min-microvolt = <1250000>; - regulator-max-microvolt = <1250000>; - regulator-always-on; - }; - - spi_master { - dac: ltc2632@0 { - compatible = "lltc,ltc2632-l12"; - reg = <0>; /* CS0 */ - spi-max-frequency = <1000000>; - vref-supply = <&vref>; /* optional */ - }; - }; diff --git a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml index 7ec3ec94356b7..6b3a611e1cf1a 100644 --- a/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml +++ b/Documentation/devicetree/bindings/iio/frequency/adf4371.yaml @@ -40,12 +40,16 @@ properties: output stage will shut down until the ADF4371/ADF4372 achieves lock as measured by the digital lock detect circuitry. + spi-max-frequency: true + required: - compatible - reg - clocks - clock-names +additionalProperties: false + examples: - | spi0 { diff --git a/Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml b/Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml new file mode 100644 index 0000000000000..662ec59ca0af5 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/gyroscope/adi,adxrs290.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2020 Analog Devices Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/gyroscope/adi,adxrs290.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices ADXRS290 Dual-Axis MEMS Gyroscope + +maintainers: + - Nishant Malpani + +description: | + Bindings for the Analog Devices ADXRS290 dual-axis MEMS gyroscope device. + https://www.analog.com/media/en/technical-documentation/data-sheets/ADXRS290.pdf + +properties: + compatible: + const: adi,adxrs290 + + reg: + maxItems: 1 + + spi-max-frequency: + maximum: 5000000 + + spi-cpol: true + + spi-cpha: true + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - spi-max-frequency + - spi-cpol + - spi-cpha + +additionalProperties: false + +examples: + - | + #include + spi { + #address-cells = <1>; + #size-cells = <0>; + gyro@0 { + compatible = "adi,adxrs290"; + reg = <0>; + spi-max-frequency = <5000000>; + spi-cpol; + spi-cpha; + interrupt-parent = <&gpio>; + interrupts = <25 IRQ_TYPE_EDGE_RISING>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml b/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml new file mode 100644 index 0000000000000..dc870eb2875f8 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/humidity/ti,hdc2010.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/humidity/ti,hdc2010.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: HDC2010/HDC2080 humidity and temperature iio sensors + +maintainers: + - Eugene Zaikonnikov + +description: | + Relative humidity and tempereature sensors on I2C bus + + Datasheets are available at: + http://www.ti.com/product/HDC2010/datasheet + http://www.ti.com/product/HDC2080/datasheet + +properties: + compatible: + enum: + - ti,hdc2010 + - ti,hdc2080 + + vdd-supply: + maxItems: 1 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + humidity@40 { + compatible = "ti,hdc2010"; + reg = <0x40>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml index 0c53009ba7d60..340be256f2831 100644 --- a/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml +++ b/Documentation/devicetree/bindings/iio/imu/adi,adis16460.yaml @@ -25,6 +25,8 @@ properties: spi-cpol: true + spi-max-frequency: true + interrupts: maxItems: 1 @@ -33,6 +35,8 @@ required: - reg - interrupts +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml b/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml index 208faaffa58d2..79fba1508e89c 100644 --- a/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml +++ b/Documentation/devicetree/bindings/iio/imu/adi,adis16475.yaml @@ -116,6 +116,8 @@ allOf: dependencies: adi,sync-mode: [ clocks ] +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml b/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml index 33d8e9fd14b75..6e73cd889b5c7 100644 --- a/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml +++ b/Documentation/devicetree/bindings/iio/imu/bosch,bmi160.yaml @@ -46,10 +46,14 @@ properties: mount-matrix: description: an optional 3x3 mounting rotation matrix + spi-max-frequency: true + required: - compatible - reg +additionalProperties: false + examples: - | // Example for I2C diff --git a/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml b/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml index abd8d25e1136a..4c1c083d0e924 100644 --- a/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml +++ b/Documentation/devicetree/bindings/iio/imu/invensense,icm42600.yaml @@ -47,11 +47,17 @@ properties: vddio-supply: description: Regulator that provides power to the bus + spi-max-frequency: true + spi-cpha: true + spi-cpol: true + required: - compatible - reg - interrupts +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml index 63bcb73ae3091..479e7065d4eb7 100644 --- a/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml +++ b/Documentation/devicetree/bindings/iio/imu/nxp,fxos8700.yaml @@ -36,10 +36,14 @@ properties: drive-open-drain: type: boolean + spi-max-frequency: true + required: - compatible - reg +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/light/ams,as73211.yaml b/Documentation/devicetree/bindings/iio/light/ams,as73211.yaml new file mode 100644 index 0000000000000..0e8cd02759b36 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/light/ams,as73211.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/light/ams,as73211.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: AMS AS73211 JENCOLOR(R) Digital XYZ Sensor + +maintainers: + - Christian Eggers + +description: | + XYZ True Color Sensor with I2C Interface + https://ams.com/documents/20143/36005/AS73211_DS000556_3-01.pdf/a65474c0-b302-c2fd-e30a-c98df87616df + +properties: + compatible: + enum: + - ams,as73211 + + reg: + description: + I2C address of the device (0x74...0x77). + maxItems: 1 + + interrupts: + description: + Interrupt specifier for the READY interrupt generated by the device. + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + as73211@74 { + compatible = "ams,as73211"; + reg = <0x74>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_color_sensor>; + interrupt-parent = <&gpio2>; + interrupts = <19 IRQ_TYPE_EDGE_RISING>; /* READY */ + }; + }; +... diff --git a/Documentation/devicetree/bindings/iio/light/amstaos,tsl2563.yaml b/Documentation/devicetree/bindings/iio/light/amstaos,tsl2563.yaml index e201a06d8fdc2..60e76bc035a5b 100644 --- a/Documentation/devicetree/bindings/iio/light/amstaos,tsl2563.yaml +++ b/Documentation/devicetree/bindings/iio/light/amstaos,tsl2563.yaml @@ -32,6 +32,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml b/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml index f671edda66410..a3a979553e32a 100644 --- a/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml +++ b/Documentation/devicetree/bindings/iio/light/dynaimage,al3010.yaml @@ -26,6 +26,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml b/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml index 497300239d93c..8249be99cff92 100644 --- a/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml +++ b/Documentation/devicetree/bindings/iio/light/dynaimage,al3320a.yaml @@ -26,6 +26,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/light/sharp,gp2ap002.yaml b/Documentation/devicetree/bindings/iio/light/sharp,gp2ap002.yaml index 12aa16f24772d..f8a932be0d103 100644 --- a/Documentation/devicetree/bindings/iio/light/sharp,gp2ap002.yaml +++ b/Documentation/devicetree/bindings/iio/light/sharp,gp2ap002.yaml @@ -61,6 +61,8 @@ required: - sharp,proximity-far-hysteresis - sharp,proximity-close-hysteresis +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/light/vishay,vcnl4000.yaml b/Documentation/devicetree/bindings/iio/light/vishay,vcnl4000.yaml index 58887a4f9c152..4d1a225e8868d 100644 --- a/Documentation/devicetree/bindings/iio/light/vishay,vcnl4000.yaml +++ b/Documentation/devicetree/bindings/iio/light/vishay,vcnl4000.yaml @@ -24,6 +24,10 @@ properties: - vishay,vcnl4020 - vishay,vcnl4040 - vishay,vcnl4200 + + interrupts: + maxItems: 1 + reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml b/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml index f0b336ac39c9a..a25590a16ba7e 100644 --- a/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml +++ b/Documentation/devicetree/bindings/iio/magnetometer/asahi-kasei,ak8975.yaml @@ -55,6 +55,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/iio/proximity/semtech,sx9310.yaml b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9310.yaml new file mode 100644 index 0000000000000..5739074d3592f --- /dev/null +++ b/Documentation/devicetree/bindings/iio/proximity/semtech,sx9310.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/proximity/semtech,sx9310.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Semtech's SX9310 capacitive proximity sensor + +maintainers: + - Daniel Campello + +description: | + Semtech's SX9310/SX9311 capacitive proximity/button solution. + + Specifications about the devices can be found at: + https://www.semtech.com/products/smart-sensing/sar-sensors/sx9310 + +properties: + compatible: + enum: + - semtech,sx9310 + - semtech,sx9311 + + reg: + maxItems: 1 + + interrupts: + description: + The sole interrupt generated by the device used to announce the + preceding reading request has finished and that data is + available or that a close/far proximity event has happened. + maxItems: 1 + + vdd-supply: + description: Main power supply + + svdd-supply: + description: Host interface power supply + + "#io-channel-cells": + const: 1 + +required: + - compatible + - reg + - "#io-channel-cells" + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + proximity@28 { + compatible = "semtech,sx9310"; + reg = <0x28>; + interrupt-parent = <&pio>; + interrupts = <5 IRQ_TYPE_LEVEL_LOW 5>; + vdd-supply = <&pp3300_a>; + svdd-supply = <&pp1800_prox>; + #io-channel-cells = <1>; + }; + }; diff --git a/Documentation/devicetree/bindings/iio/proximity/vishay,vcnl3020.yaml b/Documentation/devicetree/bindings/iio/proximity/vishay,vcnl3020.yaml index 51dba64037f69..fbd3a2e322801 100644 --- a/Documentation/devicetree/bindings/iio/proximity/vishay,vcnl3020.yaml +++ b/Documentation/devicetree/bindings/iio/proximity/vishay,vcnl3020.yaml @@ -47,6 +47,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/iio/proximity/vl53l0x.txt b/Documentation/devicetree/bindings/iio/proximity/vl53l0x.txt index aac5f621f8dc2..dfe00eb961cd8 100644 --- a/Documentation/devicetree/bindings/iio/proximity/vl53l0x.txt +++ b/Documentation/devicetree/bindings/iio/proximity/vl53l0x.txt @@ -4,9 +4,15 @@ Required properties: - compatible: must be "st,vl53l0x" - reg: i2c address where to find the device +Optional properties: + - interrupts: Interrupt for notifying that new measurement is ready. + If no interrupt is specified, polling is used. + Example: vl53l0x@29 { compatible = "st,vl53l0x"; reg = <0x29>; + interrupt-parent = <&gpio>; + interrupts = <23 IRQ_TYPE_EDGE_FALLING>; }; diff --git a/Documentation/devicetree/bindings/input/adc-joystick.yaml b/Documentation/devicetree/bindings/input/adc-joystick.yaml new file mode 100644 index 0000000000000..054406bbd22b6 --- /dev/null +++ b/Documentation/devicetree/bindings/input/adc-joystick.yaml @@ -0,0 +1,121 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019-2020 Artur Rojek +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/input/adc-joystick.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: ADC attached joystick + +maintainers: + - Artur Rojek + +description: > + Bindings for joystick devices connected to ADC controllers supporting + the Industrial I/O subsystem. + +properties: + compatible: + const: adc-joystick + + io-channels: + minItems: 1 + maxItems: 1024 + description: > + List of phandle and IIO specifier pairs. + Each pair defines one ADC channel to which a joystick axis is connected. + See Documentation/devicetree/bindings/iio/iio-bindings.txt for details. + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +required: + - compatible + - io-channels + - '#address-cells' + - '#size-cells' + +additionalProperties: false + +patternProperties: + "^axis@[0-9a-f]+$": + type: object + description: > + Represents a joystick axis bound to the given ADC channel. + For each entry in the io-channels list, one axis subnode with a matching + reg property must be specified. + + properties: + reg: + minimum: 0 + maximum: 1023 + description: Index of an io-channels list entry bound to this axis. + + linux,code: + $ref: /schemas/types.yaml#/definitions/uint32 + description: EV_ABS specific event code generated by the axis. + + abs-range: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + - items: + - description: minimum value + - description: maximum value + description: > + Minimum and maximum values produced by the axis. + For an ABS_X axis this will be the left-most and right-most + inclination of the joystick. If min > max, it is left to userspace to + treat the axis as inverted. + This property is interpreted as two signed 32 bit values. + + abs-fuzz: + $ref: /schemas/types.yaml#/definitions/uint32 + description: > + Amount of noise in the input value. + Omitting this property indicates the axis is precise. + + abs-flat: + $ref: /schemas/types.yaml#/definitions/uint32 + description: > + Axial "deadzone", or area around the center position, where the axis + is considered to be at rest. + Omitting this property indicates the axis always returns to exactly + the center position. + + required: + - reg + - linux,code + - abs-range + + additionalProperties: false + +examples: + - | + #include + #include + + joystick: adc-joystick { + compatible = "adc-joystick"; + io-channels = <&adc INGENIC_ADC_TOUCH_XP>, + <&adc INGENIC_ADC_TOUCH_YP>; + #address-cells = <1>; + #size-cells = <0>; + + axis@0 { + reg = <0>; + linux,code = ; + abs-range = <3300 0>; + abs-fuzz = <4>; + abs-flat = <200>; + }; + axis@1 { + reg = <1>; + linux,code = ; + abs-range = <0 3300>; + abs-fuzz = <4>; + abs-flat = <200>; + }; + }; diff --git a/Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml b/Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml index 5b37be0be4e92..378a85c09d341 100644 --- a/Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml +++ b/Documentation/devicetree/bindings/input/fsl,mpr121-touchkey.yaml @@ -48,6 +48,8 @@ required: - vdd-supply - linux,keycodes +unevaluatedProperties: false + examples: - | // Example with interrupts diff --git a/Documentation/devicetree/bindings/input/input.yaml b/Documentation/devicetree/bindings/input/input.yaml index 8edcb3c31270f..ab407f266bef1 100644 --- a/Documentation/devicetree/bindings/input/input.yaml +++ b/Documentation/devicetree/bindings/input/input.yaml @@ -33,3 +33,5 @@ properties: power off automatically. Device with key pressed shutdown feature can specify this property. $ref: /schemas/types.yaml#/definitions/uint32 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/input/matrix-keymap.yaml b/Documentation/devicetree/bindings/input/matrix-keymap.yaml index c3bf09156783a..6699d5e32dcaf 100644 --- a/Documentation/devicetree/bindings/input/matrix-keymap.yaml +++ b/Documentation/devicetree/bindings/input/matrix-keymap.yaml @@ -35,6 +35,8 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 description: Number of column lines connected to the keypad controller. +additionalProperties: true + examples: - | keypad { diff --git a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml index 36dc7b56a453b..a771a15f053fa 100644 --- a/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml +++ b/Documentation/devicetree/bindings/input/touchscreen/touchscreen.yaml @@ -81,3 +81,5 @@ dependencies: touchscreen-size-y: [ touchscreen-size-x ] touchscreen-x-mm: [ touchscreen-y-mm ] touchscreen-y-mm: [ touchscreen-x-mm ] + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/input/touchscreen/zinitix.txt b/Documentation/devicetree/bindings/input/touchscreen/zinitix.txt new file mode 100644 index 0000000000000..446efb9f5f551 --- /dev/null +++ b/Documentation/devicetree/bindings/input/touchscreen/zinitix.txt @@ -0,0 +1,40 @@ +Device tree bindings for Zinitx BT541 touchscreen controller + +Required properties: + + - compatible : Should be "zinitix,bt541" + - reg : I2C address of the chip. Should be 0x20 + - interrupts : Interrupt to which the chip is connected + +Optional properties: + + - vdd-supply : Analog power supply regulator on VCCA pin + - vddo-supply : Digital power supply regulator on VDD pin + - zinitix,mode : Mode of reporting touch points. Some modes may not work + with a particular ts firmware for unknown reasons. Available + modes are 1 and 2. Mode 2 is the default and preferred. + +The touchscreen-* properties are documented in touchscreen.txt in this +directory. + +Example: + + i2c@00000000 { + /* ... */ + + bt541@20 { + compatible = "zinitix,bt541"; + reg = <0x20>; + interrupt-parent = <&msmgpio>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + pinctrl-names = "default"; + pinctrl-0 = <&tsp_default>; + vdd-supply = <®_vdd_tsp>; + vddo-supply = <&pm8916_l6>; + touchscreen-size-x = <540>; + touchscreen-size-y = <960>; + zinitix,mode = <2>; + }; + + /* ... */ + }; diff --git a/Documentation/devicetree/bindings/interconnect/interconnect.txt b/Documentation/devicetree/bindings/interconnect/interconnect.txt index 6f5d23a605b75..138c544c8c8c3 100644 --- a/Documentation/devicetree/bindings/interconnect/interconnect.txt +++ b/Documentation/devicetree/bindings/interconnect/interconnect.txt @@ -19,7 +19,8 @@ directly. Required properties: - compatible : contains the interconnect provider compatible string - #interconnect-cells : number of cells in a interconnect specifier needed to - encode the interconnect node id + encode the interconnect node id and optionally add a + path tag Example: @@ -44,6 +45,10 @@ components it has to interact with. Required properties: interconnects : Pairs of phandles and interconnect provider specifier to denote the edge source and destination ports of the interconnect path. + An optional path tag value could specified as additional argument + to both endpoints and in such cases, this information will be passed + to the interconnect framework to do aggregation based on the attached + tag. Optional properties: interconnect-names : List of interconnect path name strings sorted in the same @@ -62,3 +67,20 @@ Example: interconnects = <&pnoc MASTER_SDCC_1 &bimc SLAVE_EBI_CH0>; interconnect-names = "sdhc-mem"; }; + +Example with path tags: + + gnoc: interconnect@17900000 { + ... + interconnect-cells = <2>; + }; + + mnoc: interconnect@1380000 { + ... + interconnect-cells = <2>; + }; + + cpu@0 { + ... + interconnects = <&gnoc MASTER_APPSS_PROC 3 &mnoc SLAVE_EBI1 3>; + } diff --git a/Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml b/Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml index 5971fc1df08d9..e23df4836c6f5 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,bcm-voter.yaml @@ -21,6 +21,23 @@ properties: enum: - qcom,bcm-voter + qcom,tcs-wait: + description: | + Optional mask of which TCSs (Triggered Command Sets) wait for completion + upon triggering. If not specified, then the AMC and WAKE sets wait for + completion. The mask bits are available in the QCOM_ICC_TAG_* defines. + + The AMC TCS is triggered immediately when icc_set_bw() is called. The + WAKE/SLEEP TCSs are triggered when the RSC transitions between active and + sleep modes. + + In most cases, it's necessary to wait in both the AMC and WAKE sets to + ensure resources are available before use. If a specific RSC and its use + cases can ensure sufficient delay by other means, then this can be + overridden to reduce latencies. + + $ref: /schemas/types.yaml#/definitions/uint32 + required: - compatible @@ -39,7 +56,10 @@ examples: # as defined in Documentation/devicetree/bindings/soc/qcom/rpmh-rsc.txt - | + #include + disp_bcm_voter: bcm_voter { compatible = "qcom,bcm-voter"; + qcom,tcs-wait = ; }; ... diff --git a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml index 91f70c9067d12..d6a95c3cb26f2 100644 --- a/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml +++ b/Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml @@ -19,6 +19,8 @@ properties: enum: - qcom,sc7180-osm-l3 - qcom,sdm845-osm-l3 + - qcom,sm8150-osm-l3 + - qcom,sm8250-epss-l3 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml new file mode 100644 index 0000000000000..30c2a092d2d34 --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml @@ -0,0 +1,110 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interconnect/qcom,rpmh.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm RPMh Network-On-Chip Interconnect + +maintainers: + - Georgi Djakov + - Odelu Kukatla + +description: | + RPMh interconnect providers support system bandwidth requirements through + RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is + able to communicate with the BCM through the Resource State Coordinator (RSC) + associated with each execution environment. Provider nodes must point to at + least one RPMh device child node pertaining to their RSC and each provider + can map to multiple RPMh resources. + +properties: + reg: + maxItems: 1 + + compatible: + enum: + - qcom,sc7180-aggre1-noc + - qcom,sc7180-aggre2-noc + - qcom,sc7180-camnoc-virt + - qcom,sc7180-compute-noc + - qcom,sc7180-config-noc + - qcom,sc7180-dc-noc + - qcom,sc7180-gem-noc + - qcom,sc7180-ipa-virt + - qcom,sc7180-mc-virt + - qcom,sc7180-mmss-noc + - qcom,sc7180-npu-noc + - qcom,sc7180-qup-virt + - qcom,sc7180-system-noc + - qcom,sdm845-aggre1-noc + - qcom,sdm845-aggre2-noc + - qcom,sdm845-config-noc + - qcom,sdm845-dc-noc + - qcom,sdm845-gladiator-noc + - qcom,sdm845-mem-noc + - qcom,sdm845-mmss-noc + - qcom,sdm845-system-noc + - qcom,sm8150-aggre1-noc + - qcom,sm8150-aggre2-noc + - qcom,sm8150-camnoc-noc + - qcom,sm8150-compute-noc + - qcom,sm8150-config-noc + - qcom,sm8150-dc-noc + - qcom,sm8150-gem-noc + - qcom,sm8150-ipa-virt + - qcom,sm8150-mc-virt + - qcom,sm8150-mmss-noc + - qcom,sm8150-system-noc + - qcom,sm8250-aggre1-noc + - qcom,sm8250-aggre2-noc + - qcom,sm8250-compute-noc + - qcom,sm8250-config-noc + - qcom,sm8250-dc-noc + - qcom,sm8250-gem-noc + - qcom,sm8250-ipa-virt + - qcom,sm8250-mc-virt + - qcom,sm8250-mmss-noc + - qcom,sm8250-npu-noc + - qcom,sm8250-system-noc + + '#interconnect-cells': + const: 1 + + qcom,bcm-voters: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: | + List of phandles to qcom,bcm-voter nodes that are required by + this interconnect to send RPMh commands. + + qcom,bcm-voter-names: + $ref: /schemas/types.yaml#/definitions/string-array + description: | + Names for each of the qcom,bcm-voters specified. + +required: + - compatible + - reg + - '#interconnect-cells' + - qcom,bcm-voters + +additionalProperties: false + +examples: + - | + #include + + mem_noc: interconnect@1380000 { + compatible = "qcom,sdm845-mem-noc"; + reg = <0x01380000 0x27200>; + #interconnect-cells = <1>; + qcom,bcm-voters = <&apps_bcm_voter>; + }; + + mmss_noc: interconnect@1740000 { + compatible = "qcom,sdm845-mmss-noc"; + reg = <0x01740000 0x1c1000>; + #interconnect-cells = <1>; + qcom,bcm-voter-names = "apps", "disp"; + qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>; + }; diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sc7180.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sc7180.yaml deleted file mode 100644 index 8659048f92a7c..0000000000000 --- a/Documentation/devicetree/bindings/interconnect/qcom,sc7180.yaml +++ /dev/null @@ -1,85 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/interconnect/qcom,sc7180.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm SC7180 Network-On-Chip Interconnect - -maintainers: - - Odelu Kukatla - -description: | - SC7180 interconnect providers support system bandwidth requirements through - RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is - able to communicate with the BCM through the Resource State Coordinator (RSC) - associated with each execution environment. Provider nodes must point to at - least one RPMh device child node pertaining to their RSC and each provider - can map to multiple RPMh resources. - -properties: - reg: - maxItems: 1 - - compatible: - enum: - - qcom,sc7180-aggre1-noc - - qcom,sc7180-aggre2-noc - - qcom,sc7180-camnoc-virt - - qcom,sc7180-compute-noc - - qcom,sc7180-config-noc - - qcom,sc7180-dc-noc - - qcom,sc7180-gem-noc - - qcom,sc7180-ipa-virt - - qcom,sc7180-mc-virt - - qcom,sc7180-mmss-noc - - qcom,sc7180-npu-noc - - qcom,sc7180-qup-virt - - qcom,sc7180-system-noc - - '#interconnect-cells': - const: 1 - - qcom,bcm-voters: - $ref: /schemas/types.yaml#/definitions/phandle-array - description: | - List of phandles to qcom,bcm-voter nodes that are required by - this interconnect to send RPMh commands. - - qcom,bcm-voter-names: - $ref: /schemas/types.yaml#/definitions/string-array - description: | - Names for each of the qcom,bcm-voters specified. - -required: - - compatible - - reg - - '#interconnect-cells' - - qcom,bcm-voters - -additionalProperties: false - -examples: - - | - #include - - config_noc: interconnect@1500000 { - compatible = "qcom,sc7180-config-noc"; - reg = <0x01500000 0x28000>; - #interconnect-cells = <1>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; - - system_noc: interconnect@1620000 { - compatible = "qcom,sc7180-system-noc"; - reg = <0x01620000 0x17080>; - #interconnect-cells = <1>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; - - mmss_noc: interconnect@1740000 { - compatible = "qcom,sc7180-mmss-noc"; - reg = <0x01740000 0x1c100>; - #interconnect-cells = <1>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; diff --git a/Documentation/devicetree/bindings/interconnect/qcom,sdm845.yaml b/Documentation/devicetree/bindings/interconnect/qcom,sdm845.yaml deleted file mode 100644 index dab17c0716ced..0000000000000 --- a/Documentation/devicetree/bindings/interconnect/qcom,sdm845.yaml +++ /dev/null @@ -1,74 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/interconnect/qcom,sdm845.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Qualcomm SDM845 Network-On-Chip Interconnect - -maintainers: - - Georgi Djakov - -description: | - SDM845 interconnect providers support system bandwidth requirements through - RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is - able to communicate with the BCM through the Resource State Coordinator (RSC) - associated with each execution environment. Provider nodes must point to at - least one RPMh device child node pertaining to their RSC and each provider - can map to multiple RPMh resources. - -properties: - reg: - maxItems: 1 - - compatible: - enum: - - qcom,sdm845-aggre1-noc - - qcom,sdm845-aggre2-noc - - qcom,sdm845-config-noc - - qcom,sdm845-dc-noc - - qcom,sdm845-gladiator-noc - - qcom,sdm845-mem-noc - - qcom,sdm845-mmss-noc - - qcom,sdm845-system-noc - - '#interconnect-cells': - const: 1 - - qcom,bcm-voters: - $ref: /schemas/types.yaml#/definitions/phandle-array - description: | - List of phandles to qcom,bcm-voter nodes that are required by - this interconnect to send RPMh commands. - - qcom,bcm-voter-names: - $ref: /schemas/types.yaml#/definitions/string-array - description: | - Names for each of the qcom,bcm-voters specified. - -required: - - compatible - - reg - - '#interconnect-cells' - - qcom,bcm-voters - -additionalProperties: false - -examples: - - | - #include - - mem_noc: interconnect@1380000 { - compatible = "qcom,sdm845-mem-noc"; - reg = <0x01380000 0x27200>; - #interconnect-cells = <1>; - qcom,bcm-voters = <&apps_bcm_voter>; - }; - - mmss_noc: interconnect@1740000 { - compatible = "qcom,sdm845-mmss-noc"; - reg = <0x01740000 0x1c1000>; - #interconnect-cells = <1>; - qcom,bcm-voter-names = "apps", "disp"; - qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml new file mode 100644 index 0000000000000..5da333c644c90 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/actions,owl-sirq.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/actions,owl-sirq.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi Owl SoCs SIRQ interrupt controller + +maintainers: + - Manivannan Sadhasivam + - Cristian Ciocaltea + +description: | + This interrupt controller is found in the Actions Semi Owl SoCs (S500, S700 + and S900) and provides support for handling up to 3 external interrupt lines. + +properties: + compatible: + enum: + - actions,s500-sirq + - actions,s700-sirq + - actions,s900-sirq + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + description: + The first cell is the input IRQ number, between 0 and 2, while the second + cell is the trigger type as defined in interrupt.txt in this directory. + + 'interrupts': + description: | + Contains the GIC SPI IRQs mapped to the external interrupt lines. + They shall be specified sequentially from output 0 to 2. + minItems: 3 + maxItems: 3 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - 'interrupts' + +additionalProperties: false + +examples: + - | + #include + + sirq: interrupt-controller@b01b0200 { + compatible = "actions,s500-sirq"; + reg = <0xb01b0200 0x4>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = , /* SIRQ0 */ + , /* SIRQ1 */ + ; /* SIRQ2 */ + }; + +... diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml index 7cd6b8bacfa08..8acca0ae31298 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml @@ -29,10 +29,13 @@ properties: - items: - const: allwinner,sun8i-a83t-r-intc - const: allwinner,sun6i-a31-r-intc - - const: allwinner,sun9i-a80-sc-nmi + - const: allwinner,sun9i-a80-nmi - items: - const: allwinner,sun50i-a64-r-intc - const: allwinner,sun6i-a31-r-intc + - items: + - const: allwinner,sun50i-a100-nmi + - const: allwinner,sun9i-a80-nmi - items: - const: allwinner,sun50i-h6-r-intc - const: allwinner,sun6i-a31-r-intc diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml index 360a575ef8b09..3b11a1a15398c 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,irqsteer.yaml @@ -11,9 +11,11 @@ maintainers: properties: compatible: - enum: - - fsl,imx8m-irqsteer - - fsl,imx-irqsteer + oneOf: + - const: fsl,imx-irqsteer + - items: + - const: fsl,imx8m-irqsteer + - const: fsl,imx-irqsteer reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/interrupt-controller/img,meta-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/img,meta-intc.txt deleted file mode 100644 index 42431f44697fb..0000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/img,meta-intc.txt +++ /dev/null @@ -1,82 +0,0 @@ -* Meta External Trigger Controller Binding - -This binding specifies what properties must be available in the device tree -representation of a Meta external trigger controller. - -Required properties: - - - compatible: Specifies the compatibility list for the interrupt controller. - The type shall be and the value shall include "img,meta-intc". - - - num-banks: Specifies the number of interrupt banks (each of which can - handle 32 interrupt sources). - - - interrupt-controller: The presence of this property identifies the node - as an interrupt controller. No property value shall be defined. - - - #interrupt-cells: Specifies the number of cells needed to encode an - interrupt source. The type shall be a and the value shall be 2. - - - #address-cells: Specifies the number of cells needed to encode an - address. The type shall be and the value shall be 0. As such, - 'interrupt-map' nodes do not have to specify a parent unit address. - -Optional properties: - - - no-mask: The controller doesn't have any mask registers. - -* Interrupt Specifier Definition - - Interrupt specifiers consists of 2 cells encoded as follows: - - - <1st-cell>: The interrupt-number that identifies the interrupt source. - - - <2nd-cell>: The Linux interrupt flags containing level-sense information, - encoded as follows: - 1 = edge triggered - 4 = level-sensitive - -* Examples - -Example 1: - - /* - * Meta external trigger block - */ - intc: intc { - // This is an interrupt controller node. - interrupt-controller; - - // No address cells so that 'interrupt-map' nodes which - // reference this interrupt controller node do not need a parent - // address specifier. - #address-cells = <0>; - - // Two cells to encode interrupt sources. - #interrupt-cells = <2>; - - // Number of interrupt banks - num-banks = <2>; - - // No HWMASKEXT is available (specify on Chorus2 and Comet ES1) - no-mask; - - // Compatible with Meta hardware trigger block. - compatible = "img,meta-intc"; - }; - -Example 2: - - /* - * An interrupt generating device that is wired to a Meta external - * trigger block. - */ - uart1: uart@02004c00 { - // Interrupt source '5' that is level-sensitive. - // Note that there are only two cells as specified in the - // interrupt parent's '#interrupt-cells' property. - interrupts = <5 4 /* level */>; - - // The interrupt controller that this device is wired to. - interrupt-parent = <&intc>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml index 02a3cf470518a..0a046be8d1cda 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.yaml @@ -49,6 +49,8 @@ required: - "#interrupt-cells" - interrupt-controller +additionalProperties: false + examples: - | intc: interrupt-controller@10001000 { diff --git a/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml new file mode 100644 index 0000000000000..e8dfa6507f64d --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/kontron,sl28cpld-intc.yaml @@ -0,0 +1,54 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/kontron,sl28cpld-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Interrupt controller driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + + The following interrupts are available. All types and levels are fixed + and handled by the board management controller. + + ==== ============= ================================== + IRQ line/device description + ==== ============= ================================== + 0 RTC_INT# Interrupt line from on-board RTC + 1 SMB_ALERT# Event on SMB_ALERT# line (P1) + 2 ESPI_ALERT0# Event on ESPI_ALERT0# line (S43) + 3 ESPI_ALERT1# Event on ESPI_ALERT1# line (S44) + 4 PWR_BTN# Event on PWR_BTN# line (P128) + 5 SLEEP# Event on SLEEP# line (S149) + 6 watchdog Interrupt of the internal watchdog + 7 n/a not used + ==== ============= ================================== + +properties: + compatible: + enum: + - kontron,sl28cpld-intc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + "#interrupt-cells": + const: 2 + + interrupt-controller: true + +required: + - compatible + - interrupts + - "#interrupt-cells" + - interrupt-controller + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml index c8861cbbb8b57..d1d52d1db2be8 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,htpic.yaml @@ -41,6 +41,8 @@ required: - interrupt-controller - '#interrupt-cells' +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml index 03fc4f5b4b395..f38e0113f3601 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,liointc.yaml @@ -67,6 +67,8 @@ required: - 'loongson,parent_int_map' +unevaluatedProperties: false + examples: - | iointc: interrupt-controller@3ff01400 { diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml index 1b256d9dd92ac..1f6fd73d46244 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-msi.yaml @@ -46,6 +46,8 @@ required: - loongson,msi-base-vec - loongson,msi-num-vecs +additionalProperties: true #fixme + examples: - | #include diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml index a6dcbb2971a90..fdd6a38a31db2 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,pch-pic.yaml @@ -41,6 +41,8 @@ required: - interrupt-controller - '#interrupt-cells' +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/interrupt-controller/mstar,mst-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/mstar,mst-intc.yaml new file mode 100644 index 0000000000000..bbf0f26cd008e --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/mstar,mst-intc.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/mstar,mst-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MStar Interrupt Controller + +maintainers: + - Mark-PK Tsai + +description: |+ + MStar, SigmaStar and Mediatek TV SoCs contain multiple legacy + interrupt controllers that routes interrupts to the GIC. + + The HW block exposes a number of interrupt controllers, each + can support up to 64 interrupts. + +properties: + compatible: + const: mstar,mst-intc + + interrupt-controller: true + + "#interrupt-cells": + const: 3 + description: | + Use the same format as specified by GIC in arm,gic.yaml. + + reg: + maxItems: 1 + + mstar,irqs-map-range: + description: | + The range of parent interrupt controller's interrupt + lines that are hardwired to mstar interrupt controller. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + minItems: 2 + maxItems: 2 + + mstar,intc-no-eoi: + description: + Mark this controller has no End Of Interrupt(EOI) implementation. + type: boolean + +required: + - compatible + - reg + - mstar,irqs-map-range + +additionalProperties: false + +examples: + - | + mst_intc0: interrupt-controller@1f2032d0 { + compatible = "mstar,mst-intc"; + interrupt-controller; + #interrupt-cells = <3>; + interrupt-parent = <&gic>; + reg = <0x1f2032d0 0x30>; + mstar,irqs-map-range = <0 63>; + }; +... diff --git a/Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml b/Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml index ce6aaff152149..039e08af98bb7 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/mti,gic.yaml @@ -95,7 +95,7 @@ properties: additionalProperties: false -unevaluatedProperties: false +additionalProperties: false required: - compatible diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.txt b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.txt deleted file mode 100644 index 6adf7a6e8825e..0000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.txt +++ /dev/null @@ -1,58 +0,0 @@ -SiFive Platform-Level Interrupt Controller (PLIC) -------------------------------------------------- - -SiFive SOCs include an implementation of the Platform-Level Interrupt Controller -(PLIC) high-level specification in the RISC-V Privileged Architecture -specification. The PLIC connects all external interrupts in the system to all -hart contexts in the system, via the external interrupt source in each hart. - -A hart context is a privilege mode in a hardware execution thread. For example, -in an 4 core system with 2-way SMT, you have 8 harts and probably at least two -privilege modes per hart; machine mode and supervisor mode. - -Each interrupt can be enabled on per-context basis. Any context can claim -a pending enabled interrupt and then release it once it has been handled. - -Each interrupt has a configurable priority. Higher priority interrupts are -serviced first. Each context can specify a priority threshold. Interrupts -with priority below this threshold will not cause the PLIC to raise its -interrupt line leading to the context. - -While the PLIC supports both edge-triggered and level-triggered interrupts, -interrupt handlers are oblivious to this distinction and therefore it is not -specified in the PLIC device-tree binding. - -While the RISC-V ISA doesn't specify a memory layout for the PLIC, the -"sifive,plic-1.0.0" device is a concrete implementation of the PLIC that -contains a specific memory layout, which is documented in chapter 8 of the -SiFive U5 Coreplex Series Manual . - -Required properties: -- compatible : "sifive,plic-1.0.0" and a string identifying the actual - detailed implementation in case that specific bugs need to be worked around. -- #address-cells : should be <0> or more. -- #interrupt-cells : should be <1> or more. -- interrupt-controller : Identifies the node as an interrupt controller. -- reg : Should contain 1 register range (address and length). -- interrupts-extended : Specifies which contexts are connected to the PLIC, - with "-1" specifying that a context is not present. Each node pointed - to should be a riscv,cpu-intc node, which has a riscv node as parent. -- riscv,ndev: Specifies how many external interrupts are supported by - this controller. - -Example: - - plic: interrupt-controller@c000000 { - #address-cells = <0>; - #interrupt-cells = <1>; - compatible = "sifive,plic-1.0.0", "sifive,fu540-c000-plic"; - interrupt-controller; - interrupts-extended = < - &cpu0-intc 11 - &cpu1-intc 11 &cpu1-intc 9 - &cpu2-intc 11 &cpu2-intc 9 - &cpu3-intc 11 &cpu3-intc 9 - &cpu4-intc 11 &cpu4-intc 9>; - reg = <0xc000000 0x4000000>; - riscv,ndev = <10>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml new file mode 100644 index 0000000000000..b9a61c9f75308 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +# Copyright (C) 2020 SiFive, Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/sifive,plic-1.0.0.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SiFive Platform-Level Interrupt Controller (PLIC) + +description: + SiFive SOCs include an implementation of the Platform-Level Interrupt Controller + (PLIC) high-level specification in the RISC-V Privileged Architecture + specification. The PLIC connects all external interrupts in the system to all + hart contexts in the system, via the external interrupt source in each hart. + + A hart context is a privilege mode in a hardware execution thread. For example, + in an 4 core system with 2-way SMT, you have 8 harts and probably at least two + privilege modes per hart; machine mode and supervisor mode. + + Each interrupt can be enabled on per-context basis. Any context can claim + a pending enabled interrupt and then release it once it has been handled. + + Each interrupt has a configurable priority. Higher priority interrupts are + serviced first. Each context can specify a priority threshold. Interrupts + with priority below this threshold will not cause the PLIC to raise its + interrupt line leading to the context. + + While the PLIC supports both edge-triggered and level-triggered interrupts, + interrupt handlers are oblivious to this distinction and therefore it is not + specified in the PLIC device-tree binding. + + While the RISC-V ISA doesn't specify a memory layout for the PLIC, the + "sifive,plic-1.0.0" device is a concrete implementation of the PLIC that + contains a specific memory layout, which is documented in chapter 8 of the + SiFive U5 Coreplex Series Manual . + +maintainers: + - Sagar Kadam + - Paul Walmsley + - Palmer Dabbelt + +properties: + compatible: + items: + - const: sifive,fu540-c000-plic + - const: sifive,plic-1.0.0 + + reg: + maxItems: 1 + + '#address-cells': + const: 0 + + '#interrupt-cells': + const: 1 + + interrupt-controller: true + + interrupts-extended: + minItems: 1 + description: + Specifies which contexts are connected to the PLIC, with "-1" specifying + that a context is not present. Each node pointed to should be a + riscv,cpu-intc node, which has a riscv node as parent. + + riscv,ndev: + $ref: "/schemas/types.yaml#/definitions/uint32" + description: + Specifies how many external interrupts are supported by this controller. + +required: + - compatible + - '#address-cells' + - '#interrupt-cells' + - interrupt-controller + - reg + - interrupts-extended + - riscv,ndev + +additionalProperties: false + +examples: + - | + plic: interrupt-controller@c000000 { + #address-cells = <0>; + #interrupt-cells = <1>; + compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; + interrupt-controller; + interrupts-extended = < + &cpu0_intc 11 + &cpu1_intc 11 &cpu1_intc 9 + &cpu2_intc 11 &cpu2_intc 9 + &cpu3_intc 11 &cpu3_intc 9 + &cpu4_intc 11 &cpu4_intc 9>; + reg = <0xc000000 0x4000000>; + riscv,ndev = <10>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt index 086ff08322db9..2db59df9408f4 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/snps,dw-apb-ictl.txt @@ -2,7 +2,8 @@ Synopsys DesignWare APB interrupt controller (dw_apb_ictl) Synopsys DesignWare provides interrupt controller IP for APB known as dw_apb_ictl. The IP is used as secondary interrupt controller in some SoCs with -APB bus, e.g. Marvell Armada 1500. +APB bus, e.g. Marvell Armada 1500. It can also be used as primary interrupt +controller in some SoCs, e.g. Hisilicon SD5203. Required properties: - compatible: shall be "snps,dw-apb-ictl" @@ -10,6 +11,8 @@ Required properties: region starting with ENABLE_LOW register - interrupt-controller: identifies the node as an interrupt controller - #interrupt-cells: number of cells to encode an interrupt-specifier, shall be 1 + +Additional required property when it's used as secondary interrupt controller: - interrupts: interrupt reference to primary interrupt controller The interrupt sources map to the corresponding bits in the interrupt @@ -21,6 +24,7 @@ registers, i.e. - (optional) fast interrupts start at 64. Example: + /* dw_apb_ictl is used as secondary interrupt controller */ aic: interrupt-controller@3000 { compatible = "snps,dw-apb-ictl"; reg = <0x3000 0xc00>; @@ -29,3 +33,11 @@ Example: interrupt-parent = <&gic>; interrupts = ; }; + + /* dw_apb_ictl is used as primary interrupt controller */ + vic: interrupt-controller@10130000 { + compatible = "snps,dw-apb-ictl"; + reg = <0x10130000 0x1000>; + interrupt-controller; + #interrupt-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml new file mode 100644 index 0000000000000..bbf79d125675d --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/ti,pruss-intc.yaml @@ -0,0 +1,158 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/ti,pruss-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI PRU-ICSS Local Interrupt Controller + +maintainers: + - Suman Anna + +description: | + Each PRU-ICSS has a single interrupt controller instance that is common + to all the PRU cores. Most interrupt controllers can route 64 input events + which are then mapped to 10 possible output interrupts through two levels + of mapping. The input events can be triggered by either the PRUs and/or + various other PRUSS internal and external peripherals. The first 2 output + interrupts (0, 1) are fed exclusively to the internal PRU cores, with the + remaining 8 (2 through 9) connected to external interrupt controllers + including the MPU and/or other PRUSS instances, DSPs or devices. + + The property "ti,irqs-reserved" is used for denoting the connection + differences on the output interrupts 2 through 9. If this property is not + defined, it implies that all the PRUSS INTC output interrupts 2 through 9 + (host_intr0 through host_intr7) are connected exclusively to the Arm interrupt + controller. + + The K3 family of SoCs can handle 160 input events that can be mapped to 20 + different possible output interrupts. The additional output interrupts (10 + through 19) are connected to new sub-modules within the ICSSG instances. + + This interrupt-controller node should be defined as a child node of the + corresponding PRUSS node. The node should be named "interrupt-controller". + +properties: + compatible: + enum: + - ti,pruss-intc + - ti,icssg-intc + description: | + Use "ti,pruss-intc" for OMAP-L13x/AM18x/DA850 SoCs, + AM335x family of SoCs, + AM437x family of SoCs, + AM57xx family of SoCs + 66AK2G family of SoCs + Use "ti,icssg-intc" for K3 AM65x & J721E family of SoCs + + reg: + maxItems: 1 + + interrupts: + minItems: 1 + maxItems: 8 + description: | + All the interrupts generated towards the main host processor in the SoC. + A shared interrupt can be skipped if the desired destination and usage is + by a different processor/device. + + interrupt-names: + minItems: 1 + maxItems: 8 + items: + pattern: host_intr[0-7] + description: | + Should use one of the above names for each valid host event interrupt + connected to Arm interrupt controller, the name should match the + corresponding host event interrupt number. + + interrupt-controller: true + + "#interrupt-cells": + const: 3 + description: | + Client users shall use the PRU System event number (the interrupt source + that the client is interested in) [cell 1], PRU channel [cell 2] and PRU + host_event (target) [cell 3] as the value of the interrupts property in + their node. The system events can be mapped to some output host + interrupts through 2 levels of many-to-one mapping i.e. events to channel + mapping and channels to host interrupts so through this property entire + mapping is provided. + + ti,irqs-reserved: + $ref: /schemas/types.yaml#definitions/uint8 + description: | + Bitmask of host interrupts between 0 and 7 (corresponding to PRUSS INTC + output interrupts 2 through 9) that are not connected to the Arm interrupt + controller or are shared and used by other devices or processors in the + SoC. Define this property when any of 8 interrupts should not be handled + by Arm interrupt controller. + Eg: - AM437x and 66AK2G SoCs do not have "host_intr5" interrupt + connected to MPU + - AM65x and J721E SoCs have "host_intr5", "host_intr6" and + "host_intr7" interrupts connected to MPU, and other ICSSG + instances. + +required: + - compatible + - reg + - interrupts + - interrupt-names + - interrupt-controller + - "#interrupt-cells" + +additionalProperties: false + +examples: + - | + /* AM33xx PRU-ICSS */ + pruss: pruss@0 { + compatible = "ti,am3356-pruss"; + reg = <0x0 0x80000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + pruss_intc: interrupt-controller@20000 { + compatible = "ti,pruss-intc"; + reg = <0x20000 0x2000>; + interrupts = <20 21 22 23 24 25 26 27>; + interrupt-names = "host_intr0", "host_intr1", + "host_intr2", "host_intr3", + "host_intr4", "host_intr5", + "host_intr6", "host_intr7"; + interrupt-controller; + #interrupt-cells = <3>; + }; + }; + + - | + + /* AM4376 PRU-ICSS */ + #include + pruss@0 { + compatible = "ti,am4376-pruss"; + reg = <0x0 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + interrupt-controller@20000 { + compatible = "ti,pruss-intc"; + reg = <0x20000 0x2000>; + interrupt-controller; + #interrupt-cells = <3>; + interrupts = , + , + , + , + , + , + ; + interrupt-names = "host_intr0", "host_intr1", + "host_intr2", "host_intr3", + "host_intr4", + "host_intr6", "host_intr7"; + ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */ + }; + }; diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt index c1ccd8582eb22..ac949f7fe3d47 100644 --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.txt @@ -61,6 +61,7 @@ Required properties: "mediatek,mt6779-m4u" for mt6779 which uses generation two m4u HW. "mediatek,mt7623-m4u", "mediatek,mt2701-m4u" for mt7623 which uses generation one m4u HW. + "mediatek,mt8167-m4u" for mt8167 which uses generation two m4u HW. "mediatek,mt8173-m4u" for mt8173 which uses generation two m4u HW. "mediatek,mt8183-m4u" for mt8183 which uses generation two m4u HW. - reg : m4u register base and size. @@ -80,6 +81,7 @@ Required properties: dt-binding/memory/mt2701-larb-port.h for mt2701, mt7623 dt-binding/memory/mt2712-larb-port.h for mt2712, dt-binding/memory/mt6779-larb-port.h for mt6779, + dt-binding/memory/mt8167-larb-port.h for mt8167, dt-binding/memory/mt8173-larb-port.h for mt8173, and dt-binding/memory/mt8183-larb-port.h for mt8183. diff --git a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml index 6bfa090fd73a9..cde1afa8dfd63 100644 --- a/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml +++ b/Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml @@ -20,6 +20,7 @@ properties: - items: - enum: - renesas,ipmmu-r8a73a4 # R-Mobile APE6 + - renesas,ipmmu-r8a7742 # RZ/G1H - renesas,ipmmu-r8a7743 # RZ/G1M - renesas,ipmmu-r8a7744 # RZ/G1N - renesas,ipmmu-r8a7745 # RZ/G1E @@ -32,8 +33,8 @@ properties: - enum: - renesas,ipmmu-r8a774a1 # RZ/G2M - renesas,ipmmu-r8a774b1 # RZ/G2N - - renesas,ipmmu-r8a774e1 # RZ/G2H - renesas,ipmmu-r8a774c0 # RZ/G2E + - renesas,ipmmu-r8a774e1 # RZ/G2H - renesas,ipmmu-r8a7795 # R-Car H3 - renesas,ipmmu-r8a7796 # R-Car M3-W - renesas,ipmmu-r8a77961 # R-Car M3-W+ diff --git a/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml b/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml index 58fa76ee61766..898e3267893ac 100644 --- a/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml +++ b/Documentation/devicetree/bindings/ipmi/ipmi-smic.yaml @@ -49,6 +49,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | smic@fff3a000 { diff --git a/Documentation/devicetree/bindings/leds/backlight/common.yaml b/Documentation/devicetree/bindings/leds/backlight/common.yaml new file mode 100644 index 0000000000000..4e7e95e331a57 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/backlight/common.yaml @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/backlight/common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Common backlight properties + +maintainers: + - Lee Jones + - Daniel Thompson + - Jingoo Han + +description: + Backlight devices provide backlight for different types of graphical + displays. They are typically but not necessarily implemented using a white + LED powered by a boost converter. + +properties: + default-brightness: + description: + The default brightness that should be applied to the LED by the operating + system on start-up. The brightness should not exceed the brightness the + LED can provide. + $ref: /schemas/types.yaml#definitions/uint32 + + max-brightness: + description: + Normally the maximum brightness is determined by the hardware and this + property is not required. This property is used to put a software limit + on the brightness apart from what the driver says, as it could happen + that a LED can be made so bright that it gets damaged or causes damage + due to restrictions in a specific system, such as mounting conditions. + $ref: /schemas/types.yaml#definitions/uint32 diff --git a/Documentation/devicetree/bindings/leds/backlight/kinetic,ktd253.yaml b/Documentation/devicetree/bindings/leds/backlight/kinetic,ktd253.yaml new file mode 100644 index 0000000000000..7a6ec1f8c0f35 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/backlight/kinetic,ktd253.yaml @@ -0,0 +1,46 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/backlight/kinetic,ktd253.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Kinetic Technologies KTD253 one-wire backlight + +maintainers: + - Linus Walleij + +description: | + The Kinetic Technologies KTD253 is a white LED backlight that is + controlled by a single GPIO line. If you just turn on the backlight + it goes to maximum backlight then you can set the level of backlight + using pulses on the enable wire. This is sometimes referred to as + "expresswire". + +allOf: + - $ref: common.yaml# + +properties: + compatible: + const: kinetic,ktd253 + + enable-gpios: + description: GPIO to use to enable/disable and dim the backlight. + maxItems: 1 + + default-brightness: true + max-brightness: true + +required: + - compatible + - enable-gpios + +additionalProperties: false + +examples: + - | + #include + backlight { + compatible = "kinetic,ktd253"; + enable-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; + default-brightness = <13>; + }; diff --git a/Documentation/devicetree/bindings/leds/common.yaml b/Documentation/devicetree/bindings/leds/common.yaml index a2a541bca73c5..08b6700ca61ed 100644 --- a/Documentation/devicetree/bindings/leds/common.yaml +++ b/Documentation/devicetree/bindings/leds/common.yaml @@ -156,6 +156,8 @@ properties: Maximum timeout in microseconds after which the flash LED is turned off. Required for flash LED nodes with configurable timeout. +additionalProperties: true + examples: - | #include diff --git a/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml b/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml index b55e1f1308a45..b1a53f054b895 100644 --- a/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml +++ b/Documentation/devicetree/bindings/leds/leds-class-multicolor.yaml @@ -34,4 +34,7 @@ patternProperties: required: - color + +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt b/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt index fc2603484544d..676d43ec81692 100644 --- a/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt +++ b/Documentation/devicetree/bindings/leds/leds-is31fl319x.txt @@ -16,6 +16,7 @@ Optional properties: - audio-gain-db : audio gain selection for external analog modulation input. Valid values: 0 - 21, step by 3 (rounded down) Default: 0 +- shutdown-gpios : Specifier of the GPIO connected to SDB pin of the chip. Each led is represented as a sub-node of the issi,is31fl319x device. There can be less leds subnodes than the chip can support but not more. @@ -44,6 +45,7 @@ fancy_leds: leds@65 { #address-cells = <1>; #size-cells = <0>; reg = <0x65>; + shutdown-gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>; red_aux: led@1 { label = "red:aux"; diff --git a/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml b/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml new file mode 100644 index 0000000000000..947542a253ec6 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/leds-lp50xx.yaml @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/leds-lp50xx.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: LED driver for LP50XX RGB LED from Texas Instruments. + +maintainers: + - Dan Murphy + +description: | + The LP50XX is multi-channel, I2C RGB LED Drivers that can group RGB LEDs into + a LED group or control them individually. + + The difference in these RGB LED drivers is the number of supported RGB + modules. + + For more product information please see the link below: + https://www.ti.com/lit/ds/symlink/lp5012.pdf + https://www.ti.com/lit/ds/symlink/lp5024.pdf + https://www.ti.com/lit/ds/symlink/lp5036.pdf + +properties: + compatible: + enum: + - ti,lp5009 + - ti,lp5012 + - ti,lp5018 + - ti,lp5024 + - ti,lp5030 + - ti,lp5036 + + reg: + maxItems: 1 + description: + I2C slave address + lp5009/12 - 0x14, 0x15, 0x16, 0x17 + lp5018/24 - 0x28, 0x29, 0x2a, 0x2b + lp5030/36 - 0x30, 0x31, 0x32, 0x33 + + enable-gpios: + maxItems: 1 + description: GPIO pin to enable/disable the device. + + vled-supply: + description: LED supply. + +patternProperties: + '^multi-led@[0-9a-f]$': + type: object + allOf: + - $ref: leds-class-multicolor.yaml# + properties: + reg: + minItems: 1 + maxItems: 12 + description: + This property denotes the LED module number(s) that is used on the + for the child node. The LED modules can either be used stand alone + or grouped into a module bank. + + patternProperties: + "(^led-[0-9a-f]$|led)": + type: object + $ref: common.yaml# + +required: + - compatible + - reg + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + led-controller@14 { + compatible = "ti,lp5009"; + reg = <0x14>; + #address-cells = <1>; + #size-cells = <0>; + enable-gpios = <&gpio1 16>; + + multi-led@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0x1>; + color = ; + function = LED_FUNCTION_CHARGING; + + led-0 { + color = ; + }; + + led-1 { + color = ; + }; + + led-2 { + color = ; + }; + }; + + multi-led@2 { + #address-cells = <1>; + #size-cells = <2>; + reg = <0x2 0x3 0x5>; + color = ; + function = LED_FUNCTION_STANDBY; + + led-6 { + color = ; + }; + + led-7 { + color = ; + }; + + led-8 { + color = ; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml b/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml index b1bb3feb0f4da..58e974793a797 100644 --- a/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml +++ b/Documentation/devicetree/bindings/leds/leds-lp55xx.yaml @@ -58,6 +58,12 @@ properties: - 2 # D1~6 with VOUT, D7~9 with VDD - 3 # D1~9 are connected to VOUT + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + patternProperties: "(^led@[0-9a-f]$|led)": type: object @@ -98,6 +104,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include @@ -189,7 +197,7 @@ examples: #address-cells = <1>; #size-cells = <0>; reg = <0x2>; - color = ; + color = ; function = LED_FUNCTION_STANDBY; linux,default-trigger = "heartbeat"; diff --git a/Documentation/devicetree/bindings/leds/leds-pca955x.txt b/Documentation/devicetree/bindings/leds/leds-pca955x.txt index 7a5830f8d5aba..817f460f3a72a 100644 --- a/Documentation/devicetree/bindings/leds/leds-pca955x.txt +++ b/Documentation/devicetree/bindings/leds/leds-pca955x.txt @@ -9,6 +9,7 @@ Required properties: "nxp,pca9550" "nxp,pca9551" "nxp,pca9552" + "ibm,pca9552" "nxp,pca9553" - #address-cells: must be 1 - #size-cells: must be 0 diff --git a/Documentation/devicetree/bindings/leds/tca6507.txt b/Documentation/devicetree/bindings/leds/tca6507.txt deleted file mode 100644 index bad9102796f32..0000000000000 --- a/Documentation/devicetree/bindings/leds/tca6507.txt +++ /dev/null @@ -1,49 +0,0 @@ -LEDs connected to tca6507 - -Required properties: -- compatible : should be : "ti,tca6507". -- #address-cells: must be 1 -- #size-cells: must be 0 -- reg: typically 0x45. - -Optional properties: -- gpio-controller: allows lines to be used as output-only GPIOs. -- #gpio-cells: if present, must not be 0. - -Each led is represented as a sub-node of the ti,tca6507 device. - -LED sub-node properties: -- label : (optional) see Documentation/devicetree/bindings/leds/common.txt -- reg : number of LED line (could be from 0 to 6) -- linux,default-trigger : (optional) - see Documentation/devicetree/bindings/leds/common.txt -- compatible: either "led" (the default) or "gpio". - -Examples: - -tca6507@45 { - compatible = "ti,tca6507"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x45>; - - gpio-controller; - #gpio-cells = <2>; - - led0: red-aux@0 { - label = "red:aux"; - reg = <0x0>; - }; - - led1: green-aux@1 { - label = "green:aux"; - reg = <0x5>; - linux,default-trigger = "default-on"; - }; - - wifi-reset@6 { - reg = <0x6>; - compatible = "gpio"; - }; -}; - diff --git a/Documentation/devicetree/bindings/leds/ti,tca6507.yaml b/Documentation/devicetree/bindings/leds/ti,tca6507.yaml new file mode 100644 index 0000000000000..94c307c987621 --- /dev/null +++ b/Documentation/devicetree/bindings/leds/ti,tca6507.yaml @@ -0,0 +1,134 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/leds/ti,tca6507.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TCA6507 LED and GPIO controller + +maintainers: + - NeilBrown + +description: + The TCA6507 is a programmable LED controller connected via I2C that can drive + 7 separate lines either by holding them low, or by pulsing them with modulated + width. + +properties: + compatible: + const: ti,tca6507 + + reg: + description: I2C slave address of the controller. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + gpio-line-names: true + +patternProperties: + "^led@[0-6]$": + type: object + + $ref: common.yaml# + + properties: + reg: + minimum: 0 + maximum: 6 + + required: + - reg + + "^gpio@[0-6]$": + type: object + + properties: + compatible: + const: gpio + + reg: + minimum: 0 + maximum: 6 + + additionalProperties: false + + required: + - reg + - compatible + +if: + patternProperties: + "^gpio@[0-6]$": + properties: + compatible: + contains: + const: gpio +then: + required: + - gpio-controller + - "#gpio-cells" + +additionalProperties: false + +examples: + - | + + #include + #include + + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + led-controller@45 { + compatible = "ti,tca6507"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x45>; + + gpio-controller; + #gpio-cells = <2>; + + gpio-line-names = "wifi_reset@6"; + + led@0 { + label = "gta04:red:aux"; + reg = <0x0>; + }; + + led@1 { + label = "gta04:green:aux"; + reg = <0x1>; + }; + + led@3 { + reg = <0x3>; + color = ; + function = LED_FUNCTION_POWER; + linux,default-trigger = "default-on"; + }; + + led@4 { + color = ; + function = LED_FUNCTION_POWER; + reg = <0x4>; + }; + + gpio@6 { + compatible = "gpio"; + reg = <0x6>; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/leds/trigger-source.yaml b/Documentation/devicetree/bindings/leds/trigger-source.yaml index 0618003e40bdd..89a1cde2b8aab 100644 --- a/Documentation/devicetree/bindings/leds/trigger-source.yaml +++ b/Documentation/devicetree/bindings/leds/trigger-source.yaml @@ -21,4 +21,6 @@ properties: trigger sources (e.g. a specific USB port). enum: [ 0, 1 ] +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml new file mode 100644 index 0000000000000..d43791a2dde75 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml @@ -0,0 +1,135 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mailbox/arm,mhu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM MHU Mailbox Controller + +maintainers: + - Jassi Brar + +description: | + The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3 + independent channels/links to communicate with remote processor(s). MHU links + are hardwired on a platform. A link raises interrupt for any received data. + However, there is no specified way of knowing if the sent data has been read + by the remote. This driver assumes the sender polls STAT register and the + remote clears it after having read the data. The last channel is specified to + be a 'Secure' resource, hence can't be used by Linux running NS. + + The MHU hardware also allows operations in doorbell mode. The MHU drives the + interrupt signal using a 32-bit register, with all 32-bits logically ORed + together. It provides a set of registers to enable software to set, clear and + check the status of each of the bits of this register independently. The use + of 32 bits per interrupt line enables software to provide more information + about the source of the interrupt. For example, each bit of the register can + be associated with a type of event that can contribute to raising the + interrupt. Each of the 32-bits can be used as "doorbell" to alert the remote + processor. + +# We need a select here so we don't match all nodes with 'arm,primecell' +select: + properties: + compatible: + contains: + enum: + - arm,mhu + - arm,mhu-doorbell + required: + - compatible + +properties: + compatible: + oneOf: + - description: Data transfer mode + items: + - const: arm,mhu + - const: arm,primecell + + - description: Doorbell mode + items: + - const: arm,mhu-doorbell + - const: arm,primecell + + + reg: + maxItems: 1 + + interrupts: + items: + - description: low-priority non-secure + - description: high-priority non-secure + - description: Secure + maxItems: 3 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: apb_pclk + + '#mbox-cells': + description: | + Set to 1 in data transfer mode and represents index of the channel. + Set to 2 in doorbell mode and represents index of the channel and doorbell + number. + enum: [ 1, 2 ] + +required: + - compatible + - reg + - interrupts + - '#mbox-cells' + +additionalProperties: false + +examples: + # Data transfer mode. + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + mhuA: mailbox@2b1f0000 { + #mbox-cells = <1>; + compatible = "arm,mhu", "arm,primecell"; + reg = <0 0x2b1f0000 0 0x1000>; + interrupts = <0 36 4>, /* LP-NonSecure */ + <0 35 4>, /* HP-NonSecure */ + <0 37 4>; /* Secure */ + clocks = <&clock 0 2 1>; + clock-names = "apb_pclk"; + }; + + mhu_client_scb: scb@2e000000 { + compatible = "fujitsu,mb86s70-scb-1.0"; + reg = <0 0x2e000000 0 0x4000>; + mboxes = <&mhuA 1>; /* HP-NonSecure */ + }; + }; + + # Doorbell mode. + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + mhuB: mailbox@2b2f0000 { + #mbox-cells = <2>; + compatible = "arm,mhu-doorbell", "arm,primecell"; + reg = <0 0x2b2f0000 0 0x1000>; + interrupts = <0 36 4>, /* LP-NonSecure */ + <0 35 4>, /* HP-NonSecure */ + <0 37 4>; /* Secure */ + clocks = <&clock 0 2 1>; + clock-names = "apb_pclk"; + }; + + mhu_client_scpi: scpi@2f000000 { + compatible = "arm,scpi"; + reg = <0 0x2f000000 0 0x200>; + mboxes = <&mhuB 1 4>; /* HP-NonSecure, 5th doorbell */ + }; + }; diff --git a/Documentation/devicetree/bindings/mailbox/arm-mhu.txt b/Documentation/devicetree/bindings/mailbox/arm-mhu.txt deleted file mode 100644 index 4971f03f0b330..0000000000000 --- a/Documentation/devicetree/bindings/mailbox/arm-mhu.txt +++ /dev/null @@ -1,43 +0,0 @@ -ARM MHU Mailbox Driver -====================== - -The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has -3 independent channels/links to communicate with remote processor(s). - MHU links are hardwired on a platform. A link raises interrupt for any -received data. However, there is no specified way of knowing if the sent -data has been read by the remote. This driver assumes the sender polls -STAT register and the remote clears it after having read the data. -The last channel is specified to be a 'Secure' resource, hence can't be -used by Linux running NS. - -Mailbox Device Node: -==================== - -Required properties: --------------------- -- compatible: Shall be "arm,mhu" & "arm,primecell" -- reg: Contains the mailbox register address range (base - address and length) -- #mbox-cells Shall be 1 - the index of the channel needed. -- interrupts: Contains the interrupt information corresponding to - each of the 3 links of MHU. - -Example: --------- - - mhu: mailbox@2b1f0000 { - #mbox-cells = <1>; - compatible = "arm,mhu", "arm,primecell"; - reg = <0 0x2b1f0000 0x1000>; - interrupts = <0 36 4>, /* LP-NonSecure */ - <0 35 4>, /* HP-NonSecure */ - <0 37 4>; /* Secure */ - clocks = <&clock 0 2 1>; - clock-names = "apb_pclk"; - }; - - mhu_client: scb@2e000000 { - compatible = "fujitsu,mb86s70-scb-1.0"; - reg = <0 0x2e000000 0x4000>; - mboxes = <&mhu 1>; /* HP-NonSecure */ - }; diff --git a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml index 8a3470b64d061..15cef82cd356d 100644 --- a/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml +++ b/Documentation/devicetree/bindings/mailbox/fsl,mu.yaml @@ -38,8 +38,9 @@ properties: - const: fsl,imx6sx-mu - description: To communicate with i.MX8 SCU with fast IPC items: - - const: fsl,imx8qxp-mu - const: fsl,imx8-mu-scu + - const: fsl,imx8qxp-mu + - const: fsl,imx6sx-mu reg: maxItems: 1 @@ -71,6 +72,9 @@ properties: description: boolean, if present, means it is for side B MU. type: boolean + power-domains: + maxItems: 1 + required: - compatible - reg diff --git a/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt b/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt index 35c3f56b7f7bf..5fe80c1c19fcc 100644 --- a/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt +++ b/Documentation/devicetree/bindings/mailbox/omap-mailbox.txt @@ -69,7 +69,7 @@ The following are mandatory properties for the K3 AM65x and J721E SoCs only: the interrupt routes between the IP and the main GIC controllers. See the following binding for additional details, - Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.txt + Documentation/devicetree/bindings/interrupt-controller/ti,sci-intr.yaml Child Nodes: ============ diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index 8f810fc5c1839..ffd09b664ff50 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -16,6 +16,7 @@ maintainers: properties: compatible: enum: + - qcom,ipq6018-apcs-apps-global - qcom,ipq8074-apcs-apps-global - qcom,msm8916-apcs-kpss-global - qcom,msm8994-apcs-kpss-global diff --git a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml index 7838804700d66..5fa19d4aeaf36 100644 --- a/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml +++ b/Documentation/devicetree/bindings/media/allwinner,sun4i-a10-ir.yaml @@ -18,10 +18,13 @@ properties: oneOf: - const: allwinner,sun4i-a10-ir - const: allwinner,sun5i-a13-ir + - const: allwinner,sun6i-a31-ir - items: - const: allwinner,sun8i-a83t-ir - const: allwinner,sun6i-a31-ir - - const: allwinner,sun6i-a31-ir + - items: + - const: allwinner,sun8i-r40-ir + - const: allwinner,sun6i-a31-ir - items: - const: allwinner,sun50i-a64-ir - const: allwinner,sun6i-a31-ir diff --git a/Documentation/devicetree/bindings/media/gpio-ir-receiver.txt b/Documentation/devicetree/bindings/media/gpio-ir-receiver.txt index 58261fb7b4089..108bf435b9330 100644 --- a/Documentation/devicetree/bindings/media/gpio-ir-receiver.txt +++ b/Documentation/devicetree/bindings/media/gpio-ir-receiver.txt @@ -7,6 +7,8 @@ Required properties: Optional properties: - linux,rc-map-name: see rc.txt file in the same directory. + - linux,autosuspend-period: autosuspend delay time, + the unit is milisecond. Example node: @@ -14,4 +16,5 @@ Example node: compatible = "gpio-ir-receiver"; gpios = <&gpio0 19 1>; linux,rc-map-name = "rc-rc6-mce"; + linux,autosuspend-period = <125>; }; diff --git a/Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml b/Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml index daa2869377c55..63e5b89d2e0b9 100644 --- a/Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml +++ b/Documentation/devicetree/bindings/media/i2c/chrontel,ch7322.yaml @@ -49,6 +49,8 @@ required: - reg - interrupts +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/i2c/imi,rdacm2x-gmsl.yaml b/Documentation/devicetree/bindings/media/i2c/imi,rdacm2x-gmsl.yaml index 107c862a7fc7a..3dc06c628e644 100644 --- a/Documentation/devicetree/bindings/media/i2c/imi,rdacm2x-gmsl.yaml +++ b/Documentation/devicetree/bindings/media/i2c/imi,rdacm2x-gmsl.yaml @@ -119,6 +119,8 @@ required: - reg - port +additionalProperties: false + examples: - | i2c@e66d8000 { diff --git a/Documentation/devicetree/bindings/media/i2c/ov5647.txt b/Documentation/devicetree/bindings/media/i2c/ov5647.txt deleted file mode 100644 index 22e44945b6610..0000000000000 --- a/Documentation/devicetree/bindings/media/i2c/ov5647.txt +++ /dev/null @@ -1,35 +0,0 @@ -Omnivision OV5647 raw image sensor ---------------------------------- - -OV5647 is a raw image sensor with MIPI CSI-2 and CCP2 image data interfaces -and CCI (I2C compatible) control bus. - -Required properties: - -- compatible : "ovti,ov5647". -- reg : I2C slave address of the sensor. -- clocks : Reference to the xclk clock. - -The common video interfaces bindings (see video-interfaces.txt) should be -used to specify link to the image data receiver. The OV5647 device -node should contain one 'port' child node with an 'endpoint' subnode. - -Endpoint node mandatory properties: - -- remote-endpoint: A phandle to the bus receiver's endpoint node. - -Example: - - i2c@2000 { - ... - ov: camera@36 { - compatible = "ovti,ov5647"; - reg = <0x36>; - clocks = <&camera_clk>; - port { - camera_1: endpoint { - remote-endpoint = <&csi1_ep1>; - }; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/media/i2c/ov5647.yaml b/Documentation/devicetree/bindings/media/i2c/ov5647.yaml new file mode 100644 index 0000000000000..280c62afae139 --- /dev/null +++ b/Documentation/devicetree/bindings/media/i2c/ov5647.yaml @@ -0,0 +1,88 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/media/i2c/ov5647.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Omnivision OV5647 raw image sensor + +maintainers: + - Dave Stevenson + - Jacopo Mondi + +description: |- + The OV5647 is a raw image sensor with MIPI CSI-2 and CCP2 image data + interfaces and CCI (I2C compatible) control bus. + +properties: + compatible: + const: ovti,ov5647 + + reg: + description: I2C device address. + maxItems: 1 + + clocks: + description: Reference to the xclk clock. + maxItems: 1 + + pwdn-gpios: + description: Reference to the GPIO connected to the pwdn pin. Active high. + maxItems: 1 + + port: + type: object + description: |- + Should contain one endpoint sub-node used to model connection to the + video receiver according to the specification defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. + + properties: + endpoint: + type: object + + properties: + remote-endpoint: + description: |- + phandle to the video receiver input port. + + clock-noncontinuous: + type: boolean + description: |- + Set to true to allow MIPI CSI-2 non-continuous clock operations. + + additionalProperties: false + + additionalProperties: false + +required: + - compatible + - reg + - clocks + - port + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + ov5647: camera@36 { + compatible = "ovti,ov5647"; + reg = <0x36>; + clocks = <&camera_clk>; + pwdn-gpios = <&pioE 29 GPIO_ACTIVE_HIGH>; + + port { + camera_out: endpoint { + remote-endpoint = <&csi1_ep1>; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/media/i2c/tvp5150.txt b/Documentation/devicetree/bindings/media/i2c/tvp5150.txt index 6c88ce858d08e..719b2995dc17d 100644 --- a/Documentation/devicetree/bindings/media/i2c/tvp5150.txt +++ b/Documentation/devicetree/bindings/media/i2c/tvp5150.txt @@ -56,7 +56,7 @@ Optional Connector Properties: instead of using the autodetection mechnism. Please look at [1] for more information. -[1] Documentation/devicetree/bindings/display/connector/analog-tv-connector.txt. +[1] Documentation/devicetree/bindings/display/connector/analog-tv-connector.yaml. Example - three input sources: #include diff --git a/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt new file mode 100644 index 0000000000000..736be7cad3857 --- /dev/null +++ b/Documentation/devicetree/bindings/media/mediatek-jpeg-encoder.txt @@ -0,0 +1,35 @@ +* MediaTek JPEG Encoder + +MediaTek JPEG Encoder is the JPEG encode hardware present in MediaTek SoCs + +Required properties: +- compatible : "mediatek,mt2701-jpgenc" + followed by "mediatek,mtk-jpgenc" +- reg : physical base address of the JPEG encoder registers and length of + memory mapped region. +- interrupts : interrupt number to the interrupt controller. +- clocks: device clocks, see + Documentation/devicetree/bindings/clock/clock-bindings.txt for details. +- clock-names: must contain "jpgenc". It is the clock of JPEG encoder. +- power-domains: a phandle to the power domain, see + Documentation/devicetree/bindings/power/power_domain.txt for details. +- mediatek,larb: must contain the local arbiters in the current SoCs, see + Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt + for details. +- iommus: should point to the respective IOMMU block with master port as + argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt + for details. + +Example: + jpegenc: jpegenc@1500a000 { + compatible = "mediatek,mt2701-jpgenc", + "mediatek,mtk-jpgenc"; + reg = <0 0x1500a000 0 0x1000>; + interrupts = ; + clocks = <&imgsys CLK_IMG_VENC>; + clock-names = "jpgenc"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_ISP>; + mediatek,larb = <&larb2>; + iommus = <&iommu MT2701_M4U_PORT_JPGENC_RDMA>, + <&iommu MT2701_M4U_PORT_JPGENC_BSDMA>; + }; diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt index b6b5dde6abd8d..8217424fd4bd4 100644 --- a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt +++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt @@ -4,8 +4,9 @@ Mediatek Video Codec is the video codec hw present in Mediatek SoCs which supports high resolution encoding and decoding functionalities. Required properties: -- compatible : "mediatek,mt8173-vcodec-enc" for encoder - "mediatek,mt8173-vcodec-dec" for decoder. +- compatible : "mediatek,mt8173-vcodec-enc" for MT8173 encoder + "mediatek,mt8183-vcodec-enc" for MT8183 encoder. + "mediatek,mt8173-vcodec-dec" for MT8173 decoder. - reg : Physical base address of the video codec registers and length of memory mapped region. - interrupts : interrupt number to the cpu. @@ -19,7 +20,9 @@ Required properties: - iommus : should point to the respective IOMMU block with master port as argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt for details. -- mediatek,vpu : the node of video processor unit +One of the two following nodes: +- mediatek,vpu : the node of the video processor unit, if using VPU. +- mediatek,scp : the node of the SCP unit, if using SCP. Example: diff --git a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml index a2d1cd77c1e28..762be3f96ce9d 100644 --- a/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml +++ b/Documentation/devicetree/bindings/media/nxp,imx8mq-vpu.yaml @@ -55,6 +55,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml b/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml index f9606df02d703..59ab16ad12f1f 100644 --- a/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,msm8916-venus.yaml @@ -92,6 +92,8 @@ required: - video-decoder - video-encoder +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml b/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml index fa0dc6c47f1d6..199f45217b4a0 100644 --- a/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,msm8996-venus.yaml @@ -119,6 +119,8 @@ required: - video-decoder - video-encoder +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml index 55f2d67ae34e1..04013e5dd0449 100644 --- a/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sc7180-venus.yaml @@ -25,12 +25,16 @@ properties: maxItems: 1 power-domains: - maxItems: 2 + minItems: 2 + maxItems: 3 power-domain-names: + minItems: 2 + maxItems: 3 items: - const: venus - const: vcodec0 + - const: cx clocks: maxItems: 5 @@ -108,6 +112,8 @@ required: - video-decoder - video-encoder +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml index 157dff8057e95..04b9af4db1918 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-venus-v2.yaml @@ -25,13 +25,17 @@ properties: maxItems: 1 power-domains: - maxItems: 3 + minItems: 3 + maxItems: 4 power-domain-names: + minItems: 3 + maxItems: 4 items: - const: venus - const: vcodec0 - const: vcodec1 + - const: cx clocks: maxItems: 7 @@ -103,6 +107,8 @@ required: - video-core0 - video-core1 +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml index 084e45e2df62f..680f37726fdf9 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-venus.yaml @@ -120,6 +120,8 @@ required: - video-core0 - video-core1 +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/media/rc.yaml b/Documentation/devicetree/bindings/media/rc.yaml index ded2ac43237dd..8ad2cba5f61f9 100644 --- a/Documentation/devicetree/bindings/media/rc.yaml +++ b/Documentation/devicetree/bindings/media/rc.yaml @@ -150,3 +150,5 @@ properties: - rc-x96max - rc-xbox-dvd - rc-zx-irdec + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/media/renesas,csi2.yaml b/Documentation/devicetree/bindings/media/renesas,csi2.yaml index 6d282585d0b9a..533c2f181db7f 100644 --- a/Documentation/devicetree/bindings/media/renesas,csi2.yaml +++ b/Documentation/devicetree/bindings/media/renesas,csi2.yaml @@ -22,6 +22,7 @@ properties: - renesas,r8a774a1-csi2 # RZ/G2M - renesas,r8a774b1-csi2 # RZ/G2N - renesas,r8a774c0-csi2 # RZ/G2E + - renesas,r8a774e1-csi2 # RZ/G2H - renesas,r8a7795-csi2 # R-Car H3 - renesas,r8a7796-csi2 # R-Car M3-W - renesas,r8a77965-csi2 # R-Car M3-N diff --git a/Documentation/devicetree/bindings/media/renesas,vin.yaml b/Documentation/devicetree/bindings/media/renesas,vin.yaml index 53c0a7238bac8..ad2fe660364bd 100644 --- a/Documentation/devicetree/bindings/media/renesas,vin.yaml +++ b/Documentation/devicetree/bindings/media/renesas,vin.yaml @@ -24,6 +24,7 @@ properties: oneOf: - items: - enum: + - renesas,vin-r8a7742 # RZ/G1H - renesas,vin-r8a7743 # RZ/G1M - renesas,vin-r8a7744 # RZ/G1N - renesas,vin-r8a7745 # RZ/G1E @@ -40,6 +41,7 @@ properties: - renesas,vin-r8a774a1 # RZ/G2M - renesas,vin-r8a774b1 # RZ/G2N - renesas,vin-r8a774c0 # RZ/G2E + - renesas,vin-r8a774e1 # RZ/G2H - renesas,vin-r8a7778 # R-Car M1 - renesas,vin-r8a7779 # R-Car H1 - renesas,vin-r8a7795 # R-Car H3 diff --git a/Documentation/devicetree/bindings/media/samsung-fimc.txt b/Documentation/devicetree/bindings/media/samsung-fimc.txt index f91b9dc80eb33..20447529c985f 100644 --- a/Documentation/devicetree/bindings/media/samsung-fimc.txt +++ b/Documentation/devicetree/bindings/media/samsung-fimc.txt @@ -95,7 +95,7 @@ Optional properties: This node should contain child 'port' nodes specifying active parallel video input ports. It includes camera A and camera B inputs. 'reg' property in the -port nodes specifies data input - 0, 1 indicates input A, B respectively. +port nodes specifies data input - 1, 2 indicates input A, B respectively. Optional properties @@ -172,8 +172,8 @@ Example: /* parallel camera ports */ parallel-ports { /* camera A input */ - port@0 { - reg = <0>; + port@1 { + reg = <1>; fimc0_ep: endpoint { remote-endpoint = <&s5k6aa_ep>; bus-width = <8>; diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.yaml b/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.yaml index 68484136a5108..71547eee99199 100644 --- a/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/fsl/mmdc.yaml @@ -33,6 +33,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt index b64573680b429..dbafffe3f41ef 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-common.txt @@ -5,7 +5,7 @@ The hardware block diagram please check bindings/iommu/mediatek,iommu.txt Mediatek SMI have two generations of HW architecture, here is the list which generation the SoCs use: generation 1: mt2701 and mt7623. -generation 2: mt2712, mt6779, mt8173 and mt8183. +generation 2: mt2712, mt6779, mt8167, mt8173 and mt8183. There's slight differences between the two SMI, for generation 2, the register which control the iommu port is at each larb's register base. But @@ -20,6 +20,7 @@ Required properties: "mediatek,mt2712-smi-common" "mediatek,mt6779-smi-common" "mediatek,mt7623-smi-common", "mediatek,mt2701-smi-common" + "mediatek,mt8167-smi-common" "mediatek,mt8173-smi-common" "mediatek,mt8183-smi-common" - reg : the register and size of the SMI block. diff --git a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt index 8f19dfe7d80eb..0c5de12b54961 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt +++ b/Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt @@ -8,6 +8,7 @@ Required properties: "mediatek,mt2712-smi-larb" "mediatek,mt6779-smi-larb" "mediatek,mt7623-smi-larb", "mediatek,mt2701-smi-larb" + "mediatek,mt8167-smi-larb" "mediatek,mt8173-smi-larb" "mediatek,mt8183-smi-larb" - reg : the register and size of this local arbiter. @@ -22,7 +23,7 @@ Required properties: - "gals": the clock for GALS(Global Async Local Sync). Here is the list which has this GALS: mt8183. -Required property for mt2701, mt2712, mt6779 and mt7623: +Required property for mt2701, mt2712, mt6779, mt7623 and mt8167: - mediatek,larb-id :the hardware id of this larb. Example: diff --git a/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml b/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml index 7bfe120e14c33..6d6ba608fd221 100644 --- a/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/renesas,rpc-if.yaml @@ -61,6 +61,8 @@ patternProperties: - cfi-flash - jedec,spi-nor +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml b/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml index 70eaf739036bc..cba74205846a2 100644 --- a/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/st,stm32-fmc2-ebi.yaml @@ -194,6 +194,8 @@ required: - clocks - ranges +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mfd/ab8500.txt b/Documentation/devicetree/bindings/mfd/ab8500.txt index 5c6eabeed3413..d2a6e835c2575 100644 --- a/Documentation/devicetree/bindings/mfd/ab8500.txt +++ b/Documentation/devicetree/bindings/mfd/ab8500.txt @@ -31,8 +31,8 @@ ab8500-btemp : : vtvout : Battery Temperature : BAT_CTRL_INDB : : Battery Removal Indicator : BTEMP_LOW : : Btemp < BtempLow, if battery temperature is lower than -10°C : BTEMP_LOW_MEDIUM : : BtempLow < Btemp < BtempMedium,if battery temperature is between -10 and 0°C - : BTEMP_MEDIUM_HIGH : : BtempMedium < Btemp < BtempHigh,if battery temperature is between 0°C and“MaxTemp - : BTEMP_HIGH : : Btemp > BtempHigh, if battery temperature is higher than “MaxTemp + : BTEMP_MEDIUM_HIGH : : BtempMedium < Btemp < BtempHigh,if battery temperature is between 0°C and MaxTemp + : BTEMP_HIGH : : Btemp > BtempHigh, if battery temperature is higher than MaxTemp ab8500-charger : : vddadc : Charger interface : MAIN_CH_UNPLUG_DET : : main charger unplug detection management (not in 8505) : MAIN_CHARGE_PLUG_DET : : main charger plug detection management (not in 8505) diff --git a/Documentation/devicetree/bindings/mfd/act8945a.txt b/Documentation/devicetree/bindings/mfd/act8945a.txt index e6f168db6c723..5ca75d888b4a5 100644 --- a/Documentation/devicetree/bindings/mfd/act8945a.txt +++ b/Documentation/devicetree/bindings/mfd/act8945a.txt @@ -71,7 +71,7 @@ Example: pinctrl-names = "default"; pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>; interrupt-parent = <&pioA>; - interrupts = <45 GPIO_ACTIVE_LOW>; + interrupts = <45 IRQ_TYPE_LEVEL_LOW>; active-semi,chglev-gpios = <&pioA 12 GPIO_ACTIVE_HIGH>; active-semi,lbo-gpios = <&pioA 72 GPIO_ACTIVE_LOW>; diff --git a/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml b/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml index 7a616577ac634..c00ad3e21c21c 100644 --- a/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml +++ b/Documentation/devicetree/bindings/mfd/cirrus,lochnagar.yaml @@ -130,6 +130,14 @@ properties: type: object $ref: /schemas/pinctrl/cirrus,lochnagar.yaml# + lochnagar-hwmon: + type: object + $ref: /schemas/hwmon/cirrus,lochnagar.yaml# + + lochnagar-sc: + type: object + $ref: /schemas/sound/cirrus,lochnagar.yaml# + VDDCORE: description: Initialisation data for the VDDCORE regulator, which supplies the @@ -249,7 +257,7 @@ required: - lochnagar-clk - lochnagar-pinctrl -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml b/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml new file mode 100644 index 0000000000000..074243c408910 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ene-kb3930.yaml @@ -0,0 +1,55 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ene-kb3930.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ENE KB3930 Embedded Controller bindings + +description: | + This binding describes the ENE KB3930 Embedded Controller attached to an + I2C bus. + +maintainers: + - Lubomir Rintel + +properties: + compatible: + items: + - enum: + - dell,wyse-ariel-ec # Dell Wyse Ariel board (3020) + - const: ene,kb3930 + reg: + maxItems: 1 + + off-gpios: + description: GPIO used with the shutdown protocol on Ariel + maxItems: 2 + + system-power-controller: true + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + embedded-controller@58 { + compatible = "dell,wyse-ariel-ec", "ene,kb3930"; + reg = <0x58>; + system-power-controller; + + off-gpios = <&gpio 126 GPIO_ACTIVE_HIGH>, + <&gpio 127 GPIO_ACTIVE_HIGH>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml b/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml index 9b6eb50606e87..d08e8fe764468 100644 --- a/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml +++ b/Documentation/devicetree/bindings/mfd/gateworks-gsc.yaml @@ -144,9 +144,12 @@ required: - "#address-cells" - "#size-cells" +additionalProperties: false + examples: - | #include + #include i2c { #address-cells = <1>; #size-cells = <0>; @@ -155,7 +158,7 @@ examples: compatible = "gw,gsc"; reg = <0x20>; interrupt-parent = <&gpio1>; - interrupts = <4 GPIO_ACTIVE_LOW>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; interrupt-controller; #interrupt-cells = <1>; #address-cells = <1>; diff --git a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml index 6a7279a85ec1c..f49c0d5d31ad2 100644 --- a/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml +++ b/Documentation/devicetree/bindings/mfd/google,cros-ec.yaml @@ -30,6 +30,11 @@ properties: For implementations of the EC is connected through RPMSG. const: google,cros-ec-rpmsg + controller-data: + description: + SPI controller data, see bindings/spi/spi-samsung.txt + type: object + google,cros-ec-spi-pre-delay: description: This property specifies the delay in usecs between the @@ -63,6 +68,9 @@ properties: interrupts: maxItems: 1 + wakeup-source: + description: Button can wake-up the system. + required: - compatible diff --git a/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml new file mode 100644 index 0000000000000..eb3b43547cb6c --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/kontron,sl28cpld.yaml @@ -0,0 +1,153 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/kontron,sl28cpld.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Kontron's sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + The board management controller may contain different IP blocks like + watchdog, fan monitoring, PWM controller, interrupt controller and a + GPIO controller. + +properties: + compatible: + const: kontron,sl28cpld + + reg: + description: + I2C device address. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + + interrupt-controller: true + +patternProperties: + "^gpio(@[0-9a-f]+)?$": + $ref: ../gpio/kontron,sl28cpld-gpio.yaml + + "^hwmon(@[0-9a-f]+)?$": + $ref: ../hwmon/kontron,sl28cpld-hwmon.yaml + + "^interrupt-controller(@[0-9a-f]+)?$": + $ref: ../interrupt-controller/kontron,sl28cpld-intc.yaml + + "^pwm(@[0-9a-f]+)?$": + $ref: ../pwm/kontron,sl28cpld-pwm.yaml + + "^watchdog(@[0-9a-f]+)?$": + $ref: ../watchdog/kontron,sl28cpld-wdt.yaml + +required: + - "#address-cells" + - "#size-cells" + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + sl28cpld@4a { + compatible = "kontron,sl28cpld"; + reg = <0x4a>; + #address-cells = <1>; + #size-cells = <0>; + + watchdog@4 { + compatible = "kontron,sl28cpld-wdt"; + reg = <0x4>; + kontron,assert-wdt-timeout-pin; + }; + + hwmon@b { + compatible = "kontron,sl28cpld-fan"; + reg = <0xb>; + }; + + pwm@c { + compatible = "kontron,sl28cpld-pwm"; + reg = <0xc>; + #pwm-cells = <2>; + }; + + pwm@e { + compatible = "kontron,sl28cpld-pwm"; + reg = <0xe>; + #pwm-cells = <2>; + }; + + gpio@10 { + compatible = "kontron,sl28cpld-gpio"; + reg = <0x10>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + gpio-line-names = "a", "b", "c"; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio@15 { + compatible = "kontron,sl28cpld-gpio"; + reg = <0x15>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + gpio-controller; + #gpio-cells = <2>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + + gpio@1a { + compatible = "kontron,sl28cpld-gpo"; + reg = <0x1a>; + + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@1b { + compatible = "kontron,sl28cpld-gpi"; + reg = <0x1b>; + + gpio-controller; + #gpio-cells = <2>; + }; + + interrupt-controller@1c { + compatible = "kontron,sl28cpld-intc"; + reg = <0x1c>; + interrupts-extended = <&gpio2 6 + IRQ_TYPE_EDGE_FALLING>; + + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/mfd/lp87565.txt b/Documentation/devicetree/bindings/mfd/lp87565.txt deleted file mode 100644 index 41671e0dc26b0..0000000000000 --- a/Documentation/devicetree/bindings/mfd/lp87565.txt +++ /dev/null @@ -1,79 +0,0 @@ -TI LP87565 PMIC MFD driver - -Required properties: - - compatible: "ti,lp87565", "ti,lp87565-q1" - - reg: I2C slave address. - - gpio-controller: Marks the device node as a GPIO Controller. - - #gpio-cells: Should be two. The first cell is the pin number and - the second cell is used to specify flags. - See ../gpio/gpio.txt for more information. - - xxx-in-supply: Phandle to parent supply node of each regulator - populated under regulators node. xxx should match - the supply_name populated in driver. -Example: - -lp87565_pmic: pmic@60 { - compatible = "ti,lp87565-q1"; - reg = <0x60>; - gpio-controller; - #gpio-cells = <2>; - - buck10-in-supply = <&vsys_3v3>; - buck23-in-supply = <&vsys_3v3>; - - regulators: regulators { - buck10_reg: buck10 { - /* VDD_MPU */ - regulator-name = "buck10"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1250000>; - regulator-always-on; - regulator-boot-on; - }; - - buck23_reg: buck23 { - /* VDD_GPU */ - regulator-name = "buck23"; - regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1250000>; - regulator-boot-on; - regulator-always-on; - }; - }; -}; - -TI LP87561 PMIC: - -This is a single output 4-phase regulator configuration - -Required properties: - - compatible: "ti,lp87561-q1" - - reg: I2C slave address. - - gpio-controller: Marks the device node as a GPIO Controller. - - #gpio-cells: Should be two. The first cell is the pin number and - the second cell is used to specify flags. - See ../gpio/gpio.txt for more information. - - xxx-in-supply: Phandle to parent supply node of each regulator - populated under regulators node. xxx should match - the supply_name populated in driver. -Example: - -lp87561_pmic: pmic@62 { - compatible = "ti,lp87561-q1"; - reg = <0x62>; - gpio-controller; - #gpio-cells = <2>; - - buck3210-in-supply = <&vsys_3v3>; - - regulators: regulators { - buck3210_reg: buck3210 { - /* VDD_CORE */ - regulator-name = "buck3210"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <800000>; - regulator-always-on; - regulator-boot-on; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt index fffc8fde33028..79367a43b27d9 100644 --- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt +++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt @@ -37,7 +37,7 @@ Required properties: or generalized "qcom,spmi-pmic". - reg: Specifies the SPMI USID slave address for this device. For more information see: - Documentation/devicetree/bindings/spmi/spmi.txt + Documentation/devicetree/bindings/spmi/spmi.yaml Required properties for peripheral child nodes: - compatible: Should contain "qcom,xxx", where "xxx" is a peripheral name. diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt b/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt index c3c02ce73cdee..386eec06cf08d 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt +++ b/Documentation/devicetree/bindings/mfd/rohm,bd70528-pmic.txt @@ -39,7 +39,7 @@ pmic: pmic@4b { compatible = "rohm,bd70528"; reg = <0x4b>; interrupt-parent = <&gpio1>; - interrupts = <29 GPIO_ACTIVE_LOW>; + interrupts = <29 IRQ_TYPE_LEVEL_LOW>; clocks = <&osc 0>; #clock-cells = <0>; clock-output-names = "bd70528-32k-out"; diff --git a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml index 77bcca2d414f8..5d531051a1537 100644 --- a/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml +++ b/Documentation/devicetree/bindings/mfd/rohm,bd71847-pmic.yaml @@ -38,6 +38,9 @@ properties: "#clock-cells": const: 0 + clock-output-names: + maxItems: 1 + # The BD71847 abd BD71850 support two different HW states as reset target # states. States are called as SNVS and READY. At READY state all the PMIC # power outputs go down and OTP is reload. At the SNVS state all other logic @@ -116,12 +119,14 @@ required: - compatible - reg - interrupts - - clocks - - "#clock-cells" - regulators additionalProperties: false +dependencies: + '#clock-cells': [clocks] + clocks: ['#clock-cells'] + examples: - | #include diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml index 049ec2ffc7f97..8f4764a9ed45f 100644 --- a/Documentation/devicetree/bindings/mfd/syscon.yaml +++ b/Documentation/devicetree/bindings/mfd/syscon.yaml @@ -38,8 +38,16 @@ properties: - allwinner,sun8i-h3-system-controller - allwinner,sun8i-v3s-system-controller - allwinner,sun50i-a64-system-controller + - hisilicon,dsa-subctrl + - hisilicon,hi6220-sramctrl + - hisilicon,pcie-sas-subctrl + - hisilicon,peri-subctrl - microchip,sparx5-cpu-syscon - mstar,msc313-pmsleep + - samsung,exynos3-sysreg + - samsung,exynos4-sysreg + - samsung,exynos5-sysreg + - samsung,exynos5433-sysreg - const: syscon @@ -67,7 +75,7 @@ required: - compatible - reg -unevaluatedProperties: false +additionalProperties: true examples: - | diff --git a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml index c8fd5d3e30714..19fcf59fd2fe0 100644 --- a/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml +++ b/Documentation/devicetree/bindings/mfd/ti,j721e-system-controller.yaml @@ -30,6 +30,9 @@ properties: - const: syscon - const: simple-mfd + reg: + maxItems: 1 + "#address-cells": const: 1 @@ -38,8 +41,8 @@ properties: ranges: true -# Optional children - +patternProperties: + # Optional children "^serdes-ln-ctrl@[0-9a-f]+$": type: object description: | @@ -54,7 +57,7 @@ required: - "#size-cells" - ranges -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml new file mode 100644 index 0000000000000..c4fc5345d38d1 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,lp87524-q1.yaml @@ -0,0 +1,112 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,lp87524-q1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LP87524-Q1 four 1-phase output buck converter + +maintainers: + - Keerthy + +properties: + compatible: + const: ti,lp87524-q1 + + reg: + description: I2C slave address + const: 0x60 + + gpio-controller: true + + '#gpio-cells': + description: + The first cell is the pin number. + The second cell is is used to specify flags. + See ../gpio/gpio.txt for more information. + const: 2 + + regulators: + type: object + + patternProperties: + "^buck[0123]$": + type: object + $ref: /schemas/regulator/regulator.yaml# + + required: + - buck0 + - buck1 + - buck2 + - buck3 + + additionalProperties: false + +patternProperties: + "^buck[0123]-in-supply$": + description: Voltage regulator supply for each BUCK converter + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + - buck0-in-supply + - buck1-in-supply + - buck2-in-supply + - buck3-in-supply + - regulators + +additionalProperties: false + +examples: + - | + i2c@0 { + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + pmic@60 { + compatible = "ti,lp87524-q1"; + reg = <0x60>; + gpio-controller; + #gpio-cells = <2>; + + buck0-in-supply = <&vdd_5v0>; + buck1-in-supply = <&vdd_5v0>; + buck2-in-supply = <&vdd_5v0>; + buck3-in-supply = <&vdd_5v0>; + + regulators { + buck0_reg: buck0 { + regulator-name = "buck0"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + buck1_reg: buck1 { + regulator-name = "buck1"; + regulator-min-microvolt = <1350000>; + regulator-max-microvolt = <1350000>; + regulator-always-on; + }; + + buck2_reg: buck2 { + regulator-name = "buck2"; + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <950000>; + regulator-always-on; + }; + + buck3_reg: buck3 { + regulator-name = "buck3"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml new file mode 100644 index 0000000000000..a7e57c0913e1d --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,lp87561-q1.yaml @@ -0,0 +1,83 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,lp87561-q1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LP87561-Q1 single 4-phase output buck converter + +maintainers: + - Keerthy + +properties: + compatible: + const: ti,lp87561-q1 + + reg: + description: I2C slave address + const: 0x60 + + gpio-controller: true + + '#gpio-cells': + description: + The first cell is the pin number. + The second cell is is used to specify flags. + See ../gpio/gpio.txt for more information. + const: 2 + + buck3210-in-supply: + description: + Voltage regulator supply for all the four BUCK converters. + + regulators: + type: object + + properties: + buck3210: + type: object + $ref: /schemas/regulator/regulator.yaml# + + required: + - buck3210 + + additionalProperties: false + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + - buck3210-in-supply + +additionalProperties: false + +examples: + - | + i2c@0 { + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + pmic@60 { + compatible = "ti,lp87561-q1"; + reg = <0x60>; + gpio-controller; + #gpio-cells = <2>; + + buck3210-in-supply = <&vsys_3v3>; + + regulators { + buck3210_reg: buck3210 { + /* VDD_CORE */ + regulator-name = "buck3210"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-always-on; + regulator-boot-on; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml b/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml new file mode 100644 index 0000000000000..1da6d6a958c99 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/ti,lp87565-q1.yaml @@ -0,0 +1,101 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/ti,lp87565-q1.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI LP87565-Q1 / LP87565 dual 2-phase output buck converter + +maintainers: + - Keerthy + +properties: + compatible: + oneOf: + - const: ti,lp87565 + - const: ti,lp87565-q1 + + reg: + description: I2C slave address + const: 0x60 + + gpio-controller: true + + '#gpio-cells': + description: + The first cell is the pin number. + The second cell is is used to specify flags. + See ../gpio/gpio.txt for more information. + const: 2 + + buck10-in-supply: + description: + Voltage regulator supply for BUCK0 and BUCK1 converters. + + buck23-in-supply: + description: + Voltage regulator supply for BUCK2 and BUCK3 converters. + + regulators: + type: object + + patternProperties: + "^buck(10|23)$": + type: object + $ref: /schemas/regulator/regulator.yaml# + + required: + - buck10 + - buck23 + + additionalProperties: false + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + - buck10-in-supply + - buck23-in-supply + +additionalProperties: false + +examples: + - | + i2c@0 { + reg = <0x0 0x100>; + #address-cells = <1>; + #size-cells = <0>; + + pmic@60 { + compatible = "ti,lp87565-q1"; + reg = <0x60>; + gpio-controller; + #gpio-cells = <2>; + + buck10-in-supply = <&vsys_3v3>; + buck23-in-supply = <&vsys_3v3>; + + regulators { + buck10_reg: buck10 { + /* VDD_MPU */ + regulator-name = "buck10"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-always-on; + regulator-boot-on; + }; + + buck23_reg: buck23 { + /* VDD_GPU */ + regulator-name = "buck23"; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <1250000>; + regulator-boot-on; + regulator-always-on; + }; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml b/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml index abc9937506e0b..8a1a6625c7825 100644 --- a/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml +++ b/Documentation/devicetree/bindings/mfd/xylon,logicvc.yaml @@ -26,6 +26,12 @@ properties: reg: maxItems: 1 + '#address-cells': + const: 1 + + '#size-cells': + const: 1 + select: properties: compatible: @@ -36,15 +42,19 @@ select: required: - compatible +patternProperties: + "^gpio@[0-9a-f]+$": + $ref: /schemas/gpio/xylon,logicvc-gpio.yaml# + required: - compatible - reg +additionalProperties: false + examples: - | logicvc: logicvc@43c00000 { compatible = "xylon,logicvc-3.02.a", "syscon", "simple-mfd"; reg = <0x43c00000 0x6000>; - #address-cells = <1>; - #size-cells = <1>; }; diff --git a/Documentation/devicetree/bindings/mips/ingenic/devices.yaml b/Documentation/devicetree/bindings/mips/ingenic/devices.yaml index 83c86cbe4716f..dc21b4630c25c 100644 --- a/Documentation/devicetree/bindings/mips/ingenic/devices.yaml +++ b/Documentation/devicetree/bindings/mips/ingenic/devices.yaml @@ -47,4 +47,9 @@ properties: items: - const: yna,cu1830-neo - const: ingenic,x1830 + + - description: YSH & ATIL General Board, CU2000 Module with Neo Backplane + items: + - const: yna,cu2000-neo + - const: ingenic,x2000e ... diff --git a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml index 16fa03d65ad5d..6df1a9470d8fc 100644 --- a/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml +++ b/Documentation/devicetree/bindings/mips/ingenic/ingenic,cpu.yaml @@ -32,12 +32,16 @@ properties: clocks: maxItems: 1 + device_type: true + required: - device_type - compatible - reg - clocks +additionalProperties: false + examples: - | #include @@ -52,7 +56,6 @@ examples: reg = <0>; clocks = <&cgu JZ4780_CLK_CPU>; - clock-names = "cpu"; }; cpu1: cpu@1 { @@ -61,7 +64,6 @@ examples: reg = <1>; clocks = <&cgu JZ4780_CLK_CORE1>; - clock-names = "cpu"; }; }; ... diff --git a/Documentation/devicetree/bindings/mips/loongson/rs780e-acpi.yaml b/Documentation/devicetree/bindings/mips/loongson/rs780e-acpi.yaml index d317897e11154..7c0f9022202ca 100644 --- a/Documentation/devicetree/bindings/mips/loongson/rs780e-acpi.yaml +++ b/Documentation/devicetree/bindings/mips/loongson/rs780e-acpi.yaml @@ -23,6 +23,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | isa@0 { diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt index 892ba4384abc7..43d777ed83160 100644 --- a/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt +++ b/Documentation/devicetree/bindings/misc/nvidia,tegra186-misc.txt @@ -1,11 +1,13 @@ -NVIDIA Tegra186 MISC register block +NVIDIA Tegra186 (and later) MISC register block -The MISC register block found on Tegra186 SoCs contains registers that can be -used to identify a given chip and various strapping options. +The MISC register block found on Tegra186 and later SoCs contains registers +that can be used to identify a given chip and various strapping options. Required properties: - compatible: Must be: - Tegra186: "nvidia,tegra186-misc" + - Tegra194: "nvidia,tegra194-misc" + - Tegra234: "nvidia,tegra234-misc" - reg: Should contain 2 entries: The first entry gives the physical address and length of the register region which contains revision and debug features. The second entry specifies the physical address and length diff --git a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt index 4556359c58763..83f6a251ba3eb 100644 --- a/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt +++ b/Documentation/devicetree/bindings/misc/nvidia,tegra20-apbmisc.txt @@ -1,10 +1,13 @@ -NVIDIA Tegra20/Tegra30/Tegr114/Tegra124 apbmisc block +NVIDIA Tegra APBMISC block Required properties: -- compatible : For Tegra20, must be "nvidia,tegra20-apbmisc". For Tegra30, - must be "nvidia,tegra30-apbmisc". Otherwise, must contain - "nvidia,-apbmisc", plus one of the above, where is tegra114, - tegra124, tegra132. +- compatible: Must be: + - Tegra20: "nvidia,tegra20-apbmisc" + - Tegra30: "nvidia,tegra30-apbmisc", "nvidia,tegra20-apbmisc" + - Tegra114: "nvidia,tegra114-apbmisc", "nvidia,tegra20-apbmisc" + - Tegra124: "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc" + - Tegra132: "nvidia,tegra124-apbmisc", "nvidia,tegra20-apbmisc" + - Tegra210: "nvidia,tegra210-apbmisc", "nvidia,tegra20-apbmisc" - reg: Should contain 2 entries: the first entry gives the physical address and length of the registers which contain revision and debug features. The second entry gives the physical address and length of the diff --git a/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml b/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml index e75d77beec6a3..b3c45c046ba5e 100644 --- a/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml +++ b/Documentation/devicetree/bindings/misc/olpc,xo1.75-ec.yaml @@ -28,11 +28,13 @@ properties: description: GPIO uspecifier of the CMD pin maxItems: 1 + spi-cpha: true + required: - compatible - cmd-gpios -unevaluatedProperties: false +additionalProperties: false examples: - | @@ -40,6 +42,8 @@ examples: spi { spi-slave; + #address-cells = <0>; + #size-cells = <0>; ready-gpios = <&gpio 125 GPIO_ACTIVE_HIGH>; slave { diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml b/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml index 0cd74c3116f81..60955acb8e578 100644 --- a/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml +++ b/Documentation/devicetree/bindings/mmc/amlogic,meson-mx-sdhc.yaml @@ -50,6 +50,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml index d93f7794a85f2..af7442f73881c 100644 --- a/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/cdns,sdhci.yaml @@ -117,6 +117,8 @@ required: - interrupts - clocks +unevaluatedProperties: false + examples: - | emmc: mmc@5a000000 { diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml index 10b45966f1b87..e71d13c2d109e 100644 --- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml +++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml @@ -21,23 +21,26 @@ description: | properties: compatible: - enum: - - fsl,imx25-esdhc - - fsl,imx35-esdhc - - fsl,imx51-esdhc - - fsl,imx53-esdhc - - fsl,imx6q-usdhc - - fsl,imx6sl-usdhc - - fsl,imx6sx-usdhc - - fsl,imx6ull-usdhc - - fsl,imx7d-usdhc - - fsl,imx7ulp-usdhc - - fsl,imx8mq-usdhc - - fsl,imx8mm-usdhc - - fsl,imx8mn-usdhc - - fsl,imx8mp-usdhc - - fsl,imx8qm-usdhc - - fsl,imx8qxp-usdhc + oneOf: + - enum: + - fsl,imx25-esdhc + - fsl,imx35-esdhc + - fsl,imx51-esdhc + - fsl,imx53-esdhc + - fsl,imx6q-usdhc + - fsl,imx6sl-usdhc + - fsl,imx6sx-usdhc + - fsl,imx6ull-usdhc + - fsl,imx7d-usdhc + - fsl,imx7ulp-usdhc + - items: + - enum: + - fsl,imx8mm-usdhc + - fsl,imx8mn-usdhc + - fsl,imx8mp-usdhc + - fsl,imx8mq-usdhc + - fsl,imx8qxp-usdhc + - const: fsl,imx7d-usdhc reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml b/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml index 9b63df1c22fb0..04ba8b7fc054a 100644 --- a/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml +++ b/Documentation/devicetree/bindings/mmc/ingenic,mmc.yaml @@ -56,6 +56,8 @@ required: - dmas - dma-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml b/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml new file mode 100644 index 0000000000000..55883290543b9 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/microchip,dw-sparx5-sdhci.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mmc/microchip,dw-sparx5-sdhci.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Microchip Sparx5 Mobile Storage Host Controller Binding + +allOf: + - $ref: "mmc-controller.yaml" + +maintainers: + - Lars Povlsen + +# Everything else is described in the common file +properties: + compatible: + const: microchip,dw-sparx5-sdhci + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + description: + Handle to "core" clock for the sdhci controller. + + clock-names: + items: + - const: core + + microchip,clock-delay: + description: Delay clock to card to meet setup time requirements. + Each step increase by 1.25ns. + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 1 + maximum: 15 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +examples: + - | + #include + #include + sdhci0: mmc@600800000 { + compatible = "microchip,dw-sparx5-sdhci"; + reg = <0x00800000 0x1000>; + pinctrl-0 = <&emmc_pins>; + pinctrl-names = "default"; + clocks = <&clks CLK_ID_AUX1>; + clock-names = "core"; + assigned-clocks = <&clks CLK_ID_AUX1>; + assigned-clock-rates = <800000000>; + interrupts = ; + bus-width = <8>; + microchip,clock-delay = <10>; + }; diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml index b96da0c7f819d..186f04ba93579 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml @@ -14,6 +14,10 @@ description: | that requires the respective functionality should implement them using these definitions. + It is possible to assign a fixed index mmcN to an MMC host controller + (and the corresponding mmcblkN devices) by defining an alias in the + /aliases device tree node. + properties: $nodename: pattern: "^mmc(@.*)?$" @@ -349,6 +353,8 @@ dependencies: cd-debounce-delay-ms: [ cd-gpios ] fixed-emmc-driver-type: [ non-removable ] +additionalProperties: true + examples: - | mmc@ab000000 { diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml index 77f746f57284f..1fc7e620f3280 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-emmc.yaml @@ -36,6 +36,8 @@ required: - compatible - reset-gpios +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml index a68820d31d50d..e0169a285aa26 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-sd8787.yaml @@ -28,6 +28,8 @@ required: - powerdown-gpios - reset-gpios +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml index 4492154447231..6cd57863c1dbd 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-pwrseq-simple.yaml @@ -20,6 +20,8 @@ properties: reset-gpios: minItems: 1 + # Put some limit to avoid false warnings + maxItems: 32 description: contains a list of GPIO specifiers. The reset GPIOs are asserted at initialization and prior we start the power up procedure of the card. @@ -50,6 +52,8 @@ properties: required: - compatible +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/owl-mmc.yaml b/Documentation/devicetree/bindings/mmc/owl-mmc.yaml index 1380501fb8f03..b6ab527087d5e 100644 --- a/Documentation/devicetree/bindings/mmc/owl-mmc.yaml +++ b/Documentation/devicetree/bindings/mmc/owl-mmc.yaml @@ -14,7 +14,11 @@ maintainers: properties: compatible: - const: actions,owl-mmc + oneOf: + - const: actions,owl-mmc + - items: + - const: actions,s700-mmc + - const: actions,owl-mmc reg: maxItems: 1 @@ -43,6 +47,8 @@ required: - dmas - dma-names +unevaluatedProperties: false + examples: - | mmc0: mmc@e0330000 { diff --git a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml index b4c3fd40caeb6..6bbf29b5c2392 100644 --- a/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml +++ b/Documentation/devicetree/bindings/mmc/renesas,sdhi.yaml @@ -50,6 +50,7 @@ properties: - renesas,sdhi-r8a774a1 # RZ/G2M - renesas,sdhi-r8a774b1 # RZ/G2N - renesas,sdhi-r8a774c0 # RZ/G2E + - renesas,sdhi-r8a774e1 # RZ/G2H - renesas,sdhi-r8a7795 # R-Car H3 - renesas,sdhi-r8a7796 # R-Car M3-W - renesas,sdhi-r8a77961 # R-Car M3-W+ diff --git a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml index 01316185e7714..3762f1c8de96f 100644 --- a/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml @@ -102,6 +102,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/sdhci-am654.txt b/Documentation/devicetree/bindings/mmc/sdhci-am654.txt deleted file mode 100644 index 6d202f4d92494..0000000000000 --- a/Documentation/devicetree/bindings/mmc/sdhci-am654.txt +++ /dev/null @@ -1,61 +0,0 @@ -Device Tree Bindings for the SDHCI Controllers present on TI's AM654 SOCs - -The bindings follow the mmc[1], clock[2] and interrupt[3] bindings. -Only deviations are documented here. - - [1] Documentation/devicetree/bindings/mmc/mmc.txt - [2] Documentation/devicetree/bindings/clock/clock-bindings.txt - [3] Documentation/devicetree/bindings/interrupt-controller/interrupts.txt - -Required Properties: - - compatible: should be one of: - "ti,am654-sdhci-5.1": SDHCI on AM654 device. - "ti,j721e-sdhci-8bit": 8 bit SDHCI on J721E device. - "ti,j721e-sdhci-4bit": 4 bit SDHCI on J721E device. - - reg: Must be two entries. - - The first should be the sdhci register space - - The second should the subsystem/phy register space - - clocks: Handles to the clock inputs. - - clock-names: Tuple including "clk_xin" and "clk_ahb" - - interrupts: Interrupt specifiers - Output tap delay for each speed mode: - - ti,otap-del-sel-legacy - - ti,otap-del-sel-mmc-hs - - ti,otap-del-sel-sd-hs - - ti,otap-del-sel-sdr12 - - ti,otap-del-sel-sdr25 - - ti,otap-del-sel-sdr50 - - ti,otap-del-sel-sdr104 - - ti,otap-del-sel-ddr50 - - ti,otap-del-sel-ddr52 - - ti,otap-del-sel-hs200 - - ti,otap-del-sel-hs400 - These bindings must be provided otherwise the driver will disable the - corresponding speed mode (i.e. all nodes must provide at least -legacy) - -Optional Properties (Required for ti,am654-sdhci-5.1 and ti,j721e-sdhci-8bit): - - ti,trm-icp: DLL trim select - - ti,driver-strength-ohm: driver strength in ohms. - Valid values are 33, 40, 50, 66 and 100 ohms. -Optional Properties: - - ti,strobe-sel: strobe select delay for HS400 speed mode. Default value: 0x0. - - ti,clkbuf-sel: Clock Delay Buffer Select - -Example: - - sdhci0: sdhci@4f80000 { - compatible = "ti,am654-sdhci-5.1"; - reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>; - power-domains = <&k3_pds 47>; - clocks = <&k3_clks 47 0>, <&k3_clks 47 1>; - clock-names = "clk_ahb", "clk_xin"; - interrupts = ; - sdhci-caps-mask = <0x80000007 0x0>; - mmc-ddr-1_8v; - ti,otap-del-sel-legacy = <0x0>; - ti,otap-del-sel-mmc-hs = <0x0>; - ti,otap-del-sel-ddr52 = <0x5>; - ti,otap-del-sel-hs200 = <0x5>; - ti,otap-del-sel-hs400 = <0x0>; - ti,trm-icp = <0x8>; - }; diff --git a/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml new file mode 100644 index 0000000000000..ac79f3adf20b0 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/sdhci-am654.yaml @@ -0,0 +1,218 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2020 Texas Instruments Incorporated - http://www.ti.com/ +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/mmc/sdhci-am654.yaml#" +$schema : "http://devicetree.org/meta-schemas/core.yaml#" + +title: TI AM654 MMC Controller + +maintainers: + - Ulf Hansson + +allOf: + - $ref: mmc-controller.yaml# + +properties: + compatible: + enum: + - ti,am654-sdhci-5.1 + - ti,j721e-sdhci-8bit + - ti,j721e-sdhci-4bit + - ti,j7200-sdhci-8bit + - ti,j721e-sdhci-4bit + + reg: + maxItems: 2 + + interrupts: + maxItems: 1 + + power-domains: + maxItems: 1 + + clocks: + minItems: 1 + maxItems: 2 + description: Handles to input clocks + + clock-names: + minItems: 1 + maxItems: 2 + items: + - const: clk_ahb + - const: clk_xin + + # PHY output tap delays: + # Used to delay the data valid window and align it to the sampling clock. + # Binding needs to be provided for each supported speed mode otherwise the + # corresponding mode will be disabled. + + ti,otap-del-sel-legacy: + description: Output tap delay for SD/MMC legacy timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0xf + + ti,otap-del-sel-mmc-hs: + description: Output tap delay for MMC high speed timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0xf + + ti,otap-del-sel-sd-hs: + description: Output tap delay for SD high speed timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0xf + + ti,otap-del-sel-sdr12: + description: Output tap delay for SD UHS SDR12 timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0xf + + ti,otap-del-sel-sdr25: + description: Output tap delay for SD UHS SDR25 timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0xf + + ti,otap-del-sel-sdr50: + description: Output tap delay for SD UHS SDR50 timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0xf + + ti,otap-del-sel-sdr104: + description: Output tap delay for SD UHS SDR104 timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0xf + + ti,otap-del-sel-ddr50: + description: Output tap delay for SD UHS DDR50 timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0xf + + ti,otap-del-sel-ddr52: + description: Output tap delay for eMMC DDR52 timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0xf + + ti,otap-del-sel-hs200: + description: Output tap delay for eMMC HS200 timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0xf + + ti,otap-del-sel-hs400: + description: Output tap delay for eMMC HS400 timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0xf + + # PHY input tap delays: + # Used to delay the data valid window and align it to the sampling clock for + # modes that don't support tuning + + ti,itap-del-sel-legacy: + description: Input tap delay for SD/MMC legacy timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0x1f + + ti,itap-del-sel-mmc-hs: + description: Input tap delay for MMC high speed timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0x1f + + ti,itap-del-sel-sd-hs: + description: Input tap delay for SD high speed timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0x1f + + ti,itap-del-sel-sdr12: + description: Input tap delay for SD UHS SDR12 timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0x1f + + ti,itap-del-sel-sdr25: + description: Input tap delay for SD UHS SDR25 timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0x1f + + ti,itap-del-sel-ddr52: + description: Input tap delay for MMC DDR52 timing + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0x1f + + ti,trm-icp: + description: DLL trim select + $ref: "/schemas/types.yaml#/definitions/uint32" + minimum: 0 + maximum: 0xf + + ti,driver-strength-ohm: + description: DLL drive strength in ohms + $ref: "/schemas/types.yaml#/definitions/uint32" + oneOf: + - enum: + - 33 + - 40 + - 50 + - 66 + - 100 + + ti,strobe-sel: + description: strobe select delay for HS400 speed mode. + $ref: "/schemas/types.yaml#/definitions/uint32" + + ti,clkbuf-sel: + description: Clock Delay Buffer Select + $ref: "/schemas/types.yaml#/definitions/uint32" + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - ti,otap-del-sel-legacy + +examples: + - | + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + + mmc0: mmc@4f80000 { + compatible = "ti,am654-sdhci-5.1"; + reg = <0x0 0x4f80000 0x0 0x260>, <0x0 0x4f90000 0x0 0x134>; + power-domains = <&k3_pds 47>; + clocks = <&k3_clks 47 0>, <&k3_clks 47 1>; + clock-names = "clk_ahb", "clk_xin"; + interrupts = ; + sdhci-caps-mask = <0x80000007 0x0>; + mmc-ddr-1_8v; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-mmc-hs = <0x0>; + ti,otap-del-sel-ddr52 = <0x5>; + ti,otap-del-sel-hs200 = <0x5>; + ti,otap-del-sel-hs400 = <0x0>; + ti,itap-del-sel-legacy = <0x10>; + ti,itap-del-sel-mmc-hs = <0xa>; + ti,itap-del-sel-ddr52 = <0x3>; + ti,trm-icp = <0x8>; + }; + }; diff --git a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml index a58715c860b71..aa12480648a55 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml +++ b/Documentation/devicetree/bindings/mmc/sdhci-pxa.yaml @@ -73,6 +73,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml b/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml index 8d6413f48823f..56f9ff12742da 100644 --- a/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml +++ b/Documentation/devicetree/bindings/mmc/socionext,uniphier-sd.yaml @@ -77,6 +77,8 @@ required: - reset-names - resets +unevaluatedProperties: false + examples: - | sd: mmc@5a400000 { diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml index 85bd528e9a144..8dfad89c78a78 100644 --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc-common.yaml @@ -62,3 +62,5 @@ properties: dma-names: const: rx-tx + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml index dd2c1b147142b..240abb6f102c9 100644 --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml @@ -42,6 +42,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | mmc@12200000 { diff --git a/Documentation/devicetree/bindings/mtd/denali,nand.yaml b/Documentation/devicetree/bindings/mtd/denali,nand.yaml index c07b91592cbd7..1307ed7e7fc69 100644 --- a/Documentation/devicetree/bindings/mtd/denali,nand.yaml +++ b/Documentation/devicetree/bindings/mtd/denali,nand.yaml @@ -128,6 +128,8 @@ required: - clock-names - clocks +unevaluatedProperties: false + examples: - | nand-controller@ff900000 { diff --git a/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml b/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml index 3201372b7f85c..28ff8c581837a 100644 --- a/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/gpmi-nand.yaml @@ -20,12 +20,18 @@ description: | properties: compatible: - enum: - - fsl,imx23-gpmi-nand - - fsl,imx28-gpmi-nand - - fsl,imx6q-gpmi-nand - - fsl,imx6sx-gpmi-nand - - fsl,imx7d-gpmi-nand + oneOf: + - enum: + - fsl,imx23-gpmi-nand + - fsl,imx28-gpmi-nand + - fsl,imx6q-gpmi-nand + - fsl,imx6sx-gpmi-nand + - fsl,imx7d-gpmi-nand + - items: + - enum: + - fsl,imx8mm-gpmi-nand + - fsl,imx8mn-gpmi-nand + - const: fsl,imx7d-gpmi-nand reg: items: diff --git a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml index 8abb6d463cb6c..89aa3ceda5929 100644 --- a/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml +++ b/Documentation/devicetree/bindings/mtd/ingenic,nand.yaml @@ -51,6 +51,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml index 40fc5b0b2b8cf..b29050fd7470a 100644 --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml @@ -55,6 +55,37 @@ patternProperties: $ref: /schemas/types.yaml#/definitions/string enum: [none, soft, hw, hw_syndrome, hw_oob_first, on-die] + nand-ecc-engine: + allOf: + - $ref: /schemas/types.yaml#/definitions/phandle + description: | + A phandle on the hardware ECC engine if any. There are + basically three possibilities: + 1/ The ECC engine is part of the NAND controller, in this + case the phandle should reference the parent node. + 2/ The ECC engine is part of the NAND part (on-die), in this + case the phandle should reference the node itself. + 3/ The ECC engine is external, in this case the phandle should + reference the specific ECC engine node. + + nand-use-soft-ecc-engine: + type: boolean + description: Use a software ECC engine. + + nand-no-ecc-engine: + type: boolean + description: Do not use any ECC correction. + + nand-ecc-placement: + allOf: + - $ref: /schemas/types.yaml#/definitions/string + - enum: [ oob, interleaved ] + description: + Location of the ECC bytes. This location is unknown by default + but can be explicitly set to "oob", if all ECC bytes are + known to be stored in the OOB area, or "interleaved" if ECC + bytes will be interleaved with regular data in the main area. + nand-ecc-algo: description: Desired ECC algorithm. @@ -128,6 +159,8 @@ required: - "#address-cells" - "#size-cells" +additionalProperties: true + examples: - | nand-controller { diff --git a/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml b/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml index 28a08ff407dbc..29c5ef24ac6a2 100644 --- a/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml +++ b/Documentation/devicetree/bindings/mtd/st,stm32-fmc2-nand.yaml @@ -94,6 +94,8 @@ required: - reg - interrupts +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml index d95cc691a65f9..1129f2b58e98d 100644 --- a/Documentation/devicetree/bindings/net/adi,adin.yaml +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml @@ -36,6 +36,8 @@ properties: enum: [ 4, 8, 12, 16, 20, 24 ] default: 8 +unevaluatedProperties: false + examples: - | ethernet { diff --git a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml index 85fefe3a04444..6b057b117aa03 100644 --- a/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/amlogic,meson-dwmac.yaml @@ -120,6 +120,8 @@ required: - clock-names - phy-mode +unevaluatedProperties: false + examples: - | ethmac: ethernet@c9410000 { diff --git a/Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml b/Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml index 71808e78a495e..1c88820cbcdf2 100644 --- a/Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml +++ b/Documentation/devicetree/bindings/net/aspeed,ast2600-mdio.yaml @@ -30,6 +30,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | mdio0: mdio@1e650000 { diff --git a/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt b/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt index 88b57b0ca1f49..97ca62b0e14d8 100644 --- a/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt +++ b/Documentation/devicetree/bindings/net/brcm,bcm7445-switch-v4.0.txt @@ -50,6 +50,13 @@ Optional properties: - reset-names: If the "reset" property is specified, this property should have the value "switch" to denote the switch reset line. +- clocks: when provided, the first phandle is to the switch's main clock and + is valid for both BCM7445 and BCM7278. The second phandle is only applicable + to BCM7445 and is to support dividing the switch core clock. + +- clock-names: when provided, the first phandle must be "sw_switch", and the + second must be named "sw_switch_mdiv". + Port subnodes: Optional properties: diff --git a/Documentation/devicetree/bindings/net/brcm,systemport.txt b/Documentation/devicetree/bindings/net/brcm,systemport.txt index 83f29e0e11bac..75736739bfdd0 100644 --- a/Documentation/devicetree/bindings/net/brcm,systemport.txt +++ b/Documentation/devicetree/bindings/net/brcm,systemport.txt @@ -20,6 +20,11 @@ Optional properties: - systemport,num-tier1-arb: number of tier 1 arbiters, an integer - systemport,num-txq: number of HW transmit queues, an integer - systemport,num-rxq: number of HW receive queues, an integer +- clocks: When provided, must be two phandles to the functional clocks nodes of + the SYSTEMPORT block. The first phandle is the main SYSTEMPORT clock used + during normal operation, while the second phandle is the Wake-on-LAN clock. +- clock-names: When provided, names of the functional clock phandles, first + name should be "sw_sysport" and second should be "sw_sysportwol". Example: ethernet@f04a0000 { diff --git a/Documentation/devicetree/bindings/net/can/can-transceiver.yaml b/Documentation/devicetree/bindings/net/can/can-transceiver.yaml index 6396977d29e5d..d1ef1fe6ab290 100644 --- a/Documentation/devicetree/bindings/net/can/can-transceiver.yaml +++ b/Documentation/devicetree/bindings/net/can/can-transceiver.yaml @@ -16,3 +16,5 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 description: a positive non 0 value that determines the max speed that CAN/CAN-FD can run. minimum: 1 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt index 94c0f8bf4deb3..e10b6eb955e18 100644 --- a/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt +++ b/Documentation/devicetree/bindings/net/can/fsl-flexcan.txt @@ -4,6 +4,12 @@ Required properties: - compatible : Should be "fsl,-flexcan" + where is imx8qm, imx6q, imx28, imx53, imx35, imx25, p1010, + vf610, ls1021ar2, lx2160ar1, ls1028ar1. + + The ls1028ar1 must be followed by lx2160ar1, e.g. + - "fsl,ls1028ar1-flexcan", "fsl,lx2160ar1-flexcan" + An implementation should also claim any of the following compatibles that it is fully backwards compatible with: @@ -25,12 +31,10 @@ Optional properties: endian. - fsl,stop-mode: register bits of stop mode control, the format is - <&gpr req_gpr req_bit ack_gpr ack_bit>. + <&gpr req_gpr req_bit>. gpr is the phandle to general purpose register node. req_gpr is the gpr register offset of CAN stop request. req_bit is the bit offset of CAN stop request. - ack_gpr is the gpr register offset of CAN stop acknowledge. - ack_bit is the bit offset of CAN stop acknowledge. - fsl,clk-source: Select the clock source to the CAN Protocol Engine (PE). It's SoC Implementation dependent. Refer to RM for detailed diff --git a/Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt b/Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt index 5a0111d4de58c..381f8fb3e865a 100644 --- a/Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt +++ b/Documentation/devicetree/bindings/net/can/microchip,mcp251x.txt @@ -12,6 +12,9 @@ Required properties: Optional properties: - vdd-supply: Regulator that powers the CAN controller. - xceiver-supply: Regulator that powers the CAN transceiver. + - gpio-controller: Indicates this device is a GPIO controller. + - #gpio-cells: Should be two. The first cell is the pin number and + the second cell is used to specify the gpio polarity. Example: can0: can@1 { @@ -19,7 +22,9 @@ Example: reg = <1>; clocks = <&clk24m>; interrupt-parent = <&gpio4>; - interrupts = <13 0x2>; + interrupts = <13 IRQ_TYPE_LEVEL_LOW>; vdd-supply = <®5v0>; xceiver-supply = <®5v0>; + gpio-controller; + #gpio-cells = <2>; }; diff --git a/Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml b/Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml new file mode 100644 index 0000000000000..2a884c1fe0e01 --- /dev/null +++ b/Documentation/devicetree/bindings/net/can/microchip,mcp251xfd.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/can/microchip,mcp251xfd.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: + Microchip MCP2517FD and MCP2518FD stand-alone CAN controller device tree + bindings + +maintainers: + - Marc Kleine-Budde + +properties: + compatible: + oneOf: + - const: microchip,mcp2517fd + description: for MCP2517FD + - const: microchip,mcp2518fd + description: for MCP2518FD + - const: microchip,mcp251xfd + description: to autodetect chip variant + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + vdd-supply: + description: Regulator that powers the CAN controller. + + xceiver-supply: + description: Regulator that powers the CAN transceiver. + + microchip,rx-int-gpios: + description: + GPIO phandle of GPIO connected to to INT1 pin of the MCP251XFD, which + signals a pending RX interrupt. + maxItems: 1 + + spi-max-frequency: + description: + Must be half or less of "clocks" frequency. + maximum: 20000000 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + #include + #include + + spi0 { + #address-cells = <1>; + #size-cells = <0>; + + can@0 { + compatible = "microchip,mcp251xfd"; + reg = <0>; + clocks = <&can0_osc>; + pinctrl-names = "default"; + pinctrl-0 = <&can0_pins>; + spi-max-frequency = <20000000>; + interrupts-extended = <&gpio 13 IRQ_TYPE_LEVEL_LOW>; + microchip,rx-int-gpios = <&gpio 27 GPIO_ACTIVE_LOW>; + vdd-supply = <®5v0>; + xceiver-supply = <®5v0>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt index 85c6551b602a6..6a59563478163 100644 --- a/Documentation/devicetree/bindings/net/can/rcar_can.txt +++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt @@ -2,13 +2,15 @@ Renesas R-Car CAN controller Device Tree Bindings ------------------------------------------------- Required properties: -- compatible: "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC. +- compatible: "renesas,can-r8a7742" if CAN controller is a part of R8A7742 SoC. + "renesas,can-r8a7743" if CAN controller is a part of R8A7743 SoC. "renesas,can-r8a7744" if CAN controller is a part of R8A7744 SoC. "renesas,can-r8a7745" if CAN controller is a part of R8A7745 SoC. "renesas,can-r8a77470" if CAN controller is a part of R8A77470 SoC. "renesas,can-r8a774a1" if CAN controller is a part of R8A774A1 SoC. "renesas,can-r8a774b1" if CAN controller is a part of R8A774B1 SoC. "renesas,can-r8a774c0" if CAN controller is a part of R8A774C0 SoC. + "renesas,can-r8a774e1" if CAN controller is a part of R8A774E1 SoC. "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC. "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC. "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC. @@ -37,8 +39,8 @@ Required properties: - pinctrl-0: pin control group to be used for this controller. - pinctrl-names: must be "default". -Required properties for R8A774A1, R8A774B1, R8A774C0, R8A7795, R8A7796, -R8A77965, R8A77990, and R8A77995: +Required properties for R8A774A1, R8A774B1, R8A774C0, R8A774E1, R8A7795, +R8A7796, R8A77965, R8A77990, and R8A77995: For the denoted SoCs, "clkp2" can be CANFD clock. This is a div6 clock and can be used by both CAN and CAN FD controller at the same time. It needs to be scaled to maximum frequency if any of these controllers use it. This is done diff --git a/Documentation/devicetree/bindings/net/can/rcar_canfd.txt b/Documentation/devicetree/bindings/net/can/rcar_canfd.txt index 13a4e34c0c73a..22cf2a889b2c7 100644 --- a/Documentation/devicetree/bindings/net/can/rcar_canfd.txt +++ b/Documentation/devicetree/bindings/net/can/rcar_canfd.txt @@ -7,6 +7,7 @@ Required properties: - "renesas,r8a774a1-canfd" for R8A774A1 (RZ/G2M) compatible controller. - "renesas,r8a774b1-canfd" for R8A774B1 (RZ/G2N) compatible controller. - "renesas,r8a774c0-canfd" for R8A774C0 (RZ/G2E) compatible controller. + - "renesas,r8a774e1-canfd" for R8A774E1 (RZ/G2H) compatible controller. - "renesas,r8a7795-canfd" for R8A7795 (R-Car H3) compatible controller. - "renesas,r8a7796-canfd" for R8A7796 (R-Car M3-W) compatible controller. - "renesas,r8a77965-canfd" for R8A77965 (R-Car M3-N) compatible controller. @@ -32,8 +33,8 @@ The name of the child nodes are "channel0" and "channel1" respectively. Each child node supports the "status" property only, which is used to enable/disable the respective channel. -Required properties for R8A774A1, R8A774B1, R8A774C0, R8A7795, R8A7796, -R8A77965, R8A77990, and R8A77995: +Required properties for R8A774A1, R8A774B1, R8A774C0, R8A774E1, R8A7795, +R8A7796, R8A77965, R8A77990, and R8A77995: In the denoted SoCs, canfd clock is a div6 clock and can be used by both CAN and CAN FD controller at the same time. It needs to be scaled to maximum frequency if any of these controllers use it. This is done using the below diff --git a/Documentation/devicetree/bindings/net/dsa/b53.txt b/Documentation/devicetree/bindings/net/dsa/b53.txt index cfd1afdc6e940..f1487a751b1a8 100644 --- a/Documentation/devicetree/bindings/net/dsa/b53.txt +++ b/Documentation/devicetree/bindings/net/dsa/b53.txt @@ -95,7 +95,7 @@ Ethernet switch connected via MDIO to the host, CPU port wired to eth0: fixed-link { speed = <1000>; - duplex-full; + full-duplex; }; }; @@ -104,8 +104,9 @@ Ethernet switch connected via MDIO to the host, CPU port wired to eth0: #address-cells = <1>; #size-cells = <0>; - switch0: ethernet-switch@30 { + switch0: ethernet-switch@1e { compatible = "brcm,bcm53125"; + reg = <30>; #address-cells = <1>; #size-cells = <0>; @@ -128,7 +129,7 @@ Ethernet switch connected via MDIO to the host, CPU port wired to eth0: label = "cable-modem"; fixed-link { speed = <1000>; - duplex-full; + full-duplex; }; phy-mode = "rgmii-txid"; }; @@ -138,7 +139,7 @@ Ethernet switch connected via MDIO to the host, CPU port wired to eth0: label = "cpu"; fixed-link { speed = <1000>; - duplex-full; + full-duplex; }; phy-mode = "rgmii-txid"; ethernet = <ð0>; diff --git a/Documentation/devicetree/bindings/net/dsa/dsa.yaml b/Documentation/devicetree/bindings/net/dsa/dsa.yaml index 6a1ec50ad4fd5..a765ceba28c60 100644 --- a/Documentation/devicetree/bindings/net/dsa/dsa.yaml +++ b/Documentation/devicetree/bindings/net/dsa/dsa.yaml @@ -89,4 +89,6 @@ oneOf: - required: - ethernet-ports +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/net/dsa/mt7530.txt b/Documentation/devicetree/bindings/net/dsa/mt7530.txt index c5ed5d25f6420..560369efad6ca 100644 --- a/Documentation/devicetree/bindings/net/dsa/mt7530.txt +++ b/Documentation/devicetree/bindings/net/dsa/mt7530.txt @@ -5,6 +5,7 @@ Required properties: - compatible: may be compatible = "mediatek,mt7530" or compatible = "mediatek,mt7621" + or compatible = "mediatek,mt7531" - #address-cells: Must be 1. - #size-cells: Must be 0. - mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part @@ -32,10 +33,14 @@ Required properties for the child nodes within ports container: - reg: Port address described must be 6 for CPU port and from 0 to 5 for user ports. -- phy-mode: String, must be either "trgmii" or "rgmii" for port labeled - "cpu". - -Port 5 of the switch is muxed between: +- phy-mode: String, the following values are acceptable for port labeled + "cpu": + If compatible mediatek,mt7530 or mediatek,mt7621 is set, + must be either "trgmii" or "rgmii" + If compatible mediatek,mt7531 is set, + must be either "sgmii", "1000base-x" or "2500base-x" + +Port 5 of mt7530 and mt7621 switch is muxed between: 1. GMAC5: GMAC5 can interface with another external MAC or PHY. 2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC of the SOC. Used in many setups where port 0/4 becomes the WAN port. diff --git a/Documentation/devicetree/bindings/net/ethernet-controller.yaml b/Documentation/devicetree/bindings/net/ethernet-controller.yaml index fa2baca8c7262..fdf7098172183 100644 --- a/Documentation/devicetree/bindings/net/ethernet-controller.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-controller.yaml @@ -120,6 +120,13 @@ properties: and is useful for determining certain configuration settings such as flow control thresholds. + rx-internal-delay-ps: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + RGMII Receive Clock Delay defined in pico seconds. + This is used for controllers that have configurable RX internal delays. + If this property is present then the MAC applies the RX delay. + sfp: $ref: /schemas/types.yaml#definitions/phandle description: @@ -131,6 +138,13 @@ properties: The size of the controller\'s transmit fifo in bytes. This is used for components that can have configurable fifo sizes. + tx-internal-delay-ps: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + RGMII Transmit Clock Delay defined in pico seconds. + This is used for controllers that have configurable TX internal delays. + If this property is present then the MAC applies the TX delay. + managed: description: Specifies the PHY management type. If auto is set and fixed-link @@ -205,4 +219,6 @@ properties: required: - speed +additionalProperties: true + ... diff --git a/Documentation/devicetree/bindings/net/ethernet-phy.yaml b/Documentation/devicetree/bindings/net/ethernet-phy.yaml index a9e547ac79051..6dd72faebd896 100644 --- a/Documentation/devicetree/bindings/net/ethernet-phy.yaml +++ b/Documentation/devicetree/bindings/net/ethernet-phy.yaml @@ -177,6 +177,8 @@ properties: required: - reg +additionalProperties: true + examples: - | ethernet { diff --git a/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml b/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml new file mode 100644 index 0000000000000..fa3ebba4e6358 --- /dev/null +++ b/Documentation/devicetree/bindings/net/intel,dwmac-plat.yaml @@ -0,0 +1,130 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel DWMAC glue layer Device Tree Bindings + +maintainers: + - Vineetha G. Jaya Kumaran + +select: + properties: + compatible: + contains: + enum: + - intel,keembay-dwmac + required: + - compatible + +allOf: + - $ref: "snps,dwmac.yaml#" + +properties: + compatible: + oneOf: + - items: + - enum: + - intel,keembay-dwmac + - const: snps,dwmac-4.10a + + clocks: + items: + - description: GMAC main clock + - description: PTP reference clock + - description: Tx clock + + clock-names: + items: + - const: stmmaceth + - const: ptp_ref + - const: tx_clk + +required: + - compatible + - clocks + - clock-names + +examples: +# FIXME: Remove defines and include the correct header file +# once it is available in mainline. + - | + #include + #include + #define MOVISOC_KMB_PSS_GBE + #define MOVISOC_KMB_PSS_AUX_GBE_PTP + #define MOVISOC_KMB_PSS_AUX_GBE_TX + + stmmac_axi_setup: stmmac-axi-config { + snps,lpi_en; + snps,wr_osr_lmt = <0x0>; + snps,rd_osr_lmt = <0x2>; + snps,blen = <0 0 0 0 16 8 4>; + }; + + mtl_rx_setup: rx-queues-config { + snps,rx-queues-to-use = <2>; + snps,rx-sched-sp; + queue0 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x0>; + snps,priority = <0x0>; + }; + + queue1 { + snps,dcb-algorithm; + snps,map-to-dma-channel = <0x1>; + snps,priority = <0x1>; + }; + }; + + mtl_tx_setup: tx-queues-config { + snps,tx-queues-to-use = <2>; + snps,tx-sched-wrr; + queue0 { + snps,weight = <0x10>; + snps,dcb-algorithm; + snps,priority = <0x0>; + }; + + queue1 { + snps,weight = <0x10>; + snps,dcb-algorithm; + snps,priority = <0x1>; + }; + }; + + gmac0: ethernet@3a000000 { + compatible = "intel,keembay-dwmac", "snps,dwmac-4.10a"; + interrupts = ; + interrupt-names = "macirq"; + reg = <0x3a000000 0x8000>; + snps,perfect-filter-entries = <128>; + phy-handle = <ð_phy0>; + phy-mode = "rgmii"; + rx-fifo-depth = <4096>; + tx-fifo-depth = <4096>; + clock-names = "stmmaceth", "ptp_ref", "tx_clk"; + clocks = <&scmi_clk MOVISOC_KMB_PSS_GBE>, + <&scmi_clk MOVISOC_KMB_PSS_AUX_GBE_PTP>, + <&scmi_clk MOVISOC_KMB_PSS_AUX_GBE_TX>; + snps,pbl = <0x4>; + snps,axi-config = <&stmmac_axi_setup>; + snps,mtl-rx-config = <&mtl_rx_setup>; + snps,mtl-tx-config = <&mtl_tx_setup>; + snps,tso; + status = "okay"; + + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "snps,dwmac-mdio"; + + ethernet-phy@0 { + reg = <0>; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/net/marvell,mvusb.yaml b/Documentation/devicetree/bindings/net/marvell,mvusb.yaml index 68573762294b6..8e288ab38fd79 100644 --- a/Documentation/devicetree/bindings/net/marvell,mvusb.yaml +++ b/Documentation/devicetree/bindings/net/marvell,mvusb.yaml @@ -35,6 +35,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | /* USB host controller */ diff --git a/Documentation/devicetree/bindings/net/marvell,prestera.txt b/Documentation/devicetree/bindings/net/marvell,prestera.txt index 83370ebf5b895..e28938ddfdf5c 100644 --- a/Documentation/devicetree/bindings/net/marvell,prestera.txt +++ b/Documentation/devicetree/bindings/net/marvell,prestera.txt @@ -45,3 +45,37 @@ dfx-server { ranges = <0 MBUS_ID(0x08, 0x00) 0 0x100000>; reg = ; }; + +Marvell Prestera SwitchDev bindings +----------------------------------- +Optional properties: +- compatible: must be "marvell,prestera" +- base-mac-provider: describes handle to node which provides base mac address, + might be a static base mac address or nvme cell provider. + +Example: + +eeprom_mac_addr: eeprom-mac-addr { + compatible = "eeprom,mac-addr-cell"; + status = "okay"; + + nvmem = <&eeprom_at24>; +}; + +prestera { + compatible = "marvell,prestera"; + status = "okay"; + + base-mac-provider = <&eeprom_mac_addr>; +}; + +The current implementation of Prestera Switchdev PCI interface driver requires +that BAR2 is assigned to 0xf6000000 as base address from the PCI IO range: + +&cp0_pcie0 { + ranges = <0x81000000 0x0 0xfb000000 0x0 0xfb000000 0x0 0xf0000 + 0x82000000 0x0 0xf6000000 0x0 0xf6000000 0x0 0x2000000 + 0x82000000 0x0 0xf9000000 0x0 0xf9000000 0x0 0x100000>; + phys = <&cp0_comphy0 0>; + status = "okay"; +}; diff --git a/Documentation/devicetree/bindings/net/mdio.yaml b/Documentation/devicetree/bindings/net/mdio.yaml index 26afb556dfae6..e811e0fd851c1 100644 --- a/Documentation/devicetree/bindings/net/mdio.yaml +++ b/Documentation/devicetree/bindings/net/mdio.yaml @@ -100,6 +100,8 @@ patternProperties: required: - reg +additionalProperties: true + examples: - | davinci_mdio: mdio@5c030000 { diff --git a/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml b/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml index aea88e6217925..0bbd598704e98 100644 --- a/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml +++ b/Documentation/devicetree/bindings/net/mediatek,star-emac.yaml @@ -61,6 +61,8 @@ required: - mediatek,pericfg - phy-handle +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/nfc/s3fwrn5.txt b/Documentation/devicetree/bindings/net/nfc/s3fwrn5.txt deleted file mode 100644 index f02f6fb7f81c2..0000000000000 --- a/Documentation/devicetree/bindings/net/nfc/s3fwrn5.txt +++ /dev/null @@ -1,25 +0,0 @@ -* Samsung S3FWRN5 NCI NFC Controller - -Required properties: -- compatible: Should be "samsung,s3fwrn5-i2c". -- reg: address on the bus -- interrupts: GPIO interrupt to which the chip is connected -- s3fwrn5,en-gpios: Output GPIO pin used for enabling/disabling the chip -- s3fwrn5,fw-gpios: Output GPIO pin used to enter firmware mode and - sleep/wakeup control - -Example: - -&hsi2c_4 { - s3fwrn5@27 { - compatible = "samsung,s3fwrn5-i2c"; - - reg = <0x27>; - - interrupt-parent = <&gpa1>; - interrupts = <3 0 0>; - - s3fwrn5,en-gpios = <&gpf1 4 0>; - s3fwrn5,fw-gpios = <&gpj0 2 0>; - }; -}; diff --git a/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml b/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml new file mode 100644 index 0000000000000..cb0b8a5602822 --- /dev/null +++ b/Documentation/devicetree/bindings/net/nfc/samsung,s3fwrn5.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/nfc/samsung,s3fwrn5.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung S3FWRN5 NCI NFC Controller + +maintainers: + - Krzysztof Kozlowski + - Krzysztof Opasiak + +properties: + compatible: + const: samsung,s3fwrn5-i2c + + en-gpios: + maxItems: 1 + description: + Output GPIO pin used for enabling/disabling the chip + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + wake-gpios: + maxItems: 1 + description: + Output GPIO pin used to enter firmware mode and sleep/wakeup control + + s3fwrn5,en-gpios: + maxItems: 1 + deprecated: true + description: + Use en-gpios + + s3fwrn5,fw-gpios: + maxItems: 1 + deprecated: true + description: + Use wake-gpios + +additionalProperties: false + +required: + - compatible + - en-gpios + - interrupts + - reg + - wake-gpios + +examples: + - | + #include + #include + + i2c4 { + #address-cells = <1>; + #size-cells = <0>; + + s3fwrn5@27 { + compatible = "samsung,s3fwrn5-i2c"; + reg = <0x27>; + + interrupt-parent = <&gpa1>; + interrupts = <3 IRQ_TYPE_LEVEL_HIGH>; + + en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>; + wake-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml index 42be0255512b3..d51da24f35054 100644 --- a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml +++ b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml @@ -34,6 +34,8 @@ patternProperties: required: - reg +unevaluatedProperties: false + examples: - | mdio { diff --git a/Documentation/devicetree/bindings/net/qca,ar71xx.yaml b/Documentation/devicetree/bindings/net/qca,ar71xx.yaml index f99a5aabe9232..f0db22645d736 100644 --- a/Documentation/devicetree/bindings/net/qca,ar71xx.yaml +++ b/Documentation/devicetree/bindings/net/qca,ar71xx.yaml @@ -72,6 +72,8 @@ required: - resets - reset-names +unevaluatedProperties: false + examples: # Lager board - | diff --git a/Documentation/devicetree/bindings/net/qca,ar803x.yaml b/Documentation/devicetree/bindings/net/qca,ar803x.yaml index 1788884b8c289..64b3357ade8a0 100644 --- a/Documentation/devicetree/bindings/net/qca,ar803x.yaml +++ b/Documentation/devicetree/bindings/net/qca,ar803x.yaml @@ -59,6 +59,8 @@ properties: regulator to VDDIO. $ref: /schemas/regulator/regulator.yaml +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/qcom,ipa.yaml b/Documentation/devicetree/bindings/net/qcom,ipa.yaml index 8594f114f016a..4d8464b2676d9 100644 --- a/Documentation/devicetree/bindings/net/qcom,ipa.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ipa.yaml @@ -144,6 +144,8 @@ oneOf: - required: - memory-region +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml index 13555a89975fc..0c973310ada0e 100644 --- a/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ipq4019-mdio.yaml @@ -31,6 +31,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | mdio@90000 { diff --git a/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml index 67df3fe861eed..948677ade6d16 100644 --- a/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml +++ b/Documentation/devicetree/bindings/net/qcom,ipq8064-mdio.yaml @@ -33,6 +33,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml b/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml index c488f24ed38f0..4f485df69ac30 100644 --- a/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml +++ b/Documentation/devicetree/bindings/net/realtek-bluetooth.yaml @@ -37,6 +37,8 @@ properties: required: - compatible +additionalProperties: false + examples: - | #include @@ -49,6 +51,6 @@ examples: bluetooth { compatible = "realtek,rtl8723bs-bt"; device-wake-gpios = <&r_pio 0 5 GPIO_ACTIVE_HIGH>; /* PL5 */ - host-wakeup-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ + host-wake-gpios = <&r_pio 0 6 GPIO_ACTIVE_HIGH>; /* PL6 */ }; }; diff --git a/Documentation/devicetree/bindings/net/renesas,etheravb.yaml b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml new file mode 100644 index 0000000000000..244befb6402aa --- /dev/null +++ b/Documentation/devicetree/bindings/net/renesas,etheravb.yaml @@ -0,0 +1,262 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/net/renesas,etheravb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Ethernet AVB + +maintainers: + - Sergei Shtylyov + +properties: + compatible: + oneOf: + - items: + - enum: + - renesas,etheravb-r8a7742 # RZ/G1H + - renesas,etheravb-r8a7743 # RZ/G1M + - renesas,etheravb-r8a7744 # RZ/G1N + - renesas,etheravb-r8a7745 # RZ/G1E + - renesas,etheravb-r8a77470 # RZ/G1C + - renesas,etheravb-r8a7790 # R-Car H2 + - renesas,etheravb-r8a7791 # R-Car M2-W + - renesas,etheravb-r8a7792 # R-Car V2H + - renesas,etheravb-r8a7793 # R-Car M2-N + - renesas,etheravb-r8a7794 # R-Car E2 + - const: renesas,etheravb-rcar-gen2 # R-Car Gen2 and RZ/G1 + + - items: + - enum: + - renesas,etheravb-r8a774a1 # RZ/G2M + - renesas,etheravb-r8a774b1 # RZ/G2N + - renesas,etheravb-r8a774c0 # RZ/G2E + - renesas,etheravb-r8a774e1 # RZ/G2H + - renesas,etheravb-r8a7795 # R-Car H3 + - renesas,etheravb-r8a7796 # R-Car M3-W + - renesas,etheravb-r8a77961 # R-Car M3-W+ + - renesas,etheravb-r8a77965 # R-Car M3-N + - renesas,etheravb-r8a77970 # R-Car V3M + - renesas,etheravb-r8a77980 # R-Car V3H + - renesas,etheravb-r8a77990 # R-Car E3 + - renesas,etheravb-r8a77995 # R-Car D3 + - const: renesas,etheravb-rcar-gen3 # R-Car Gen3 and RZ/G2 + + reg: true + + interrupts: true + + interrupt-names: true + + clocks: + maxItems: 1 + + iommus: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + phy-mode: true + + phy-handle: true + + '#address-cells': + description: Number of address cells for the MDIO bus. + const: 1 + + '#size-cells': + description: Number of size cells on the MDIO bus. + const: 0 + + renesas,no-ether-link: + type: boolean + description: + Specify when a board does not provide a proper AVB_LINK signal. + + renesas,ether-link-active-low: + type: boolean + description: + Specify when the AVB_LINK signal is active-low instead of normal + active-high. + + rx-internal-delay-ps: + enum: [0, 1800] + + tx-internal-delay-ps: + enum: [0, 2000] + +patternProperties: + "^ethernet-phy@[0-9a-f]$": + type: object + $ref: ethernet-phy.yaml# + +required: + - compatible + - reg + - interrupts + - clocks + - power-domains + - resets + - phy-mode + - phy-handle + - '#address-cells' + - '#size-cells' + +allOf: + - $ref: ethernet-controller.yaml# + + - if: + properties: + compatible: + contains: + enum: + - renesas,etheravb-rcar-gen2 + - renesas,etheravb-r8a7795 + - renesas,etheravb-r8a7796 + - renesas,etheravb-r8a77961 + - renesas,etheravb-r8a77965 + then: + properties: + reg: + items: + - description: MAC register block + - description: Stream buffer + else: + properties: + reg: + items: + - description: MAC register block + + - if: + properties: + compatible: + contains: + const: renesas,etheravb-rcar-gen2 + then: + properties: + interrupts: + maxItems: 1 + interrupt-names: + items: + - const: mux + rx-internal-delay-ps: false + else: + properties: + interrupts: + minItems: 25 + maxItems: 25 + interrupt-names: + items: + pattern: '^ch[0-9]+$' + required: + - interrupt-names + - rx-internal-delay-ps + + - if: + properties: + compatible: + contains: + enum: + - renesas,etheravb-r8a774a1 + - renesas,etheravb-r8a774b1 + - renesas,etheravb-r8a7795 + - renesas,etheravb-r8a7796 + - renesas,etheravb-r8a77961 + - renesas,etheravb-r8a77965 + - renesas,etheravb-r8a77970 + - renesas,etheravb-r8a77980 + then: + required: + - tx-internal-delay-ps + else: + properties: + tx-internal-delay-ps: false + + - if: + properties: + compatible: + contains: + const: renesas,etheravb-r8a77995 + then: + properties: + rx-internal-delay-ps: + const: 1800 + + - if: + properties: + compatible: + contains: + const: renesas,etheravb-r8a77980 + then: + properties: + tx-internal-delay-ps: + const: 2000 + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + aliases { + ethernet0 = &avb; + }; + + avb: ethernet@e6800000 { + compatible = "renesas,etheravb-r8a7795", + "renesas,etheravb-rcar-gen3"; + reg = <0xe6800000 0x800>, <0xe6a00000 0x10000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", + "ch7", "ch8", "ch9", "ch10", "ch11", "ch12", + "ch13", "ch14", "ch15", "ch16", "ch17", "ch18", + "ch19", "ch20", "ch21", "ch22", "ch23", "ch24"; + clocks = <&cpg CPG_MOD 812>; + iommus = <&ipmmu_ds0 16>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 812>; + phy-mode = "rgmii"; + phy-handle = <&phy0>; + rx-internal-delay-ps = <0>; + tx-internal-delay-ps = <2000>; + #address-cells = <1>; + #size-cells = <0>; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio2>; + interrupts = <11 IRQ_TYPE_LEVEL_LOW>; + reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>; + }; + }; diff --git a/Documentation/devicetree/bindings/net/renesas,ravb.txt b/Documentation/devicetree/bindings/net/renesas,ravb.txt deleted file mode 100644 index 9119f1caf3915..0000000000000 --- a/Documentation/devicetree/bindings/net/renesas,ravb.txt +++ /dev/null @@ -1,135 +0,0 @@ -* Renesas Electronics Ethernet AVB - -This file provides information on what the device node for the Ethernet AVB -interface contains. - -Required properties: -- compatible: Must contain one or more of the following: - - "renesas,etheravb-r8a7742" for the R8A7742 SoC. - - "renesas,etheravb-r8a7743" for the R8A7743 SoC. - - "renesas,etheravb-r8a7744" for the R8A7744 SoC. - - "renesas,etheravb-r8a7745" for the R8A7745 SoC. - - "renesas,etheravb-r8a77470" for the R8A77470 SoC. - - "renesas,etheravb-r8a7790" for the R8A7790 SoC. - - "renesas,etheravb-r8a7791" for the R8A7791 SoC. - - "renesas,etheravb-r8a7792" for the R8A7792 SoC. - - "renesas,etheravb-r8a7793" for the R8A7793 SoC. - - "renesas,etheravb-r8a7794" for the R8A7794 SoC. - - "renesas,etheravb-rcar-gen2" as a fallback for the above - R-Car Gen2 and RZ/G1 devices. - - - "renesas,etheravb-r8a774a1" for the R8A774A1 SoC. - - "renesas,etheravb-r8a774b1" for the R8A774B1 SoC. - - "renesas,etheravb-r8a774c0" for the R8A774C0 SoC. - - "renesas,etheravb-r8a774e1" for the R8A774E1 SoC. - - "renesas,etheravb-r8a7795" for the R8A7795 SoC. - - "renesas,etheravb-r8a7796" for the R8A77960 SoC. - - "renesas,etheravb-r8a77961" for the R8A77961 SoC. - - "renesas,etheravb-r8a77965" for the R8A77965 SoC. - - "renesas,etheravb-r8a77970" for the R8A77970 SoC. - - "renesas,etheravb-r8a77980" for the R8A77980 SoC. - - "renesas,etheravb-r8a77990" for the R8A77990 SoC. - - "renesas,etheravb-r8a77995" for the R8A77995 SoC. - - "renesas,etheravb-rcar-gen3" as a fallback for the above - R-Car Gen3 and RZ/G2 devices. - - When compatible with the generic version, nodes must list the - SoC-specific version corresponding to the platform first followed by - the generic version. - -- reg: Offset and length of (1) the register block and (2) the stream buffer. - The region for the register block is mandatory. - The region for the stream buffer is optional, as it is only present on - R-Car Gen2 and RZ/G1 SoCs, and on R-Car H3 (R8A7795), M3-W (R8A77960), - M3-W+ (R8A77961), and M3-N (R8A77965). -- interrupts: A list of interrupt-specifiers, one for each entry in - interrupt-names. - If interrupt-names is not present, an interrupt specifier - for a single muxed interrupt. -- phy-mode: see ethernet.txt file in the same directory. -- phy-handle: see ethernet.txt file in the same directory. -- #address-cells: number of address cells for the MDIO bus, must be equal to 1. -- #size-cells: number of size cells on the MDIO bus, must be equal to 0. -- clocks: clock phandle and specifier pair. -- pinctrl-0: phandle, referring to a default pin configuration node. - -Optional properties: -- interrupt-names: A list of interrupt names. - For the R-Car Gen 3 SoCs this property is mandatory; - it should include one entry per channel, named "ch%u", - where %u is the channel number ranging from 0 to 24. - For other SoCs this property is optional; if present - it should contain "mux" for a single muxed interrupt. -- pinctrl-names: pin configuration state name ("default"). -- renesas,no-ether-link: boolean, specify when a board does not provide a proper - AVB_LINK signal. -- renesas,ether-link-active-low: boolean, specify when the AVB_LINK signal is - active-low instead of normal active-high. - -Example: - - ethernet@e6800000 { - compatible = "renesas,etheravb-r8a7795", "renesas,etheravb-rcar-gen3"; - reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; - interrupt-parent = <&gic>; - interrupts = , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - , - ; - interrupt-names = "ch0", "ch1", "ch2", "ch3", - "ch4", "ch5", "ch6", "ch7", - "ch8", "ch9", "ch10", "ch11", - "ch12", "ch13", "ch14", "ch15", - "ch16", "ch17", "ch18", "ch19", - "ch20", "ch21", "ch22", "ch23", - "ch24"; - clocks = <&cpg CPG_MOD 812>; - power-domains = <&cpg>; - phy-mode = "rgmii-id"; - phy-handle = <&phy0>; - - pinctrl-0 = <ðer_pins>; - pinctrl-names = "default"; - renesas,no-ether-link; - #address-cells = <1>; - #size-cells = <0>; - - phy0: ethernet-phy@0 { - rxc-skew-ps = <900>; - rxdv-skew-ps = <0>; - rxd0-skew-ps = <0>; - rxd1-skew-ps = <0>; - rxd2-skew-ps = <0>; - rxd3-skew-ps = <0>; - txc-skew-ps = <900>; - txen-skew-ps = <0>; - txd0-skew-ps = <0>; - txd1-skew-ps = <0>; - txd2-skew-ps = <0>; - txd3-skew-ps = <0>; - reg = <0>; - interrupt-parent = <&gpio2>; - interrupts = <11 IRQ_TYPE_LEVEL_LOW>; - }; - }; diff --git a/Documentation/devicetree/bindings/net/smsc-lan87xx.txt b/Documentation/devicetree/bindings/net/smsc-lan87xx.txt index 8b7c719b0bb94..a8d0dc9a8c0ec 100644 --- a/Documentation/devicetree/bindings/net/smsc-lan87xx.txt +++ b/Documentation/devicetree/bindings/net/smsc-lan87xx.txt @@ -5,6 +5,10 @@ through an Ethernet OF device node. Optional properties: +- clocks: + The clock used as phy reference clock and is connected to phy + pin XTAL1/CLKIN. + - smsc,disable-energy-detect: If set, do not enable energy detect mode for the SMSC phy. default: enable energy detect mode diff --git a/Documentation/devicetree/bindings/net/snps,dwmac.yaml b/Documentation/devicetree/bindings/net/snps,dwmac.yaml index 30a1efd266267..11a6fdb657c93 100644 --- a/Documentation/devicetree/bindings/net/snps,dwmac.yaml +++ b/Documentation/devicetree/bindings/net/snps,dwmac.yaml @@ -356,6 +356,8 @@ allOf: Enables the TSO feature otherwise it will be managed by MAC HW capability register. +additionalProperties: true + examples: - | stmmac_axi_setup: stmmac-axi-config { diff --git a/Documentation/devicetree/bindings/net/socionext-netsec.txt b/Documentation/devicetree/bindings/net/socionext-netsec.txt index 9d6c9feb12ff1..a3c1dffaa4bb4 100644 --- a/Documentation/devicetree/bindings/net/socionext-netsec.txt +++ b/Documentation/devicetree/bindings/net/socionext-netsec.txt @@ -30,7 +30,9 @@ Optional properties: (See ethernet.txt file in the same directory) - max-frame-size: See ethernet.txt in the same directory. The MAC address will be determined using the optional properties -defined in ethernet.txt. +defined in ethernet.txt. The 'phy-mode' property is required, but may +be set to the empty string if the PHY configuration is programmed by +the firmware or set by hardware straps, and needs to be preserved. Example: eth0: ethernet@522d0000 { diff --git a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml index e5dff66df481f..27eb6066793f2 100644 --- a/Documentation/devicetree/bindings/net/stm32-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/stm32-dwmac.yaml @@ -88,6 +88,8 @@ required: - clock-names - st,syscon +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml b/Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml index d454c1fab9308..5728fe23f5304 100644 --- a/Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml +++ b/Documentation/devicetree/bindings/net/ti,davinci-mdio.yaml @@ -58,6 +58,8 @@ required: - "#address-cells" - "#size-cells" +unevaluatedProperties: false + examples: - | davinci_mdio: mdio@4a101000 { diff --git a/Documentation/devicetree/bindings/net/ti,dp83822.yaml b/Documentation/devicetree/bindings/net/ti,dp83822.yaml new file mode 100644 index 0000000000000..55913534cbc2b --- /dev/null +++ b/Documentation/devicetree/bindings/net/ti,dp83822.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause) +# Copyright (C) 2020 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/net/ti,dp83822.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: TI DP83822 ethernet PHY + +maintainers: + - Dan Murphy + +description: | + The DP83822 is a low-power, single-port, 10/100 Mbps Ethernet PHY. It + provides all of the physical layer functions needed to transmit and receive + data over standard, twisted-pair cables or to connect to an external, + fiber-optic transceiver. Additionally, the DP83822 provides flexibility to + connect to a MAC through a standard MII, RMII, or RGMII interface + + Specifications about the Ethernet PHY can be found at: + http://www.ti.com/lit/ds/symlink/dp83822i.pdf + +allOf: + - $ref: "ethernet-phy.yaml#" + +properties: + reg: + maxItems: 1 + + ti,link-loss-low: + type: boolean + description: | + DP83822 PHY in Fiber mode only. + Sets the DP83822 to detect a link drop condition when the signal goes + high. If not set then link drop will occur when the signal goes low. + This property is only applicable if the fiber mode support is strapped + to on. + + ti,fiber-mode: + type: boolean + description: | + DP83822 PHY only. + If present the DP83822 PHY is configured to operate in fiber mode + Fiber mode support can also be strapped. If the strap pin is not set + correctly or not set at all then this boolean can be used to enable it. + If the fiber mode is not strapped then signal detection for the PHY + is disabled. + In fiber mode, auto-negotiation is disabled and the PHY can only work in + 100base-fx (full and half duplex) modes. + + rx-internal-delay-ps: + description: | + DP83822 PHY only. + Setting this property to a non-zero number sets the RX internal delay + for the PHY. The internal delay for the PHY is fixed to 3.5ns relative + to receive data. + + tx-internal-delay-ps: + description: | + DP83822 PHY only. + Setting this property to a non-zero number sets the TX internal delay + for the PHY. The internal delay for the PHY is fixed to 3.5ns relative + to transmit data. + +required: + - reg + +examples: + - | + mdio0 { + #address-cells = <1>; + #size-cells = <0>; + ethphy0: ethernet-phy@0 { + reg = <0>; + rx-internal-delay-ps = <1>; + tx-internal-delay-ps = <1>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/net/ti,dp83867.yaml b/Documentation/devicetree/bindings/net/ti,dp83867.yaml index c6716ac6cbcca..4050a36086585 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83867.yaml +++ b/Documentation/devicetree/bindings/net/ti,dp83867.yaml @@ -109,6 +109,8 @@ properties: required: - reg +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/ti,dp83869.yaml b/Documentation/devicetree/bindings/net/ti,dp83869.yaml index cf40b469c7196..c3235f08e3263 100644 --- a/Documentation/devicetree/bindings/net/ti,dp83869.yaml +++ b/Documentation/devicetree/bindings/net/ti,dp83869.yaml @@ -79,6 +79,8 @@ properties: required: - reg +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml index 2c320eb2a8c48..6c35682377e6d 100644 --- a/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml +++ b/Documentation/devicetree/bindings/net/wireless/microchip,wilc1000.yaml @@ -18,6 +18,8 @@ properties: compatible: const: microchip,wilc1000 + reg: true + spi-max-frequency: true interrupts: @@ -34,6 +36,8 @@ required: - compatible - interrupts +additionalProperties: false + examples: - | spi { diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt index 65ee68efd5746..b61c2d5a0ff7c 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath10k.txt @@ -65,7 +65,8 @@ Optional properties: the length can vary between hw versions. - -supply: handle to the regulator device tree node optional "supply-name" are "vdd-0.8-cx-mx", - "vdd-1.8-xo", "vdd-1.3-rfa" and "vdd-3.3-ch0". + "vdd-1.8-xo", "vdd-1.3-rfa", "vdd-3.3-ch0", + and "vdd-3.3-ch1". - memory-region: Usage: optional Value type: @@ -204,6 +205,7 @@ wifi@18000000 { vdd-1.8-xo-supply = <&vreg_l7a_1p8>; vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; + vdd-3.3-ch1-supply = <&vreg_l26a_3p3>; memory-region = <&wifi_msa_mem>; iommus = <&apps_smmu 0x0040 0x1>; qcom,msa-fixed-perm; diff --git a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml index a1717db36dba1..4b365c9d93788 100644 --- a/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml +++ b/Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml @@ -17,7 +17,9 @@ description: | properties: compatible: - const: qcom,ipq8074-wifi + enum: + - qcom,ipq8074-wifi + - qcom,ipq6018-wifi reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml b/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml index 1c9d7f05f1730..8a43dc1283fe5 100644 --- a/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml +++ b/Documentation/devicetree/bindings/nvmem/imx-ocotp.yaml @@ -19,21 +19,29 @@ allOf: properties: compatible: - items: - - enum: - - fsl,imx6q-ocotp - - fsl,imx6sl-ocotp - - fsl,imx6sx-ocotp - - fsl,imx6ul-ocotp - - fsl,imx6ull-ocotp - - fsl,imx7d-ocotp - - fsl,imx6sll-ocotp - - fsl,imx7ulp-ocotp - - fsl,imx8mq-ocotp - - fsl,imx8mm-ocotp - - fsl,imx8mn-ocotp - - fsl,imx8mp-ocotp - - const: syscon + oneOf: + - items: + - enum: + - fsl,imx6q-ocotp + - fsl,imx6sl-ocotp + - fsl,imx6sx-ocotp + - fsl,imx6ul-ocotp + - fsl,imx6ull-ocotp + - fsl,imx7d-ocotp + - fsl,imx6sll-ocotp + - fsl,imx7ulp-ocotp + - fsl,imx8mq-ocotp + - fsl,imx8mm-ocotp + - const: syscon + - items: + - enum: + - fsl,imx8mn-ocotp + # i.MX8MP not really compatible with fsl,imx8mm-ocotp, however + # the code for getting SoC revision depends on fsl,imx8mm-ocotp + # compatible. + - fsl,imx8mp-ocotp + - const: fsl,imx8mm-ocotp + - const: syscon reg: maxItems: 1 @@ -68,6 +76,8 @@ patternProperties: additionalProperties: false +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml b/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml index b7c00ed310850..d5d7f113bade4 100644 --- a/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml +++ b/Documentation/devicetree/bindings/nvmem/nvmem-consumer.yaml @@ -36,6 +36,8 @@ dependencies: nvmem-names: [ nvmem ] nvmem-cell-names: [ nvmem-cells ] +additionalProperties: true + examples: - | tsens { diff --git a/Documentation/devicetree/bindings/nvmem/nvmem.yaml b/Documentation/devicetree/bindings/nvmem/nvmem.yaml index b459f9dba6c93..7481a9e48f196 100644 --- a/Documentation/devicetree/bindings/nvmem/nvmem.yaml +++ b/Documentation/devicetree/bindings/nvmem/nvmem.yaml @@ -67,6 +67,8 @@ patternProperties: required: - reg +additionalProperties: true + examples: - | #include diff --git a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml index 59aca6d22ff9b..1a18b6bab35e7 100644 --- a/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml +++ b/Documentation/devicetree/bindings/nvmem/qcom,qfprom.yaml @@ -49,6 +49,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml b/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml index 7bbd4e62044e9..a835e64bc6f51 100644 --- a/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml +++ b/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml @@ -66,6 +66,8 @@ patternProperties: additionalProperties: false +unevaluatedProperties: false + examples: - | sdam_1: nvram@b000 { diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml index 3ae00b0b23bcb..104dd508565e6 100644 --- a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml +++ b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml @@ -51,6 +51,8 @@ required: - clocks - clock-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt b/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt deleted file mode 100644 index 3cb1708966586..0000000000000 --- a/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.txt +++ /dev/null @@ -1,21 +0,0 @@ -Device tree bindings for Low Power General Purpose Register found in i.MX6Q/D -and i.MX7 Secure Non-Volatile Storage. - -This DT node should be represented as a sub-node of a "syscon", -"simple-mfd" node. - -Required properties: -- compatible: should be one of the fallowing variants: - "fsl,imx6q-snvs-lpgpr" for Freescale i.MX6Q/D/DL/S - "fsl,imx6ul-snvs-lpgpr" for Freescale i.MX6UL - "fsl,imx7d-snvs-lpgpr" for Freescale i.MX7D/S - -Example: -snvs: snvs@020cc000 { - compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; - reg = <0x020cc000 0x4000>; - - snvs_lpgpr: snvs-lpgpr { - compatible = "fsl,imx6q-snvs-lpgpr"; - }; -}; diff --git a/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml b/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml new file mode 100644 index 0000000000000..c819f0e903209 --- /dev/null +++ b/Documentation/devicetree/bindings/nvmem/snvs-lpgpr.yaml @@ -0,0 +1,33 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/nvmem/snvs-lpgpr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Low Power General Purpose Register found in i.MX Secure Non-Volatile Storage + +maintainers: + - Oleksij Rempel + +properties: + compatible: + enum: + - fsl,imx6q-snvs-lpgpr + - fsl,imx6ul-snvs-lpgpr + - fsl,imx7d-snvs-lpgpr + +required: + - compatible + +additionalProperties: false + +examples: + - | + snvs@20cc000 { + compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd"; + reg = <0x20cc000 0x4000>; + + snvs_lpgpr: snvs-lpgpr { + compatible = "fsl,imx6q-snvs-lpgpr"; + }; + }; diff --git a/Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml b/Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml index c11c99f085d78..0b80ce22a2f88 100644 --- a/Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml +++ b/Documentation/devicetree/bindings/nvmem/st,stm32-romem.yaml @@ -42,6 +42,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | efuse@1fff7800 { diff --git a/Documentation/devicetree/bindings/nvmem/vf610-ocotp.txt b/Documentation/devicetree/bindings/nvmem/vf610-ocotp.txt index 56ed481c3e262..72ba628f6d0b0 100644 --- a/Documentation/devicetree/bindings/nvmem/vf610-ocotp.txt +++ b/Documentation/devicetree/bindings/nvmem/vf610-ocotp.txt @@ -2,7 +2,7 @@ On-Chip OTP Memory for Freescale Vybrid Required Properties: compatible: - - "fsl,vf610-ocotp" for VF5xx/VF6xx + - "fsl,vf610-ocotp", "syscon" for VF5xx/VF6xx #address-cells : Should be 1 #size-cells : Should be 1 reg : Address and length of OTP controller and fuse map registers @@ -11,7 +11,7 @@ Required Properties: Example for Vybrid VF5xx/VF6xx: ocotp: ocotp@400a5000 { - compatible = "fsl,vf610-ocotp"; + compatible = "fsl,vf610-ocotp", "syscon"; #address-cells = <1>; #size-cells = <1>; reg = <0x400a5000 0xCF0>; diff --git a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml index aef87a33a7c99..aeff2bd774dd7 100644 --- a/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml +++ b/Documentation/devicetree/bindings/opp/allwinner,sun50i-h6-operating-points.yaml @@ -31,6 +31,8 @@ properties: Documentation/devicetree/bindings/nvmem/nvmem.txt and also examples below. + opp-shared: true + required: - compatible - nvmem-cells @@ -53,7 +55,7 @@ patternProperties: unevaluatedProperties: false -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/opp/opp.txt b/Documentation/devicetree/bindings/opp/opp.txt index 9d16d417e9be4..9847dfeeffcba 100644 --- a/Documentation/devicetree/bindings/opp/opp.txt +++ b/Documentation/devicetree/bindings/opp/opp.txt @@ -154,25 +154,27 @@ Optional properties: - opp-suspend: Marks the OPP to be used during device suspend. If multiple OPPs in the table have this, the OPP with highest opp-hz will be used. -- opp-supported-hw: This enables us to select only a subset of OPPs from the - larger OPP table, based on what version of the hardware we are running on. We - still can't have multiple nodes with the same opp-hz value in OPP table. - - It's a user defined array containing a hierarchy of hardware version numbers, - supported by the OPP. For example: a platform with hierarchy of three levels - of versions (A, B and C), this field should be like , where X - corresponds to Version hierarchy A, Y corresponds to version hierarchy B and Z - corresponds to version hierarchy C. - - Each level of hierarchy is represented by a 32 bit value, and so there can be - only 32 different supported version per hierarchy. i.e. 1 bit per version. A - value of 0xFFFFFFFF will enable the OPP for all versions for that hierarchy - level. And a value of 0x00000000 will disable the OPP completely, and so we - never want that to happen. - - If 32 values aren't sufficient for a version hierarchy, than that version - hierarchy can be contained in multiple 32 bit values. i.e. in the - above example, Z1 & Z2 refer to the version hierarchy Z. +- opp-supported-hw: This property allows a platform to enable only a subset of + the OPPs from the larger set present in the OPP table, based on the current + version of the hardware (already known to the operating system). + + Each block present in the array of blocks in this property, represents a + sub-group of hardware versions supported by the OPP. i.e. , + , etc. The OPP will be enabled if _any_ of these sub-groups match + the hardware's version. + + Each sub-group is a platform defined array representing the hierarchy of + hardware versions supported by the platform. For a platform with three + hierarchical levels of version (X.Y.Z), this field shall look like + + opp-supported-hw = , , . + + Each level (eg. X1) in version hierarchy is represented by a 32 bit value, one + bit per version and so there can be maximum 32 versions per level. Logical AND + (&) operation is performed for each level with the hardware's level version + and a non-zero output for _all_ the levels in a sub-group means the OPP is + supported by hardware. A value of 0xFFFFFFFF for each level in the sub-group + will enable the OPP for all versions for the hardware. - status: Marks the node enabled/disabled. @@ -503,7 +505,6 @@ Example 5: opp-supported-hw */ opp-supported-hw = <0xF 0xFFFFFFFF 0xFFFFFFFF> opp-hz = /bits/ 64 <600000000>; - opp-microvolt = <915000 900000 925000>; ... }; @@ -516,7 +517,17 @@ Example 5: opp-supported-hw */ opp-supported-hw = <0x20 0xff0000ff 0x0000f4f0> opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <915000 900000 925000>; + ... + }; + + opp-900000000 { + /* + * Supports: + * - All cuts and substrate where process version is 0x2. + * - All cuts and process where substrate version is 0x2. + */ + opp-supported-hw = <0xFFFFFFFF 0xFFFFFFFF 0x02>, <0xFFFFFFFF 0x01 0xFFFFFFFF> + opp-hz = /bits/ 64 <900000000>; ... }; }; diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml index 8680a0f86c5a7..807694b4f41f6 100644 --- a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml @@ -9,12 +9,15 @@ title: Brcmstb PCIe Host Controller Device Tree Bindings maintainers: - Nicolas Saenz Julienne -allOf: - - $ref: /schemas/pci/pci-bus.yaml# - properties: compatible: - const: brcm,bcm2711-pcie # The Raspberry Pi 4 + items: + - enum: + - brcm,bcm2711-pcie # The Raspberry Pi 4 + - brcm,bcm7211-pcie # Broadcom STB version of RPi4 + - brcm,bcm7278-pcie # Broadcom 7278 Arm + - brcm,bcm7216-pcie # Broadcom 7216 Arm + - brcm,bcm7445-pcie # Broadcom 7445 Arm reg: maxItems: 1 @@ -34,10 +37,12 @@ properties: - const: msi ranges: - maxItems: 1 + minItems: 1 + maxItems: 4 dma-ranges: - maxItems: 1 + minItems: 1 + maxItems: 6 clocks: maxItems: 1 @@ -58,8 +63,31 @@ properties: aspm-no-l0s: true + resets: + description: for "brcm,bcm7216-pcie", must be a valid reset + phandle pointing to the RESCAL reset controller provider node. + $ref: "/schemas/types.yaml#/definitions/phandle" + + reset-names: + items: + - const: rescal + + brcm,scb-sizes: + description: u64 giving the 64bit PCIe memory + viewport size of a memory controller. There may be up to + three controllers, and each size must be a power of two + with a size greater or equal to the amount of memory the + controller supports. Note that each memory controller + may have two component regions -- base and extended -- so + this information cannot be deduced from the dma-ranges. + $ref: /schemas/types.yaml#/definitions/uint64-array + items: + minItems: 1 + maxItems: 3 + required: - reg + - ranges - dma-ranges - "#interrupt-cells" - interrupts @@ -68,6 +96,18 @@ required: - interrupt-map - msi-controller +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + - if: + properties: + compatible: + contains: + const: brcm,bcm7216-pcie + then: + required: + - resets + - reset-names + unevaluatedProperties: false examples: @@ -93,7 +133,9 @@ examples: msi-parent = <&pcie0>; msi-controller; ranges = <0x02000000 0x0 0xf8000000 0x6 0x00000000 0x0 0x04000000>; - dma-ranges = <0x02000000 0x0 0x00000000 0x0 0x00000000 0x0 0x80000000>; + dma-ranges = <0x42000000 0x1 0x00000000 0x0 0x40000000 0x0 0x80000000>, + <0x42000000 0x1 0x80000000 0x3 0x00000000 0x0 0x80000000>; brcm,enable-ssc; + brcm,scb-sizes = <0x0000000080000000 0x0000000080000000>; }; }; diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml index 50ce5d79d2c70..651eee88989d3 100644 --- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-ep.yaml @@ -29,6 +29,8 @@ required: - reg - reg-names +unevaluatedProperties: false + examples: - | bus { diff --git a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml index 6d67067843bfc..293b8ec318bc4 100644 --- a/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml +++ b/Documentation/devicetree/bindings/pci/cdns,cdns-pcie-host.yaml @@ -31,6 +31,8 @@ required: - reg - reg-names +unevaluatedProperties: false + examples: - | bus { diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml index 016a5f61592d4..60b8baf299bb5 100644 --- a/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/cdns-pcie-ep.yaml @@ -22,3 +22,5 @@ properties: required: - cdns,max-outbound-regions + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml index 303078a7b7a88..a944f9bfffffc 100644 --- a/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml +++ b/Documentation/devicetree/bindings/pci/cdns-pcie-host.yaml @@ -33,3 +33,5 @@ properties: deprecated: true msi-parent: true + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pci/cdns-pcie.yaml b/Documentation/devicetree/bindings/pci/cdns-pcie.yaml index 02553d5e6c511..df4fe28222b02 100644 --- a/Documentation/devicetree/bindings/pci/cdns-pcie.yaml +++ b/Documentation/devicetree/bindings/pci/cdns-pcie.yaml @@ -21,3 +21,5 @@ properties: items: - const: pcie-phy # FIXME: names when more than 1 + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml index 47353d0cd3941..6bcaa8f2c3cf5 100644 --- a/Documentation/devicetree/bindings/pci/host-generic-pci.yaml +++ b/Documentation/devicetree/bindings/pci/host-generic-pci.yaml @@ -137,6 +137,8 @@ allOf: reg: maxItems: 1 +unevaluatedProperties: false + examples: - | diff --git a/Documentation/devicetree/bindings/pci/layerscape-pci.txt b/Documentation/devicetree/bindings/pci/layerscape-pci.txt index 99a386ea691c2..daa99f7d4c3fb 100644 --- a/Documentation/devicetree/bindings/pci/layerscape-pci.txt +++ b/Documentation/devicetree/bindings/pci/layerscape-pci.txt @@ -24,6 +24,8 @@ Required properties: "fsl,ls1028a-pcie" EP mode: "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep" + "fsl,ls1088a-pcie-ep", "fsl,ls-pcie-ep" + "fsl,ls2088a-pcie-ep", "fsl,ls-pcie-ep" - reg: base addresses and lengths of the PCIe controller register blocks. - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property. diff --git a/Documentation/devicetree/bindings/pci/loongson.yaml b/Documentation/devicetree/bindings/pci/loongson.yaml index 30e7cf1aeb87a..81bae060cbde7 100644 --- a/Documentation/devicetree/bindings/pci/loongson.yaml +++ b/Documentation/devicetree/bindings/pci/loongson.yaml @@ -39,6 +39,8 @@ required: - reg - ranges +unevaluatedProperties: false + examples: - | diff --git a/Documentation/devicetree/bindings/pci/pci-ep.yaml b/Documentation/devicetree/bindings/pci/pci-ep.yaml index 0f8e575ac01a3..7847bbcd4a03d 100644 --- a/Documentation/devicetree/bindings/pci/pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/pci-ep.yaml @@ -36,3 +36,5 @@ properties: required: - compatible + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml index aa483c7f27fda..84eeb7fe6e014 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.yaml @@ -14,8 +14,12 @@ maintainers: properties: compatible: items: - - const: renesas,r8a774c0-pcie-ep - - const: renesas,rcar-gen3-pcie-ep + - enum: + - renesas,r8a774a1-pcie-ep # RZ/G2M + - renesas,r8a774b1-pcie-ep # RZ/G2N + - renesas,r8a774c0-pcie-ep # RZ/G2E + - renesas,r8a774e1-pcie-ep # RZ/G2H + - const: renesas,rcar-gen3-pcie-ep # R-Car Gen3 and RZ/G2 reg: maxItems: 5 @@ -55,6 +59,8 @@ required: - clock-names - max-functions +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/pci/rcar-pci.txt b/Documentation/devicetree/bindings/pci/rcar-pci.txt index 1041c44a614f5..14d307deff061 100644 --- a/Documentation/devicetree/bindings/pci/rcar-pci.txt +++ b/Documentation/devicetree/bindings/pci/rcar-pci.txt @@ -1,7 +1,8 @@ * Renesas R-Car PCIe interface Required properties: -compatible: "renesas,pcie-r8a7743" for the R8A7743 SoC; +compatible: "renesas,pcie-r8a7742" for the R8A7742 SoC; + "renesas,pcie-r8a7743" for the R8A7743 SoC; "renesas,pcie-r8a7744" for the R8A7744 SoC; "renesas,pcie-r8a774a1" for the R8A774A1 SoC; "renesas,pcie-r8a774b1" for the R8A774B1 SoC; diff --git a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml index f0558b9cf9e98..f4292d2c54e3c 100644 --- a/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml +++ b/Documentation/devicetree/bindings/pci/socionext,uniphier-pcie-ep.yaml @@ -23,14 +23,22 @@ properties: const: socionext,uniphier-pro5-pcie-ep reg: - maxItems: 4 + minItems: 4 + maxItems: 5 reg-names: - items: - - const: dbi - - const: dbi2 - - const: link - - const: addr_space + oneOf: + - items: + - const: dbi + - const: dbi2 + - const: link + - const: addr_space + - items: + - const: dbi + - const: dbi2 + - const: link + - const: addr_space + - const: atu clocks: maxItems: 2 diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml index b3c3d0c3c3902..3ae3e1a2d4b07 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-ep.yaml @@ -63,6 +63,8 @@ required: - phys - phy-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml index 8200ba00bc092..ee7a8eade3f6e 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml @@ -72,6 +72,8 @@ required: - phys - phy-names +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/pci/uniphier-pcie.txt b/Documentation/devicetree/bindings/pci/uniphier-pcie.txt index 1fa2c5906d4d7..c4b7381733a0f 100644 --- a/Documentation/devicetree/bindings/pci/uniphier-pcie.txt +++ b/Documentation/devicetree/bindings/pci/uniphier-pcie.txt @@ -16,6 +16,7 @@ Required properties: "dbi" - controller configuration registers "link" - SoC-specific glue layer registers "config" - PCIe configuration space + "atu" - iATU registers for DWC version 4.80 or later - clocks: A phandle to the clock gate for PCIe glue layer including the host controller. - resets: A phandle to the reset line for PCIe glue layer including diff --git a/Documentation/devicetree/bindings/pci/versatile.yaml b/Documentation/devicetree/bindings/pci/versatile.yaml index 07a48c27db1f3..09748ef6b94f5 100644 --- a/Documentation/devicetree/bindings/pci/versatile.yaml +++ b/Documentation/devicetree/bindings/pci/versatile.yaml @@ -48,6 +48,8 @@ required: - interrupt-map - interrupt-map-mask +unevaluatedProperties: false + examples: - | pci@10001000 { diff --git a/Documentation/devicetree/bindings/perf/arm,cmn.yaml b/Documentation/devicetree/bindings/perf/arm,cmn.yaml new file mode 100644 index 0000000000000..e4fcc0de25e2a --- /dev/null +++ b/Documentation/devicetree/bindings/perf/arm,cmn.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2020 Arm Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/arm,cmn.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Arm CMN (Coherent Mesh Network) Performance Monitors + +maintainers: + - Robin Murphy + +properties: + compatible: + const: arm,cmn-600 + + reg: + items: + - description: Physical address of the base (PERIPHBASE) and + size (up to 64MB) of the configuration address space. + + interrupts: + minItems: 1 + maxItems: 4 + items: + - description: Overflow interrupt for DTC0 + - description: Overflow interrupt for DTC1 + - description: Overflow interrupt for DTC2 + - description: Overflow interrupt for DTC3 + description: One interrupt for each DTC domain implemented must + be specified, in order. DTC0 is always present. + + arm,root-node: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Offset from PERIPHBASE of the configuration + discovery node (see TRM definition of ROOTNODEBASE). + +required: + - compatible + - reg + - interrupts + - arm,root-node + +additionalProperties: false + +examples: + - | + #include + #include + pmu@50000000 { + compatible = "arm,cmn-600"; + reg = <0x50000000 0x4000000>; + /* 4x2 mesh with one DTC, and CFG node at 0,1,1,0 */ + interrupts = ; + arm,root-node = <0x104000>; + }; +... diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt deleted file mode 100644 index 7822a806ea0a5..0000000000000 --- a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.txt +++ /dev/null @@ -1,22 +0,0 @@ -* Freescale(NXP) IMX8 DDR performance monitor - -Required properties: - -- compatible: should be one of: - "fsl,imx8-ddr-pmu" - "fsl,imx8m-ddr-pmu" - "fsl,imx8mp-ddr-pmu" - -- reg: physical address and size - -- interrupts: single interrupt - generated by the control block - -Example: - - ddr-pmu@5c020000 { - compatible = "fsl,imx8-ddr-pmu"; - reg = <0x5c020000 0x10000>; - interrupt-parent = <&gic>; - interrupts = ; - }; diff --git a/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml new file mode 100644 index 0000000000000..5aad9f4e0b2a6 --- /dev/null +++ b/Documentation/devicetree/bindings/perf/fsl-imx-ddr.yaml @@ -0,0 +1,49 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/fsl-imx-ddr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale(NXP) IMX8 DDR performance monitor + +maintainers: + - Frank Li + +properties: + compatible: + oneOf: + - enum: + - fsl,imx8-ddr-pmu + - fsl,imx8m-ddr-pmu + - fsl,imx8mp-ddr-pmu + - items: + - enum: + - fsl,imx8mm-ddr-pmu + - fsl,imx8mn-ddr-pmu + - fsl,imx8mq-ddr-pmu + - fsl,imx8mp-ddr-pmu + - const: fsl,imx8m-ddr-pmu + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + #include + + ddr-pmu@5c020000 { + compatible = "fsl,imx8-ddr-pmu"; + reg = <0x5c020000 0x10000>; + interrupt-parent = <&gic>; + interrupts = ; + }; diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml index 0d2557bb0bcc4..399ebde454095 100644 --- a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml @@ -63,6 +63,8 @@ then: required: - power-domains +additionalProperties: false + examples: - | phy@36000 { diff --git a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.txt b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.txt index ed47e5cd067e2..7c70f2ad99422 100644 --- a/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.txt +++ b/Documentation/devicetree/bindings/phy/fsl,imx8mq-usb-phy.txt @@ -1,7 +1,7 @@ * Freescale i.MX8MQ USB3 PHY binding Required properties: -- compatible: Should be "fsl,imx8mq-usb-phy" +- compatible: Should be "fsl,imx8mq-usb-phy" or "fsl,imx8mp-usb-phy" - #phys-cells: must be 0 (see phy-bindings.txt in this directory) - reg: The base address and length of the registers - clocks: phandles to the clocks for each clock listed in clock-names diff --git a/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml b/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml new file mode 100644 index 0000000000000..c2e073e261909 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml @@ -0,0 +1,60 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/hisilicon,hi3660-usb3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Hisilicon Kirin 960 USB PHY + +maintainers: + - Mauro Carvalho Chehab +description: |+ + Bindings for USB3 PHY on HiSilicon Kirin 960. + +properties: + compatible: + const: hisilicon,hi3660-usb-phy + + "#phy-cells": + const: 0 + + hisilicon,pericrg-syscon: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: phandle of syscon used to control iso refclk. + + hisilicon,pctrl-syscon: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: phandle of syscon used to control usb tcxo. + + hisilicon,eye-diagram-param: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Eye diagram for phy. + +required: + - compatible + - hisilicon,pericrg-syscon + - hisilicon,pctrl-syscon + - hisilicon,eye-diagram-param + - "#phy-cells" + +additionalProperties: false + +examples: + - | + bus { + #address-cells = <2>; + #size-cells = <2>; + + usb3_otg_bc: usb3_otg_bc@ff200000 { + compatible = "syscon", "simple-mfd"; + reg = <0x0 0xff200000 0x0 0x1000>; + + usb-phy { + compatible = "hisilicon,hi3660-usb-phy"; + #phy-cells = <0>; + hisilicon,pericrg-syscon = <&crg_ctrl>; + hisilicon,pctrl-syscon = <&pctrl>; + hisilicon,eye-diagram-param = <0x22466e4>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml index 77bb5309918e6..edd9d70a672a6 100644 --- a/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml +++ b/Documentation/devicetree/bindings/phy/intel,lgm-emmc-phy.yaml @@ -23,7 +23,9 @@ description: |+ properties: compatible: - const: intel,lgm-emmc-phy + oneOf: + - const: intel,lgm-emmc-phy + - const: intel,keembay-emmc-phy "#phy-cells": const: 0 @@ -34,6 +36,10 @@ properties: clocks: maxItems: 1 + clock-names: + items: + - const: emmcclk + required: - "#phy-cells" - compatible @@ -57,4 +63,13 @@ examples: #phy-cells = <0>; }; }; + + - | + phy@20290000 { + compatible = "intel,keembay-emmc-phy"; + reg = <0x20290000 0x54>; + clocks = <&emmc>; + clock-names = "emmcclk"; + #phy-cells = <0>; + }; ... diff --git a/Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml b/Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml new file mode 100644 index 0000000000000..ce62c0b94daf0 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/intel,lgm-usb-phy.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/intel,lgm-usb-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Intel LGM USB PHY Device Tree Bindings + +maintainers: + - Vadivel Murugan Ramuthevar + +properties: + compatible: + const: intel,lgm-usb-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + items: + - description: USB PHY and Host controller reset + - description: APB BUS reset + - description: General Hardware reset + + reset-names: + items: + - const: phy + - const: apb + - const: phy31 + + "#phy-cells": + const: 0 + +required: + - compatible + - clocks + - reg + - resets + - reset-names + - "#phy-cells" + +additionalProperties: false + +examples: + - | + usb-phy@e7e00000 { + compatible = "intel,lgm-usb-phy"; + reg = <0xe7e00000 0x10000>; + clocks = <&cgu0 153>; + resets = <&rcu 0x70 0x24>, + <&rcu 0x70 0x26>, + <&rcu 0x70 0x28>; + reset-names = "phy", "apb", "phy31"; + #phy-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml index 4071438be2ba2..e266ade53d87a 100644 --- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml +++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml @@ -4,11 +4,13 @@ $id: "http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#" $schema: "http://devicetree.org/meta-schemas/core.yaml#" -title: Cadence Torrent SD0801 PHY binding for DisplayPort +title: Cadence Torrent SD0801 PHY binding description: This binding describes the Cadence SD0801 PHY (also known as Torrent PHY) - hardware included with the Cadence MHDP DisplayPort controller. + hardware included with the Cadence MHDP DisplayPort controller. Torrent + PHY also supports multilink multiprotocol combinations including protocols + such as PCIe, USB, SGMII, QSGMII etc. maintainers: - Swapnil Jakhade @@ -49,13 +51,21 @@ properties: - const: dptx_phy resets: - maxItems: 1 - description: - Torrent PHY reset. - See Documentation/devicetree/bindings/reset/reset.txt + minItems: 1 + maxItems: 2 + items: + - description: Torrent PHY reset. + - description: Torrent APB reset. This is optional. + + reset-names: + minItems: 1 + maxItems: 2 + items: + - const: torrent_reset + - const: torrent_apb patternProperties: - '^phy@[0-7]+$': + '^phy@[0-3]$': type: object description: Each group of PHY lanes with a single master lane should be represented as a sub-node. @@ -63,6 +73,8 @@ patternProperties: reg: description: The master lane number. This is the lowest numbered lane in the lane group. + minimum: 0 + maximum: 3 resets: minItems: 1 @@ -78,15 +90,25 @@ patternProperties: Specifies the type of PHY for which the group of PHY lanes is used. Refer include/dt-bindings/phy/phy.h. Constants from the header should be used. $ref: /schemas/types.yaml#/definitions/uint32 - enum: [1, 2, 3, 4, 5, 6] + minimum: 1 + maximum: 9 cdns,num-lanes: description: - Number of DisplayPort lanes. + Number of lanes. $ref: /schemas/types.yaml#/definitions/uint32 - enum: [1, 2, 4] + enum: [1, 2, 3, 4] default: 4 + cdns,ssc-mode: + description: + Specifies the Spread Spectrum Clocking mode used. It can be NO_SSC, + EXTERNAL_SSC or INTERNAL_SSC. + Refer include/dt-bindings/phy/phy-cadence-torrent.h for the constants to be used. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + default: 0 + cdns,max-bit-rate: description: Maximum DisplayPort link bit rate to use, in Mbps @@ -99,6 +121,7 @@ patternProperties: - resets - "#phy-cells" - cdns,phy-type + - cdns,num-lanes additionalProperties: false @@ -111,6 +134,7 @@ required: - reg - reg-names - resets + - reset-names additionalProperties: false @@ -128,18 +152,56 @@ examples: <0xf0 0xfb030a00 0x0 0x00000040>; reg-names = "torrent_phy", "dptx_phy"; resets = <&phyrst 0>; + reset-names = "torrent_reset"; clocks = <&ref_clk>; clock-names = "refclk"; #address-cells = <1>; #size-cells = <0>; phy@0 { - reg = <0>; - resets = <&phyrst 1>, <&phyrst 2>, - <&phyrst 3>, <&phyrst 4>; - #phy-cells = <0>; - cdns,phy-type = ; - cdns,num-lanes = <4>; - cdns,max-bit-rate = <8100>; + reg = <0>; + resets = <&phyrst 1>, <&phyrst 2>, + <&phyrst 3>, <&phyrst 4>; + #phy-cells = <0>; + cdns,phy-type = ; + cdns,num-lanes = <4>; + cdns,max-bit-rate = <8100>; + }; + }; + }; + - | + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + + torrent-phy@f0fb500000 { + compatible = "cdns,torrent-phy"; + reg = <0xf0 0xfb500000 0x0 0x00100000>; + reg-names = "torrent_phy"; + resets = <&phyrst 0>, <&phyrst 1>; + reset-names = "torrent_reset", "torrent_apb"; + clocks = <&ref_clk>; + clock-names = "refclk"; + #address-cells = <1>; + #size-cells = <0>; + phy@0 { + reg = <0>; + resets = <&phyrst 2>, <&phyrst 3>; + #phy-cells = <0>; + cdns,phy-type = ; + cdns,num-lanes = <2>; + cdns,ssc-mode = ; + }; + + phy@2 { + reg = <2>; + resets = <&phyrst 4>; + #phy-cells = <0>; + cdns,phy-type = ; + cdns,num-lanes = <1>; + cdns,ssc-mode = ; }; }; }; diff --git a/Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt b/Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt deleted file mode 100644 index e88ba7d92dcbe..0000000000000 --- a/Documentation/devicetree/bindings/phy/phy-hi3660-usb3.txt +++ /dev/null @@ -1,26 +0,0 @@ -Hisilicon hi3660 USB PHY ------------------------ - -Required properties: -- compatible: should be "hisilicon,hi3660-usb-phy" -- #phy-cells: must be 0 -- hisilicon,pericrg-syscon: phandle of syscon used to control phy. -- hisilicon,pctrl-syscon: phandle of syscon used to control phy. -- hisilicon,eye-diagram-param: parameter set for phy -Refer to phy/phy-bindings.txt for the generic PHY binding properties - -This is a subnode of usb3_otg_bc register node. - -Example: - usb3_otg_bc: usb3_otg_bc@ff200000 { - compatible = "syscon", "simple-mfd"; - reg = <0x0 0xff200000 0x0 0x1000>; - - usb-phy { - compatible = "hisilicon,hi3660-usb-phy"; - #phy-cells = <0>; - hisilicon,pericrg-syscon = <&crg_ctrl>; - hisilicon,pctrl-syscon = <&pctrl>; - hisilicon,eye-diagram-param = <0x22466e4>; - }; - }; diff --git a/Documentation/devicetree/bindings/phy/phy-stih41x-usb.txt b/Documentation/devicetree/bindings/phy/phy-stih41x-usb.txt deleted file mode 100644 index 744b4809542ed..0000000000000 --- a/Documentation/devicetree/bindings/phy/phy-stih41x-usb.txt +++ /dev/null @@ -1,24 +0,0 @@ -STMicroelectronics STiH41x USB PHY binding ------------------------------------------- - -This file contains documentation for the usb phy found in STiH415/6 SoCs from -STMicroelectronics. - -Required properties: -- compatible : should be "st,stih416-usb-phy" or "st,stih415-usb-phy" -- st,syscfg : should be a phandle of the syscfg node -- clock-names : must contain "osc_phy" -- clocks : must contain an entry for each name in clock-names. -See: Documentation/devicetree/bindings/clock/clock-bindings.txt -- #phy-cells : must be 0 for this phy -See: Documentation/devicetree/bindings/phy/phy-bindings.txt - -Example: - -usb2_phy: usb2phy@0 { - compatible = "st,stih416-usb-phy"; - #phy-cells = <0>; - st,syscfg = <&syscfg_rear>; - clocks = <&clk_sysin>; - clock-names = "osc_phy"; -}; diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-hs.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-hs.yaml index 23887ebe08fd2..17f132ce55160 100644 --- a/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-hs.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-hs.yaml @@ -42,6 +42,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-ss.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-ss.yaml index fa30c24b44059..17fd7f6b83bb9 100644 --- a/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-ss.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,ipq806x-usb-phy-ss.yaml @@ -60,6 +60,8 @@ required: - clocks - clock-names +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml index ef8ae9f73092a..33974ad10afe4 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml @@ -13,17 +13,21 @@ maintainers: properties: compatible: enum: + - qcom,sc7180-qmp-usb3-dp-phy - qcom,sc7180-qmp-usb3-phy + - qcom,sdm845-qmp-usb3-dp-phy - qcom,sdm845-qmp-usb3-phy reg: items: - - description: Address and length of PHY's common serdes block. + - description: Address and length of PHY's USB serdes block. - description: Address and length of the DP_COM control block. + - description: Address and length of PHY's DP serdes block. reg-names: items: - - const: reg-base + - const: usb - const: dp_com + - const: dp "#clock-cells": enum: [ 1, 2 ] @@ -74,16 +78,74 @@ properties: #Required nodes: patternProperties: - "^phy@[0-9a-f]+$": + "^usb3-phy@[0-9a-f]+$": type: object description: - Each device node of QMP phy is required to have as many child nodes as - the number of lanes the PHY has. + The USB3 PHY. + + properties: + reg: + items: + - description: Address and length of TX. + - description: Address and length of RX. + - description: Address and length of PCS. + - description: Address and length of TX2. + - description: Address and length of RX2. + - description: Address and length of pcs_misc. + + clocks: + items: + - description: pipe clock + + clock-names: + items: + - const: pipe0 + + clock-output-names: + items: + - const: usb3_phy_pipe_clk_src + + '#clock-cells': + const: 0 + + '#phy-cells': + const: 0 + + required: + - reg + - clocks + - clock-names + - '#clock-cells' + - '#phy-cells' + + "^dp-phy@[0-9a-f]+$": + type: object + description: + The DP PHY. + + properties: + reg: + items: + - description: Address and length of TX. + - description: Address and length of RX. + - description: Address and length of PCS. + - description: Address and length of TX2. + - description: Address and length of RX2. + + '#clock-cells': + const: 1 + + '#phy-cells': + const: 0 + + required: + - reg + - '#clock-cells' + - '#phy-cells' required: - compatible - reg - - reg-names - "#clock-cells" - "#address-cells" - "#size-cells" @@ -101,14 +163,15 @@ examples: - | #include usb_1_qmpphy: phy-wrapper@88e9000 { - compatible = "qcom,sdm845-qmp-usb3-phy"; + compatible = "qcom,sdm845-qmp-usb3-dp-phy"; reg = <0x088e9000 0x18c>, - <0x088e8000 0x10>; - reg-names = "reg-base", "dp_com"; + <0x088e8000 0x10>, + <0x088ea000 0x40>; + reg-names = "usb", "dp_com", "dp"; #clock-cells = <1>; #address-cells = <1>; #size-cells = <1>; - ranges = <0x0 0x088e9000 0x1000>; + ranges = <0x0 0x088e9000 0x2000>; clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>, <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, @@ -123,7 +186,7 @@ examples: vdda-phy-supply = <&vdda_usb2_ss_1p2>; vdda-pll-supply = <&vdda_usb2_ss_core>; - phy@200 { + usb3-phy@200 { reg = <0x200 0x128>, <0x400 0x200>, <0xc00 0x218>, @@ -136,4 +199,14 @@ examples: clock-names = "pipe0"; clock-output-names = "usb3_phy_pipe_clk_src"; }; + + dp-phy@88ea200 { + reg = <0xa200 0x200>, + <0xa400 0x200>, + <0xaa00 0x200>, + <0xa600 0x200>, + <0xa800 0x200>; + #clock-cells = <1>; + #phy-cells = <0>; + }; }; diff --git a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml index ccda92859eca8..d457fb6a47794 100644 --- a/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,qusb2-phy.yaml @@ -158,6 +158,7 @@ required: - vdda-phy-dpdm-supply - resets +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml b/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml index 1118fe69b6113..3e7191b168fb0 100644 --- a/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom-usb-ipq4019-phy.yaml @@ -36,6 +36,8 @@ required: - reset-names - "#phy-cells" +additionalProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml new file mode 100644 index 0000000000000..bab2ff4d9dc98 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml @@ -0,0 +1,76 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/socionext,uniphier-ahci-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier AHCI PHY + +description: | + This describes the deivcetree bindings for PHY interfaces built into + AHCI controller implemented on Socionext UniPhier SoCs. + +maintainers: + - Kunihiko Hayashi + +properties: + compatible: + enum: + - socionext,uniphier-pxs2-ahci-phy + - socionext,uniphier-pxs3-ahci-phy + + reg: + description: PHY register region (offset and length) + + "#phy-cells": + const: 0 + + clocks: + maxItems: 2 + + clock-names: + oneOf: + - items: # for PXs2 + - const: link + - items: # for others + - const: link + - const: phy + + resets: + maxItems: 2 + + reset-names: + items: + - const: link + - const: phy + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + - resets + - reset-names + +additionalProperties: false + +examples: + - | + ahci-glue@65700000 { + compatible = "socionext,uniphier-pxs3-ahci-glue", + "simple-mfd"; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x65700000 0x100>; + + ahci_phy: phy@10 { + compatible = "socionext,uniphier-pxs3-ahci-phy"; + reg = <0x10 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 28>, <&sys_clk 30>; + reset-names = "link", "phy"; + resets = <&sys_rst 28>, <&sys_rst 30>; + }; + }; diff --git a/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml new file mode 100644 index 0000000000000..15207ca9548f2 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/ti,omap-usb2.yaml @@ -0,0 +1,74 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/ti,omap-usb2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: OMAP USB2 PHY + +maintainers: + - Kishon Vijay Abraham I + - Roger Quadros + +properties: + compatible: + oneOf: + - items: + - enum: + - ti,dra7x-usb2 + - ti,dra7x-usb2-phy2 + - ti,am654-usb2 + - enum: + - ti,omap-usb2 + - items: + - const: ti,am437x-usb2 + - items: + - const: ti,omap-usb2 + + reg: + maxItems: 1 + + "#phy-cells": + const: 0 + + clocks: + minItems: 1 + items: + - description: wakeup clock + - description: reference clock + + clock-names: + minItems: 1 + items: + - const: wkupclk + - const: refclk + + syscon-phy-power: + $ref: /schemas/types.yaml#definitions/phandle-array + description: + phandle/offset pair. Phandle to the system control module and + register offset to power on/off the PHY. + + ctrl-module: + $ref: /schemas/types.yaml#definitions/phandle + description: + (deprecated) phandle of the control module used by PHY driver + to power on the PHY. Use syscon-phy-power instead. + +required: + - compatible + - reg + - "#phy-cells" + - clocks + - clock-names + +examples: + - | + usb0_phy: phy@4100000 { + compatible = "ti,am654-usb2", "ti,omap-usb2"; + reg = <0x4100000 0x54>; + syscon-phy-power = <&scm_conf 0x4000>; + clocks = <&k3_clks 151 0>, <&k3_clks 151 1>; + clock-names = "wkupclk", "refclk"; + #phy-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml index 5ffc95c62909f..c33e9bc795217 100644 --- a/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml +++ b/Documentation/devicetree/bindings/phy/ti,phy-j721e-wiz.yaml @@ -45,9 +45,15 @@ properties: ranges: true assigned-clocks: + minItems: 1 maxItems: 2 assigned-clock-parents: + minItems: 1 + maxItems: 2 + + assigned-clock-rates: + minItems: 1 maxItems: 2 typec-dir-gpios: @@ -119,9 +125,10 @@ patternProperties: logic. properties: clocks: + minItems: 2 maxItems: 4 - description: Phandle to four clock nodes representing the inputs to - refclk_dig + description: Phandle to two (Torrent) or four (Sierra) clock nodes representing + the inputs to refclk_dig "#clock-cells": const: 0 @@ -203,7 +210,7 @@ examples: }; refclk-dig { - clocks = <&k3_clks 292 11>, <&k3_clks 292 0>, + clocks = <&k3_clks 292 11>, <&k3_clks 292 0>, <&dummy_cmn_refclk>, <&dummy_cmn_refclk1>; #clock-cells = <0>; assigned-clocks = <&wiz0_refclk_dig>; diff --git a/Documentation/devicetree/bindings/phy/ti-phy.txt b/Documentation/devicetree/bindings/phy/ti-phy.txt index 8f93c3b694a74..60c9d0ac75e69 100644 --- a/Documentation/devicetree/bindings/phy/ti-phy.txt +++ b/Documentation/devicetree/bindings/phy/ti-phy.txt @@ -27,43 +27,6 @@ omap_control_usb: omap-control-usb@4a002300 { reg-names = "otghs_control"; }; -OMAP USB2 PHY - -Required properties: - - compatible: Should be "ti,omap-usb2" - Should be "ti,dra7x-usb2" for the 1st instance of USB2 PHY on - DRA7x - Should be "ti,dra7x-usb2-phy2" for the 2nd instance of USB2 PHY - in DRA7x - Should be "ti,am654-usb2" for the USB2 PHYs on AM654. - - reg : Address and length of the register set for the device. - - #phy-cells: determine the number of cells that should be given in the - phandle while referencing this phy. - - clocks: a list of phandles and clock-specifier pairs, one for each entry in - clock-names. - - clock-names: should include: - * "wkupclk" - wakeup clock. - * "refclk" - reference clock (optional). - -Deprecated properties: - - ctrl-module : phandle of the control module used by PHY driver to power on - the PHY. - -Recommended properies: -- syscon-phy-power : phandle/offset pair. Phandle to the system control - module and the register offset to power on/off the PHY. - -This is usually a subnode of ocp2scp to which it is connected. - -usb2phy@4a0ad080 { - compatible = "ti,omap-usb2"; - reg = <0x4a0ad080 0x58>; - ctrl-module = <&omap_control_usb>; - #phy-cells = <0>; - clocks = <&usb_phy_cm_clk32k>, <&usb_otg_ss_refclk960m>; - clock-names = "wkupclk", "refclk"; -}; - TI PIPE3 PHY Required properties: diff --git a/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml new file mode 100644 index 0000000000000..33391d30c00c5 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/actions,s500-pinctrl.yaml @@ -0,0 +1,240 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/actions,s500-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi S500 SoC pinmux & GPIO controller + +maintainers: + - Manivannan Sadhasivam + - Cristian Ciocaltea + +description: | + Pinmux & GPIO controller manages pin multiplexing & configuration including + GPIO function selection & GPIO attributes configuration. Please refer to + pinctrl-bindings.txt in this directory for common binding part and usage. + +properties: + compatible: + const: actions,s500-pinctrl + + reg: + items: + - description: GPIO Output + GPIO Input + GPIO Data + - description: Multiplexing Control + - description: PAD Pull Control + PAD Schmitt Trigger Enable + PAD Control + - description: PAD Drive Capacity Select + minItems: 1 + maxItems: 4 + + clocks: + maxItems: 1 + + gpio-controller: true + + gpio-ranges: + maxItems: 1 + + '#gpio-cells': + description: + Specifies the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + interrupt-controller: true + + '#interrupt-cells': + description: + Specifies the pin number and flags, as defined in + include/dt-bindings/interrupt-controller/irq.h + const: 2 + + interrupts: + description: + One interrupt per each of the 5 GPIO ports supported by the controller, + sorted by port number ascending order. + minItems: 5 + maxItems: 5 + +patternProperties: + '-pins$': + type: object + patternProperties: + '^(.*-)?pinmux$': + type: object + description: + Pinctrl node's client devices specify pin muxes using subnodes, + which in turn use the standard properties below. + $ref: pinmux-node.yaml# + + properties: + groups: + description: + List of gpio pin groups affected by the functions specified in + this subnode. + items: + oneOf: + - enum: [lcd0_d18_mfp, rmii_crs_dv_mfp, rmii_txd0_mfp, + rmii_txd1_mfp, rmii_txen_mfp, rmii_rxen_mfp, rmii_rxd1_mfp, + rmii_rxd0_mfp, rmii_ref_clk_mfp, i2s_d0_mfp, i2s_pcm1_mfp, + i2s0_pcm0_mfp, i2s1_pcm0_mfp, i2s_d1_mfp, ks_in2_mfp, + ks_in1_mfp, ks_in0_mfp, ks_in3_mfp, ks_out0_mfp, + ks_out1_mfp, ks_out2_mfp, lvds_o_pn_mfp, dsi_dn0_mfp, + dsi_dp2_mfp, lcd0_d17_mfp, dsi_dp3_mfp, dsi_dn3_mfp, + dsi_dp0_mfp, lvds_ee_pn_mfp, spi0_i2c_pcm_mfp, + spi0_i2s_pcm_mfp, dsi_dnp1_cp_mfp, lvds_e_pn_mfp, + dsi_dn2_mfp, uart2_rtsb_mfp, uart2_ctsb_mfp, uart3_rtsb_mfp, + uart3_ctsb_mfp, sd0_d0_mfp, sd0_d1_mfp, sd0_d2_d3_mfp, + sd1_d0_d3_mfp, sd0_cmd_mfp, sd0_clk_mfp, sd1_cmd_mfp, + uart0_rx_mfp, clko_25m_mfp, csi_cn_cp_mfp, sens0_ckout_mfp, + uart0_tx_mfp, i2c0_mfp, csi_dn_dp_mfp, sen0_pclk_mfp, + pcm1_in_mfp, pcm1_clk_mfp, pcm1_sync_mfp, pcm1_out_mfp, + dnand_data_wr_mfp, dnand_acle_ce0_mfp, nand_ceb2_mfp, + nand_ceb3_mfp] + minItems: 1 + maxItems: 32 + + function: + description: + Specify the alternative function to be configured for the + given gpio pin groups. + enum: [nor, eth_rmii, eth_smii, spi0, spi1, spi2, spi3, sens0, + sens1, uart0, uart1, uart2, uart3, uart4, uart5, uart6, i2s0, + i2s1, pcm1, pcm0, ks, jtag, pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, + p0, sd0, sd1, sd2, i2c0, i2c1, i2c3, dsi, lvds, usb30, clko_25m, + mipi_csi, nand, spdif, ts, lcd0] + + required: + - groups + - function + + additionalProperties: false + + '^(.*-)?pinconf$': + type: object + description: + Pinctrl node's client devices specify pin configurations using + subnodes, which in turn use the standard properties below. + $ref: pincfg-node.yaml# + + properties: + groups: + description: + List of gpio pin groups affected by the drive-strength property + specified in this subnode. + items: + oneOf: + - enum: [sirq_drv, rmii_txd01_txen_drv, rmii_rxer_drv, + rmii_crs_drv, rmii_rxd10_drv, rmii_ref_clk_drv, + smi_mdc_mdio_drv, i2s_d0_drv, i2s_bclk0_drv, i2s3_drv, + i2s13_drv, pcm1_drv, ks_in_drv, ks_out_drv, lvds_all_drv, + lcd_dsi_drv, dsi_drv, sd0_d0_d3_drv, sd1_d0_d3_drv, + sd0_cmd_drv, sd0_clk_drv, sd1_cmd_drv, sd1_clk_drv, + spi0_all_drv, uart0_rx_drv, uart0_tx_drv, uart2_all_drv, + i2c0_all_drv, i2c12_all_drv, sens0_pclk_drv, + sens0_ckout_drv, uart3_all_drv] + minItems: 1 + maxItems: 32 + + pins: + description: + List of gpio pins affected by the bias-pull-* and + input-schmitt-* properties specified in this subnode. + items: + oneOf: + - enum: [dnand_dqs, dnand_dqsn, eth_txd0, eth_txd1, eth_txen, + eth_rxer, eth_crs_dv, eth_rxd1, eth_rxd0, eth_ref_clk, + eth_mdc, eth_mdio, sirq0, sirq1, sirq2, i2s_d0, i2s_bclk0, + i2s_lrclk0, i2s_mclk0, i2s_d1, i2s_bclk1, i2s_lrclk1, + i2s_mclk1, ks_in0, ks_in1, ks_in2, ks_in3, ks_out0, ks_out1, + ks_out2, lvds_oep, lvds_oen, lvds_odp, lvds_odn, lvds_ocp, + lvds_ocn, lvds_obp, lvds_obn, lvds_oap, lvds_oan, lvds_eep, + lvds_een, lvds_edp, lvds_edn, lvds_ecp, lvds_ecn, lvds_ebp, + lvds_ebn, lvds_eap, lvds_ean, lcd0_d18, lcd0_d17, dsi_dp3, + dsi_dn3, dsi_dp1, dsi_dn1, dsi_cp, dsi_cn, dsi_dp0, dsi_dn0, + dsi_dp2, dsi_dn2, sd0_d0, sd0_d1, sd0_d2, sd0_d3, sd1_d0, + sd1_d1, sd1_d2, sd1_d3, sd0_cmd, sd0_clk, sd1_cmd, sd1_clk, + spi0_sclk, spi0_ss, spi0_miso, spi0_mosi, uart0_rx, + uart0_tx, i2c0_sclk, i2c0_sdata, sensor0_pclk, + sensor0_ckout, dnand_ale, dnand_cle, dnand_ceb0, dnand_ceb1, + dnand_ceb2, dnand_ceb3, uart2_rx, uart2_tx, uart2_rtsb, + uart2_ctsb, uart3_rx, uart3_tx, uart3_rtsb, uart3_ctsb, + pcm1_in, pcm1_clk, pcm1_sync, pcm1_out, i2c1_sclk, + i2c1_sdata, i2c2_sclk, i2c2_sdata, csi_dn0, csi_dp0, + csi_dn1, csi_dp1, csi_dn2, csi_dp2, csi_dn3, csi_dp3, + csi_cn, csi_cp, dnand_d0, dnand_d1, dnand_d2, dnand_d3, + dnand_d4, dnand_d5, dnand_d6, dnand_d7, dnand_rb, dnand_rdb, + dnand_rdbn, dnand_wrb, porb, clko_25m, bsel, pkg0, pkg1, + pkg2, pkg3] + minItems: 1 + maxItems: 64 + + bias-pull-up: true + bias-pull-down: true + + drive-strength: + description: + Selects the drive strength for the specified pins, in mA. + enum: [2, 4, 8, 12] + + input-schmitt-enable: true + input-schmitt-disable: true + + additionalProperties: false + + additionalProperties: false + +required: + - compatible + - reg + - clocks + - gpio-controller + - gpio-ranges + - '#gpio-cells' + - interrupt-controller + - '#interrupt-cells' + - interrupts + +additionalProperties: false + +examples: + - | + #include + pinctrl: pinctrl@b01b0000 { + compatible = "actions,s500-pinctrl"; + reg = <0xb01b0000 0x40>, <0xb01b0040 0x10>, + <0xb01b0060 0x18>, <0xb01b0080 0xc>; + clocks = <&cmu 55>; + gpio-controller; + gpio-ranges = <&pinctrl 0 0 132>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = , + , + , + , + ; + + mmc0_pins: mmc0-pins { + pinmux { + groups = "sd0_d0_mfp", "sd0_d1_mfp", "sd0_d2_d3_mfp", + "sd0_cmd_mfp", "sd0_clk_mfp"; + function = "sd0"; + }; + + drv-pinconf { + groups = "sd0_d0_d3_drv", "sd0_cmd_drv", "sd0_clk_drv"; + drive-strength = <8>; + }; + + bias-pinconf { + pins = "sd0_d0", "sd0_d1", "sd0_d2", + "sd0_d3", "sd0_cmd"; + bias-pull-up; + }; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml index 7556be6e27542..5240487dfe50e 100644 --- a/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/allwinner,sun4i-a10-pinctrl.yaml @@ -48,6 +48,8 @@ properties: - allwinner,sun9i-a80-r-pinctrl - allwinner,sun50i-a64-pinctrl - allwinner,sun50i-a64-r-pinctrl + - allwinner,sun50i-a100-pinctrl + - allwinner,sun50i-a100-r-pinctrl - allwinner,sun50i-h5-pinctrl - allwinner,sun50i-h6-pinctrl - allwinner,sun50i-h6-r-pinctrl @@ -59,7 +61,7 @@ properties: interrupts: minItems: 1 - maxItems: 5 + maxItems: 7 description: One interrupt per external interrupt bank supported on the controller, sorted by bank number ascending order. @@ -143,6 +145,18 @@ allOf: # boards are defining it at the moment so it would generate a lot of # warnings. + - if: + properties: + compatible: + enum: + - allwinner,sun50i-a100-pinctrl + + then: + properties: + interrupts: + minItems: 7 + maxItems: 7 + - if: properties: compatible: @@ -155,62 +169,75 @@ allOf: minItems: 5 maxItems: 5 - else: - if: - properties: - compatible: - enum: - - allwinner,sun6i-a31-pinctrl - - allwinner,sun6i-a31s-pinctrl - - allwinner,sun50i-h6-pinctrl - - then: - properties: - interrupts: - minItems: 4 - maxItems: 4 - - else: - if: - properties: - compatible: - enum: - - allwinner,sun8i-a23-pinctrl - - allwinner,sun8i-a83t-pinctrl - - allwinner,sun50i-a64-pinctrl - - allwinner,sun50i-h5-pinctrl - - allwinner,suniv-f1c100s-pinctrl - - then: - properties: - interrupts: - minItems: 3 - maxItems: 3 - - else: - if: - properties: - compatible: - enum: - - allwinner,sun6i-a31-r-pinctrl - - allwinner,sun8i-a33-pinctrl - - allwinner,sun8i-h3-pinctrl - - allwinner,sun8i-v3-pinctrl - - allwinner,sun8i-v3s-pinctrl - - allwinner,sun9i-a80-r-pinctrl - - allwinner,sun50i-h6-r-pinctrl - - then: - properties: - interrupts: - minItems: 2 - maxItems: 2 - - else: - properties: - interrupts: - minItems: 1 - maxItems: 1 + - if: + properties: + compatible: + enum: + - allwinner,sun6i-a31-pinctrl + - allwinner,sun6i-a31s-pinctrl + - allwinner,sun50i-h6-pinctrl + + then: + properties: + interrupts: + minItems: 4 + maxItems: 4 + + - if: + properties: + compatible: + enum: + - allwinner,sun8i-a23-pinctrl + - allwinner,sun8i-a83t-pinctrl + - allwinner,sun50i-a64-pinctrl + - allwinner,sun50i-h5-pinctrl + - allwinner,suniv-f1c100s-pinctrl + + then: + properties: + interrupts: + minItems: 3 + maxItems: 3 + + - if: + properties: + compatible: + enum: + - allwinner,sun6i-a31-r-pinctrl + - allwinner,sun8i-a33-pinctrl + - allwinner,sun8i-h3-pinctrl + - allwinner,sun8i-v3-pinctrl + - allwinner,sun8i-v3s-pinctrl + - allwinner,sun9i-a80-r-pinctrl + - allwinner,sun50i-h6-r-pinctrl + + then: + properties: + interrupts: + minItems: 2 + maxItems: 2 + + - if: + properties: + compatible: + enum: + - allwinner,sun4i-a10-pinctrl + - allwinner,sun5i-a10s-pinctrl + - allwinner,sun5i-a13-pinctrl + - allwinner,sun7i-a20-pinctrl + - allwinner,sun8i-a23-r-pinctrl + - allwinner,sun8i-a83t-r-pinctrl + - allwinner,sun8i-h3-r-pinctrl + - allwinner,sun8i-r40-pinctrl + - allwinner,sun50i-a64-r-pinctrl + - allwinner,sun50i-a100-r-pinctrl + - nextthing,gr8-pinctrl + + then: + properties: + interrupts: + minItems: 1 + maxItems: 1 additionalProperties: false diff --git a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt index 04d16fb69eb7c..265015bc0603d 100644 --- a/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/atmel,at91-pio4-pinctrl.txt @@ -4,7 +4,9 @@ The Atmel PIO4 controller is used to select the function of a pin and to configure it. Required properties: -- compatible: "atmel,sama5d2-pinctrl". +- compatible: + "atmel,sama5d2-pinctrl" + "microchip,sama7g5-pinctrl" - reg: base address and length of the PIO controller. - interrupts: interrupt outputs from the controller, one for each bank. - interrupt-controller: mark the device node as an interrupt controller. diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml b/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml index 420d74856032f..a07dd197176aa 100644 --- a/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml +++ b/Documentation/devicetree/bindings/pinctrl/cirrus,lochnagar.yaml @@ -188,3 +188,5 @@ required: - gpio-ranges - pinctrl-0 - pinctrl-names + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml b/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml index 6bfc25d0e1b33..4cb174bf31ffa 100644 --- a/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml +++ b/Documentation/devicetree/bindings/pinctrl/cirrus,madera.yaml @@ -120,3 +120,5 @@ properties: required: - pinctrl-0 - pinctrl-names + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml b/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml index 13b7ab9dd6d51..71ed0a9def84e 100644 --- a/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml @@ -138,3 +138,5 @@ properties: and the delay before latching a value to an output pin. Typically indicates how many double-inverters are used to delay the signal. + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt index bf9b07016c873..fbdd1a716a1e1 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-atlas7.txt @@ -60,7 +60,7 @@ For example, pinctrl might have properties like the following: Please refer to pinctrl-bindings.txt in this directory for details of the common pinctrl bindings used by client devices. -SiRFatlas7's pinmux nodes act as a container for an abitrary number of subnodes. +SiRFatlas7's pinmux nodes act as a container for an arbitrary number of subnodes. Each of these subnodes represents some desired configuration for a group of pins. Required subnode-properties: diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt index 205be98ae078e..931a18cd1e238 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt65xx.txt @@ -10,6 +10,7 @@ Required properties: "mediatek,mt7623-pinctrl", compatible with mt7623 pinctrl. "mediatek,mt8127-pinctrl", compatible with mt8127 pinctrl. "mediatek,mt8135-pinctrl", compatible with mt8135 pinctrl. + "mediatek,mt8167-pinctrl", compatible with mt8167 pinctrl. "mediatek,mt8173-pinctrl", compatible with mt8173 pinctrl. "mediatek,mt8516-pinctrl", compatible with mt8516 pinctrl. - pins-are-numbered: Specify the subnodes are using numbered pinmux to diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml new file mode 100644 index 0000000000000..5556def6b99bc --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml @@ -0,0 +1,155 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8192.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek MT8192 Pin Controller + +maintainers: + - Sean Wang + +description: | + The Mediatek's Pin controller is used to control SoC pins. + +properties: + compatible: + const: mediatek,mt8192-pinctrl + + gpio-controller: true + + '#gpio-cells': + description: | + Number of cells in GPIO specifier. Since the generic GPIO binding is used, + the amount of cells must be specified as 2. See the below + mentioned gpio binding representation for description of particular cells. + const: 2 + + gpio-ranges: + description: gpio valid number range. + maxItems: 1 + + reg: + description: | + Physical address base for gpio base registers. There are 11 GPIO + physical address base in mt8192. + maxItems: 11 + + reg-names: + description: | + Gpio base register names. + maxItems: 11 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + interrupts: + description: The interrupt outputs to sysirq. + maxItems: 1 + +#PIN CONFIGURATION NODES +patternProperties: + '^pins': + type: object + description: | + A pinctrl node should contain at least one subnodes representing the + pinctrl groups available on the machine. Each subnode will list the + pins it needs, and how they should be configured, with regard to muxer + configuration, pullups, drive strength, input enable/disable and + input schmitt. + An example of using macro: + pincontroller { + /* GPIO0 set as multifunction GPIO0 */ + state_0_node_a { + pinmux = ; + }; + /* GPIO1 set as multifunction PWM */ + state_0_node_b { + pinmux = ; + }; + }; + $ref: "pinmux-node.yaml" + + properties: + pinmux: + description: | + Integer array, represents gpio pin number and mux setting. + Supported pin number and mux varies for different SoCs, and are defined + as macros in dt-bindings/pinctrl/-pinfunc.h directly. + + drive-strength: + description: | + It can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See + dt-bindings/pinctrl/mt65xx.h. It can only support 2/4/6/8/10/12/14/16mA in mt8192. + enum: [2, 4, 6, 8, 10, 12, 14, 16] + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + output-high: true + + output-low: true + + input-enable: true + + input-disable: true + + input-schmitt-enable: true + + input-schmitt-disable: true + + required: + - pinmux + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include + #include + pio: pinctrl@10005000 { + compatible = "mediatek,mt8192-pinctrl"; + reg = <0x10005000 0x1000>, + <0x11c20000 0x1000>, + <0x11d10000 0x1000>, + <0x11d30000 0x1000>, + <0x11d40000 0x1000>, + <0x11e20000 0x1000>, + <0x11e70000 0x1000>, + <0x11ea0000 0x1000>, + <0x11f20000 0x1000>, + <0x11f30000 0x1000>, + <0x1000b000 0x1000>; + reg-names = "iocfg0", "iocfg_rm", "iocfg_bm", + "iocfg_bl", "iocfg_br", "iocfg_lm", + "iocfg_lb", "iocfg_rt", "iocfg_lt", + "iocfg_tl", "eint"; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pio 0 0 220>; + interrupt-controller; + interrupts = ; + #interrupt-cells = <2>; + + pins { + pinmux = ; + output-low; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt index e705acd3612cc..f903eb4471f87 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-single.txt @@ -94,16 +94,23 @@ pinctrl-single,bit-per-mux is set), and uses the common pinctrl bindings as specified in the pinctrl-bindings.txt document in this directory. The pin configuration nodes for pinctrl-single are specified as pinctrl -register offset and value pairs using pinctrl-single,pins. Only the bits -specified in pinctrl-single,function-mask are updated. For example, setting -a pin for a device could be done with: +register offset and values using pinctrl-single,pins. Only the bits specified +in pinctrl-single,function-mask are updated. + +When #pinctrl-cells = 1, then setting a pin for a device could be done with: pinctrl-single,pins = <0xdc 0x118>; -Where 0xdc is the offset from the pinctrl register base address for the -device pinctrl register, and 0x118 contains the desired value of the -pinctrl register. See the device example and static board pins example -below for more information. +Where 0xdc is the offset from the pinctrl register base address for the device +pinctrl register, and 0x118 contains the desired value of the pinctrl register. + +When #pinctrl-cells = 2, then setting a pin for a device could be done with: + + pinctrl-single,pins = <0xdc 0x30 0x07>; + +Where 0x30 is the pin configuration value and 0x07 is the pin mux mode value. +These two values are OR'd together to produce the value stored at offset 0xdc. +See the device example and static board pins example below for more information. In case when one register changes more than one pin's mux the pinctrl-single,bits need to be used which takes three parameters: diff --git a/Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml b/Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml index ef8877ddb1ebf..551df3d9b8090 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pinmux-node.yaml @@ -129,3 +129,5 @@ properties: pinctrl-pin-array: $ref: /schemas/types.yaml#/definitions/uint32-array + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt index 0861afeccfc9e..97858a7c07a27 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq4019-pinctrl.txt @@ -26,7 +26,7 @@ Please refer to pinctrl-bindings.txt in this directory for details of the common pinctrl bindings used by client devices, including the meaning of the phrase "pin configuration node". -The pin configuration nodes act as a container for an abitrary number of +The pin configuration nodes act as a container for an arbitrary number of subnodes. Each of these subnodes represents some desired configuration for a pin, a group, or a list of pins or groups. This configuration can include the mux function to select on those pin(s)/group(s), and various pin configuration diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml new file mode 100644 index 0000000000000..1f0f5757f9e17 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/qcom,msm8226-pinctrl.yaml @@ -0,0 +1,132 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/qcom,msm8226-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm Technologies, Inc. MSM8226 TLMM block + +maintainers: + - Bjorn Andersson + +description: | + This binding describes the Top Level Mode Multiplexer block found in the + MSM8226 platform. + +properties: + compatible: + const: qcom,msm8226-pinctrl + + reg: + description: Specifies the base address and size of the TLMM register space + maxItems: 1 + + interrupts: + description: Specifies the TLMM summary IRQ + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + description: Specifies the PIN numbers and Flags, as defined in + include/dt-bindings/interrupt-controller/irq.h + const: 2 + + gpio-controller: true + + '#gpio-cells': + description: Specifying the pin number and flags, as defined in + include/dt-bindings/gpio/gpio.h + const: 2 + + gpio-ranges: + maxItems: 1 + + gpio-reserved-ranges: + maxItems: 1 + +#PIN CONFIGURATION NODES +patternProperties: + '-pins$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + $ref: "/schemas/pinctrl/pincfg-node.yaml" + + properties: + pins: + description: + List of gpio pins affected by the properties specified in this + subnode. + items: + oneOf: + - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-6])$" + - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ] + minItems: 1 + maxItems: 36 + + function: + description: + Specify the alternative function to be configured for the specified + pins. Functions are only valid for gpio pins. + enum: [ gpio, cci_i2c0, blsp_uim1, blsp_uim2, blsp_uim3, blsp_uim5, + blsp_i2c1, blsp_i2c2, blsp_i2c3, blsp_i2c5, blsp_spi1, + blsp_spi2, blsp_spi3, blsp_spi5, blsp_uart1, blsp_uart2, + blsp_uart3, blsp_uart5, cam_mclk0, cam_mclk1, wlan ] + + drive-strength: + enum: [2, 4, 6, 8, 10, 12, 14, 16] + default: 2 + description: + Selects the drive strength for the specified pins, in mA. + + bias-pull-down: true + + bias-pull-up: true + + bias-disable: true + + output-high: true + + output-low: true + + required: + - pins + - function + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - interrupt-controller + - '#interrupt-cells' + - gpio-controller + - '#gpio-cells' + - gpio-ranges + +additionalProperties: false + +examples: + - | + #include + msmgpio: pinctrl@fd510000 { + compatible = "qcom,msm8226-pinctrl"; + reg = <0xfd510000 0x4000>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&msmgpio 0 0 117>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = ; + + serial-pins { + pins = "gpio8", "gpio9"; + function = "blsp_uart3"; + drive-strength = <8>; + bias-disable; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt deleted file mode 100644 index d75476e245140..0000000000000 --- a/Documentation/devicetree/bindings/pinctrl/renesas,pfc-pinctrl.txt +++ /dev/null @@ -1,188 +0,0 @@ -* Renesas Pin Function Controller (GPIO and Pin Mux/Config) - -The Pin Function Controller (PFC) is a Pin Mux/Config controller. On SH73A0, -R8A73A4 and R8A7740 it also acts as a GPIO controller. - - -Pin Control ------------ - -Required Properties: - - - compatible: should be one of the following. - - "renesas,pfc-emev2": for EMEV2 (EMMA Mobile EV2) compatible pin-controller. - - "renesas,pfc-r8a73a4": for R8A73A4 (R-Mobile APE6) compatible pin-controller. - - "renesas,pfc-r8a7740": for R8A7740 (R-Mobile A1) compatible pin-controller. - - "renesas,pfc-r8a7742": for R8A7742 (RZ/G1H) compatible pin-controller. - - "renesas,pfc-r8a7743": for R8A7743 (RZ/G1M) compatible pin-controller. - - "renesas,pfc-r8a7744": for R8A7744 (RZ/G1N) compatible pin-controller. - - "renesas,pfc-r8a7745": for R8A7745 (RZ/G1E) compatible pin-controller. - - "renesas,pfc-r8a77470": for R8A77470 (RZ/G1C) compatible pin-controller. - - "renesas,pfc-r8a774a1": for R8A774A1 (RZ/G2M) compatible pin-controller. - - "renesas,pfc-r8a774b1": for R8A774B1 (RZ/G2N) compatible pin-controller. - - "renesas,pfc-r8a774c0": for R8A774C0 (RZ/G2E) compatible pin-controller. - - "renesas,pfc-r8a774e1": for R8A774E1 (RZ/G2H) compatible pin-controller. - - "renesas,pfc-r8a7778": for R8A7778 (R-Car M1) compatible pin-controller. - - "renesas,pfc-r8a7779": for R8A7779 (R-Car H1) compatible pin-controller. - - "renesas,pfc-r8a7790": for R8A7790 (R-Car H2) compatible pin-controller. - - "renesas,pfc-r8a7791": for R8A7791 (R-Car M2-W) compatible pin-controller. - - "renesas,pfc-r8a7792": for R8A7792 (R-Car V2H) compatible pin-controller. - - "renesas,pfc-r8a7793": for R8A7793 (R-Car M2-N) compatible pin-controller. - - "renesas,pfc-r8a7794": for R8A7794 (R-Car E2) compatible pin-controller. - - "renesas,pfc-r8a7795": for R8A7795 (R-Car H3) compatible pin-controller. - - "renesas,pfc-r8a7796": for R8A77960 (R-Car M3-W) compatible pin-controller. - - "renesas,pfc-r8a77961": for R8A77961 (R-Car M3-W+) compatible pin-controller. - - "renesas,pfc-r8a77965": for R8A77965 (R-Car M3-N) compatible pin-controller. - - "renesas,pfc-r8a77970": for R8A77970 (R-Car V3M) compatible pin-controller. - - "renesas,pfc-r8a77980": for R8A77980 (R-Car V3H) compatible pin-controller. - - "renesas,pfc-r8a77990": for R8A77990 (R-Car E3) compatible pin-controller. - - "renesas,pfc-r8a77995": for R8A77995 (R-Car D3) compatible pin-controller. - - "renesas,pfc-sh73a0": for SH73A0 (SH-Mobile AG5) compatible pin-controller. - - - reg: Base address and length of each memory resource used by the pin - controller hardware module. - -Optional properties: - - - #gpio-range-cells: Mandatory when the PFC doesn't handle GPIO, forbidden - otherwise. Should be 3. - - - interrupts-extended: Specify the interrupts associated with external - IRQ pins. This property is mandatory when the PFC handles GPIOs and - forbidden otherwise. When specified, it must contain one interrupt per - external IRQ, sorted by external IRQ number. - -The PFC node also acts as a container for pin configuration nodes. Please refer -to pinctrl-bindings.txt in this directory for the definition of the term "pin -configuration node" and for the common pinctrl bindings used by client devices. - -Each pin configuration node represents a desired configuration for a pin, a -pin group, or a list of pins or pin groups. The configuration can include the -function to select on those pin(s) and pin configuration parameters (such as -pull-up and pull-down). - -Pin configuration nodes contain pin configuration properties, either directly -or grouped in child subnodes. Both pin muxing and configuration parameters can -be grouped in that way and referenced as a single pin configuration node by -client devices. - -A configuration node or subnode must reference at least one pin (through the -pins or pin groups properties) and contain at least a function or one -configuration parameter. When the function is present only pin groups can be -used to reference pins. - -All pin configuration nodes and subnodes names are ignored. All of those nodes -are parsed through phandles and processed purely based on their content. - -Pin Configuration Node Properties: - -- pins : An array of strings, each string containing the name of a pin. -- groups : An array of strings, each string containing the name of a pin - group. - -- function: A string containing the name of the function to mux to the pin - group(s) specified by the groups property. - - Valid values for pin, group and function names can be found in the group and - function arrays of the PFC data file corresponding to the SoC - (drivers/pinctrl/sh-pfc/pfc-*.c) - -The pin configuration parameters use the generic pinconf bindings defined in -pinctrl-bindings.txt in this directory. The supported parameters are -bias-disable, bias-pull-up, bias-pull-down, drive-strength and power-source. For -pins that have a configurable I/O voltage, the power-source value should be the -nominal I/O voltage in millivolts. - - -GPIO ----- - -On SH73A0, R8A73A4 and R8A7740 the PFC node is also a GPIO controller node. - -Required Properties: - - - gpio-controller: Marks the device node as a gpio controller. - - - #gpio-cells: Should be 2. The first cell is the GPIO number and the second - cell specifies GPIO flags, as defined in . Only the - GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW flags are supported. - -The syntax of the gpio specifier used by client nodes should be the following -with values derived from the SoC user manual. - - <[phandle of the gpio controller node] - [pin number within the gpio controller] - [flags]> - -On other mach-shmobile platforms GPIO is handled by the gpio-rcar driver. -Please refer to Documentation/devicetree/bindings/gpio/renesas,rcar-gpio.yaml -for documentation of the GPIO device tree bindings on those platforms. - - -Examples --------- - -Example 1: SH73A0 (SH-Mobile AG5) pin controller node - - pfc: pin-controller@e6050000 { - compatible = "renesas,pfc-sh73a0"; - reg = <0xe6050000 0x8000>, - <0xe605801c 0x1c>; - gpio-controller; - #gpio-cells = <2>; - interrupts-extended = - <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>, - <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>, - <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>, - <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>, - <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>, - <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>, - <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>, - <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>; - }; - -Example 2: A GPIO LED node that references a GPIO - - #include - - leds { - compatible = "gpio-leds"; - led1 { - gpios = <&pfc 20 GPIO_ACTIVE_LOW>; - }; - }; - -Example 3: KZM-A9-GT (SH-Mobile AG5) default pin state hog and pin control maps - for the MMCIF and SCIFA4 devices - - &pfc { - pinctrl-0 = <&scifa4_pins>; - pinctrl-names = "default"; - - mmcif_pins: mmcif { - mux { - groups = "mmc0_data8_0", "mmc0_ctrl_0"; - function = "mmc0"; - }; - cfg { - groups = "mmc0_data8_0"; - pins = "PORT279"; - bias-pull-up; - }; - }; - - scifa4_pins: scifa4 { - groups = "scifa4_data", "scifa4_ctrl"; - function = "scifa4"; - }; - }; - -Example 4: KZM-A9-GT (SH-Mobile AG5) default pin state for the MMCIF device - - &mmcif { - pinctrl-0 = <&mmcif_pins>; - pinctrl-names = "default"; - - bus-width = <8>; - vmmc-supply = <®_1p8v>; - }; diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml new file mode 100644 index 0000000000000..5b5b1b9d2ec74 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml @@ -0,0 +1,193 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/renesas,pfc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Pin Function Controller (GPIO and Pin Mux/Config) + +maintainers: + - Geert Uytterhoeven + +description: + The Pin Function Controller (PFC) is a Pin Mux/Config controller. + On SH/R-Mobile SoCs it also acts as a GPIO controller. + +properties: + compatible: + enum: + - renesas,pfc-emev2 # EMMA Mobile EV2 + - renesas,pfc-r8a73a4 # R-Mobile APE6 + - renesas,pfc-r8a7740 # R-Mobile A1 + - renesas,pfc-r8a7742 # RZ/G1H + - renesas,pfc-r8a7743 # RZ/G1M + - renesas,pfc-r8a7744 # RZ/G1N + - renesas,pfc-r8a7745 # RZ/G1E + - renesas,pfc-r8a77470 # RZ/G1C + - renesas,pfc-r8a774a1 # RZ/G2M + - renesas,pfc-r8a774b1 # RZ/G2N + - renesas,pfc-r8a774c0 # RZ/G2E + - renesas,pfc-r8a774e1 # RZ/G2H + - renesas,pfc-r8a7778 # R-Car M1 + - renesas,pfc-r8a7779 # R-Car H1 + - renesas,pfc-r8a7790 # R-Car H2 + - renesas,pfc-r8a7791 # R-Car M2-W + - renesas,pfc-r8a7792 # R-Car V2H + - renesas,pfc-r8a7793 # R-Car M2-N + - renesas,pfc-r8a7794 # R-Car E2 + - renesas,pfc-r8a7795 # R-Car H3 + - renesas,pfc-r8a7796 # R-Car M3-W + - renesas,pfc-r8a77961 # R-Car M3-W+ + - renesas,pfc-r8a77965 # R-Car M3-N + - renesas,pfc-r8a77970 # R-Car V3M + - renesas,pfc-r8a77980 # R-Car V3H + - renesas,pfc-r8a77990 # R-Car E3 + - renesas,pfc-r8a77995 # R-Car D3 + - renesas,pfc-sh73a0 # SH-Mobile AG5 + + reg: + minItems: 1 + maxItems: 2 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + gpio-ranges: + minItems: 1 + maxItems: 16 + + interrupts-extended: + minItems: 32 + maxItems: 64 + description: + Specify the interrupts associated with external IRQ pins on SoCs where + the PFC acts as a GPIO controller. It must contain one interrupt per + external IRQ, sorted by external IRQ number. + + power-domains: + maxItems: 1 + +required: + - compatible + - reg + +if: + properties: + compatible: + items: + enum: + - renesas,pfc-r8a73a4 + - renesas,pfc-r8a7740 + - renesas,pfc-sh73a0 +then: + required: + - interrupts-extended + - gpio-controller + - '#gpio-cells' + - gpio-ranges + - power-domains + +additionalProperties: + anyOf: + - type: object + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + description: + Pin controller client devices use pin configuration subnodes (children + and grandchildren) for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + phandle: true + function: true + groups: true + pins: true + bias-disable: true + bias-pull-down: true + bias-pull-up: true + drive-strength: + enum: [ 3, 6, 9, 12, 15, 18, 21, 24 ] # Superset of supported values + power-source: + enum: [ 1800, 3300 ] + gpio-hog: true + gpios: true + input: true + output-high: true + output-low: true + + additionalProperties: false + + - type: object + properties: + phandle: true + + additionalProperties: + $ref: "#/additionalProperties/anyOf/0" + +examples: + - | + pfc: pinctrl@e6050000 { + compatible = "renesas,pfc-r8a7740"; + reg = <0xe6050000 0x8000>, + <0xe605800c 0x20>; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pfc 0 0 212>; + interrupts-extended = + <&irqpin0 0 0>, <&irqpin0 1 0>, <&irqpin0 2 0>, <&irqpin0 3 0>, + <&irqpin0 4 0>, <&irqpin0 5 0>, <&irqpin0 6 0>, <&irqpin0 7 0>, + <&irqpin1 0 0>, <&irqpin1 1 0>, <&irqpin1 2 0>, <&irqpin1 3 0>, + <&irqpin1 4 0>, <&irqpin1 5 0>, <&irqpin1 6 0>, <&irqpin1 7 0>, + <&irqpin2 0 0>, <&irqpin2 1 0>, <&irqpin2 2 0>, <&irqpin2 3 0>, + <&irqpin2 4 0>, <&irqpin2 5 0>, <&irqpin2 6 0>, <&irqpin2 7 0>, + <&irqpin3 0 0>, <&irqpin3 1 0>, <&irqpin3 2 0>, <&irqpin3 3 0>, + <&irqpin3 4 0>, <&irqpin3 5 0>, <&irqpin3 6 0>, <&irqpin3 7 0>; + power-domains = <&pd_c5>; + + lcd0-mux-hog { + /* DBGMD/LCDC0/FSIA MUX */ + gpio-hog; + gpios = <176 0>; + output-high; + }; + }; + + - | + pinctrl@e6060000 { + compatible = "renesas,pfc-r8a7795"; + reg = <0xe6060000 0x50c>; + + avb_pins: avb { + mux { + groups = "avb_link", "avb_mdio", "avb_mii"; + function = "avb"; + }; + + pins_mdio { + groups = "avb_mdio"; + drive-strength = <24>; + }; + + pins_mii_tx { + pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", + "PIN_AVB_TD0", "PIN_AVB_TD1", "PIN_AVB_TD2", + "PIN_AVB_TD3"; + drive-strength = <12>; + }; + }; + + keys_pins: keys { + pins = "GP_5_17", "GP_5_20", "GP_5_22", "GP_2_1"; + bias-pull-up; + }; + + sdhi0_pins: sd0 { + groups = "sdhi0_data4", "sdhi0_ctrl"; + function = "sdhi0"; + power-source = <3300>; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt deleted file mode 100644 index fd3696eb36bf3..0000000000000 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-pinctrl.txt +++ /dev/null @@ -1,223 +0,0 @@ -Renesas RZ/A1 combined Pin and GPIO controller - -The Renesas SoCs of the RZ/A1 family feature a combined Pin and GPIO controller, -named "Ports" in the hardware reference manual. -Pin multiplexing and GPIO configuration is performed on a per-pin basis -writing configuration values to per-port register sets. -Each "port" features up to 16 pins, each of them configurable for GPIO -function (port mode) or in alternate function mode. -Up to 8 different alternate function modes exist for each single pin. - -Pin controller node -------------------- - -Required properties: - - compatible: should be: - - "renesas,r7s72100-ports": for RZ/A1H - - "renesas,r7s72101-ports", "renesas,r7s72100-ports": for RZ/A1M - - "renesas,r7s72102-ports": for RZ/A1L - - - reg - address base and length of the memory area where the pin controller - hardware is mapped to. - -Example: -Pin controller node for RZ/A1H SoC (r7s72100) - -pinctrl: pin-controller@fcfe3000 { - compatible = "renesas,r7s72100-ports"; - - reg = <0xfcfe3000 0x4230>; -}; - -Sub-nodes ---------- - -The child nodes of the pin controller node describe a pin multiplexing -function or a GPIO controller alternatively. - -- Pin multiplexing sub-nodes: - A pin multiplexing sub-node describes how to configure a set of - (or a single) pin in some desired alternate function mode. - A single sub-node may define several pin configurations. - A few alternate function require special pin configuration flags to be - supplied along with the alternate function configuration number. - The hardware reference manual specifies when a pin function requires - "software IO driven" mode to be specified. To do so use the generic - properties from the header file - to instruct the pin controller to perform the desired pin configuration - operation. - Please refer to pinctrl-bindings.txt to get to know more on generic - pin properties usage. - - The allowed generic formats for a pin multiplexing sub-node are the - following ones: - - node-1 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - node-2 { - sub-node-1 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - sub-node-2 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - ... - - sub-node-n { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - }; - - Use the second format when pins part of the same logical group need to have - different generic pin configuration flags applied. - - Client sub-nodes shall refer to pin multiplexing sub-nodes using the phandle - of the most external one. - - Eg. - - client-1 { - ... - pinctrl-0 = <&node-1>; - ... - }; - - client-2 { - ... - pinctrl-0 = <&node-2>; - ... - }; - - Required properties: - - pinmux: - integer array representing pin number and pin multiplexing configuration. - When a pin has to be configured in alternate function mode, use this - property to identify the pin by its global index, and provide its - alternate function configuration number along with it. - When multiple pins are required to be configured as part of the same - alternate function they shall be specified as members of the same - argument list of a single "pinmux" property. - Helper macros to ease assembling the pin index from its position - (port where it sits on and pin number) and alternate function identifier - are provided by the pin controller header file at: - - Integers values in "pinmux" argument list are assembled as: - ((PORT * 16 + PIN) | MUX_FUNC << 16) - - Optional generic properties: - - input-enable: - enable input bufer for pins requiring software driven IO input - operations. - - output-high: - enable output buffer for pins requiring software driven IO output - operations. output-low can be used alternatively, as line value is - ignored by the driver. - - The hardware reference manual specifies when a pin has to be configured to - work in bi-directional mode and when the IO direction has to be specified - by software. Bi-directional pins are managed by the pin controller driver - internally, while software driven IO direction has to be explicitly - selected when multiple options are available. - - Example: - A serial communication interface with a TX output pin and an RX input pin. - - &pinctrl { - scif2_pins: serial2 { - pinmux = , ; - }; - }; - - Pin #0 on port #3 is configured as alternate function #6. - Pin #2 on port #3 is configured as alternate function #4. - - Example 2: - I2c master: both SDA and SCL pins need bi-directional operations - - &pinctrl { - i2c2_pins: i2c2 { - pinmux = , ; - }; - }; - - Pin #4 on port #1 is configured as alternate function #1. - Pin #5 on port #1 is configured as alternate function #1. - Both need to work in bi-directional mode, the driver manages this internally. - - Example 3: - Multi-function timer input and output compare pins. - Configure TIOC0A as software driven input and TIOC0B as software driven - output. - - &pinctrl { - tioc0_pins: tioc0 { - tioc0_input_pins { - pinumx = ; - input-enable; - }; - - tioc0_output_pins { - pinmux = ; - output-enable; - }; - }; - }; - - &tioc0 { - ... - pinctrl-0 = <&tioc0_pins>; - ... - }; - - Pin #0 on port #4 is configured as alternate function #2 with IO direction - specified by software as input. - Pin #1 on port #4 is configured as alternate function #1 with IO direction - specified by software as output. - -- GPIO controller sub-nodes: - Each port of the r7s72100 pin controller hardware is itself a GPIO controller. - Different SoCs have different numbers of available pins per port, but - generally speaking, each of them can be configured in GPIO ("port") mode - on this hardware. - Describe GPIO controllers using sub-nodes with the following properties. - - Required properties: - - gpio-controller - empty property as defined by the GPIO bindings documentation. - - #gpio-cells - number of cells required to identify and configure a GPIO. - Shall be 2. - - gpio-ranges - Describes a GPIO controller specifying its specific pin base, the pin - base in the global pin numbering space, and the number of controlled - pins, as defined by the GPIO bindings documentation. Refer to - Documentation/devicetree/bindings/gpio/gpio.txt file for a more detailed - description. - - Example: - A GPIO controller node, controlling 16 pins indexed from 0. - The GPIO controller base in the global pin indexing space is pin 48, thus - pins [0 - 15] on this controller map to pins [48 - 63] in the global pin - indexing space. - - port3: gpio-3 { - gpio-controller; - #gpio-cells = <2>; - gpio-ranges = <&pinctrl 0 48 16>; - }; - - A device node willing to use pins controlled by this GPIO controller, shall - refer to it as follows: - - led1 { - gpios = <&port3 10 GPIO_ACTIVE_LOW>; - }; diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml new file mode 100644 index 0000000000000..7f80578dc229f --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza1-ports.yaml @@ -0,0 +1,190 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/A1 combined Pin and GPIO controller + +maintainers: + - Jacopo Mondi + - Geert Uytterhoeven + +description: + The Renesas SoCs of the RZ/A1 family feature a combined Pin and GPIO + controller, named "Ports" in the hardware reference manual. + Pin multiplexing and GPIO configuration is performed on a per-pin basis + writing configuration values to per-port register sets. + Each "port" features up to 16 pins, each of them configurable for GPIO + function (port mode) or in alternate function mode. + Up to 8 different alternate function modes exist for each single pin. + +properties: + compatible: + oneOf: + - const: renesas,r7s72100-ports # RZ/A1H + - items: + - const: renesas,r7s72101-ports # RZ/A1M + - const: renesas,r7s72100-ports # fallback + - const: renesas,r7s72102-ports # RZ/A1L + + reg: + maxItems: 1 + +required: + - compatible + - reg + +patternProperties: + "^gpio-[0-9]*$": + type: object + + description: + Each port of the r7s72100 pin controller hardware is itself a GPIO + controller. + Different SoCs have different numbers of available pins per port, but + generally speaking, each of them can be configured in GPIO ("port") mode + on this hardware. + Describe GPIO controllers using sub-nodes with the following properties. + + properties: + gpio-controller: true + + '#gpio-cells': + const: 2 + + gpio-ranges: + maxItems: 1 + + required: + - gpio-controller + - '#gpio-cells' + - gpio-ranges + + +additionalProperties: + anyOf: + - type: object + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + description: + A pin multiplexing sub-node describes how to configure a set of (or a + single) pin in some desired alternate function mode. + A single sub-node may define several pin configurations. + A few alternate function require special pin configuration flags to be + supplied along with the alternate function configuration number. + The hardware reference manual specifies when a pin function requires + "software IO driven" mode to be specified. To do so use the generic + properties from the header + file to instruct the pin controller to perform the desired pin + configuration operation. + The hardware reference manual specifies when a pin has to be configured + to work in bi-directional mode and when the IO direction has to be + specified by software. Bi-directional pins must be managed by the pin + controller driver internally, while software driven IO direction has to + be explicitly selected when multiple options are available. + + properties: + pinmux: + description: | + Integer array representing pin number and pin multiplexing + configuration. + When a pin has to be configured in alternate function mode, use + this property to identify the pin by its global index, and provide + its alternate function configuration number along with it. + When multiple pins are required to be configured as part of the + same alternate function they shall be specified as members of the + same argument list of a single "pinmux" property. + Helper macros to ease assembling the pin index from its position + (port where it sits on and pin number) and alternate function + identifier are provided by the pin controller header file at: + + Integers values in "pinmux" argument list are assembled as: + ((PORT * 16 + PIN) | MUX_FUNC << 16) + + phandle: true + input-enable: true + output-enable: true + + required: + - pinmux + + additionalProperties: false + + - type: object + properties: + phandle: true + + additionalProperties: + $ref: "#/additionalProperties/anyOf/0" + +examples: + - | + #include + pinctrl: pinctrl@fcfe3000 { + compatible = "renesas,r7s72100-ports"; + + reg = <0xfcfe3000 0x4230>; + + /* + * A GPIO controller node, controlling 16 pins indexed from 0. + * The GPIO controller base in the global pin indexing space is pin + * 48, thus pins [0 - 15] on this controller map to pins [48 - 63] + * in the global pin indexing space. + */ + port3: gpio-3 { + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl 0 48 16>; + }; + + /* + * A serial communication interface with a TX output pin and an RX + * input pin. + * Pin #0 on port #3 is configured as alternate function #6. + * Pin #2 on port #3 is configured as alternate function #4. + */ + scif2_pins: serial2 { + pinmux = , ; + }; + + + /* + * I2c master: both SDA and SCL pins need bi-directional operations + * Pin #4 on port #1 is configured as alternate function #1. + * Pin #5 on port #1 is configured as alternate function #1. + * Both need to work in bi-directional mode, the driver must manage + * this internally. + */ + i2c2_pins: i2c2 { + pinmux = , ; + }; + + + /* + * Multi-function timer input and output compare pins. + */ + tioc0_pins: tioc0 { + /* + * Configure TIOC0A as software driven input + * Pin #0 on port #4 is configured as alternate function #2 + * with IO direction specified by software as input. + */ + tioc0_input_pins { + pinmux = ; + input-enable; + }; + + /* + * Configure TIOC0B as software driven output + * Pin #1 on port #4 is configured as alternate function #1 + * with IO direction specified by software as output. + */ + tioc0_output_pins { + pinmux = ; + output-enable; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml index b7911a994f3a9..ce1f7343788fa 100644 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml @@ -84,7 +84,7 @@ additionalProperties: false examples: - | #include - pinctrl: pin-controller@fcffe000 { + pinctrl: pinctrl@fcffe000 { compatible = "renesas,r7s9210-pinctrl"; reg = <0xfcffe000 0x1000>; diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.txt deleted file mode 100644 index 25e53acd523e2..0000000000000 --- a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.txt +++ /dev/null @@ -1,153 +0,0 @@ -Renesas RZ/N1 SoC Pinctrl node description. - -Pin controller node -------------------- -Required properties: -- compatible: SoC-specific compatible string "renesas,-pinctrl" - followed by "renesas,rzn1-pinctrl" as fallback. The SoC-specific compatible - strings must be one of: - "renesas,r9a06g032-pinctrl" for RZ/N1D - "renesas,r9a06g033-pinctrl" for RZ/N1S -- reg: Address base and length of the memory area where the pin controller - hardware is mapped to. -- clocks: phandle for the clock, see the description of clock-names below. -- clock-names: Contains the name of the clock: - "bus", the bus clock, sometimes described as pclk, for register accesses. - -Example: - pinctrl: pin-controller@40067000 { - compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl"; - reg = <0x40067000 0x1000>, <0x51000000 0x480>; - clocks = <&sysctrl R9A06G032_HCLK_PINCONFIG>; - clock-names = "bus"; - }; - -Sub-nodes ---------- - -The child nodes of the pin controller node describe a pin multiplexing -function. - -- Pin multiplexing sub-nodes: - A pin multiplexing sub-node describes how to configure a set of - (or a single) pin in some desired alternate function mode. - A single sub-node may define several pin configurations. - Please refer to pinctrl-bindings.txt to get to know more on generic - pin properties usage. - - The allowed generic formats for a pin multiplexing sub-node are the - following ones: - - node-1 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - node-2 { - sub-node-1 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - sub-node-2 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - ... - - sub-node-n { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - }; - - node-3 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - - sub-node-1 { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - - ... - - sub-node-n { - pinmux = , , ... ; - GENERIC_PINCONFIG; - }; - }; - - Use the latter two formats when pins part of the same logical group need to - have different generic pin configuration flags applied. Note that the generic - pinconfig in node-3 does not apply to the sub-nodes. - - Client sub-nodes shall refer to pin multiplexing sub-nodes using the phandle - of the most external one. - - Eg. - - client-1 { - ... - pinctrl-0 = <&node-1>; - ... - }; - - client-2 { - ... - pinctrl-0 = <&node-2>; - ... - }; - - Required properties: - - pinmux: - integer array representing pin number and pin multiplexing configuration. - When a pin has to be configured in alternate function mode, use this - property to identify the pin by its global index, and provide its - alternate function configuration number along with it. - When multiple pins are required to be configured as part of the same - alternate function they shall be specified as members of the same - argument list of a single "pinmux" property. - Integers values in the "pinmux" argument list are assembled as: - (PIN | MUX_FUNC << 8) - where PIN directly corresponds to the pl_gpio pin number and MUX_FUNC is - one of the alternate function identifiers defined in: - - These identifiers collapse the IO Multiplex Configuration Level 1 and - Level 2 numbers that are detailed in the hardware reference manual into a - single number. The identifiers for Level 2 are simply offset by 10. - Additional identifiers are provided to specify the MDIO source peripheral. - - Optional generic pinconf properties: - - bias-disable - disable any pin bias - - bias-pull-up - pull up the pin with 50 KOhm - - bias-pull-down - pull down the pin with 50 KOhm - - bias-high-impedance - high impedance mode - - drive-strength - sink or source at most 4, 6, 8 or 12 mA - - Example: - A serial communication interface with a TX output pin and an RX input pin. - - &pinctrl { - pins_uart0: pins_uart0 { - pinmux = < - RZN1_PINMUX(103, RZN1_FUNC_UART0_I) /* UART0_TXD */ - RZN1_PINMUX(104, RZN1_FUNC_UART0_I) /* UART0_RXD */ - >; - }; - }; - - Example 2: - Here we set the pull up on the RXD pin of the UART. - - &pinctrl { - pins_uart0: pins_uart0 { - pinmux = ; /* TXD */ - - pins_uart6_rx { - pinmux = ; /* RXD */ - bias-pull-up; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml new file mode 100644 index 0000000000000..4a43af0d6e02a --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/renesas,rzn1-pinctrl.yaml @@ -0,0 +1,129 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/renesas,rzn1-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas RZ/N1 Pin Controller + +maintainers: + - Gareth Williams + - Geert Uytterhoeven + +properties: + compatible: + items: + - enum: + - renesas,r9a06g032-pinctrl # RZ/N1D + - renesas,r9a06g033-pinctrl # RZ/N1S + - const: renesas,rzn1-pinctrl # Generic RZ/N1 + + reg: + items: + - description: GPIO Multiplexing Level1 Register Block + - description: GPIO Multiplexing Level2 Register Block + + clocks: + maxItems: 1 + + clock-names: + const: bus + description: + The bus clock, sometimes described as pclk, for register accesses. + +required: + - compatible + - reg + - clocks + - clock-names + +additionalProperties: + anyOf: + - type: object + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + + description: + A pin multiplexing sub-node describes how to configure a set of (or a + single) pin in some desired alternate function mode. + A single sub-node may define several pin configurations. + + properties: + pinmux: + description: | + Integer array representing pin number and pin multiplexing + configuration. + When a pin has to be configured in alternate function mode, use + this property to identify the pin by its global index, and provide + its alternate function configuration number along with it. + When multiple pins are required to be configured as part of the + same alternate function they shall be specified as members of the + same argument list of a single "pinmux" property. + Integers values in the "pinmux" argument list are assembled as: + (PIN | MUX_FUNC << 8) + where PIN directly corresponds to the pl_gpio pin number and + MUX_FUNC is one of the alternate function identifiers defined in: + + These identifiers collapse the IO Multiplex Configuration Level 1 + and Level 2 numbers that are detailed in the hardware reference + manual into a single number. The identifiers for Level 2 are simply + offset by 10. Additional identifiers are provided to specify the + MDIO source peripheral. + + phandle: true + bias-disable: true + bias-pull-up: + description: Pull up the pin with 50 kOhm + bias-pull-down: + description: Pull down the pin with 50 kOhm + bias-high-impedance: true + drive-strength: + enum: [ 4, 6, 8, 12 ] + + required: + - pinmux + + additionalProperties: + $ref: "#/additionalProperties/anyOf/0" + + - type: object + properties: + phandle: true + + additionalProperties: + $ref: "#/additionalProperties/anyOf/0" + +examples: + - | + #include + #include + pinctrl: pinctrl@40067000 { + compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl"; + reg = <0x40067000 0x1000>, <0x51000000 0x480>; + clocks = <&sysctrl R9A06G032_HCLK_PINCONFIG>; + clock-names = "bus"; + + /* + * A serial communication interface with a TX output pin and an RX + * input pin. + */ + pins_uart0: pins_uart0 { + pinmux = < + RZN1_PINMUX(103, RZN1_FUNC_UART0_I) /* UART0_TXD */ + RZN1_PINMUX(104, RZN1_FUNC_UART0_I) /* UART0_RXD */ + >; + }; + + /* + * Set the pull-up on the RXD pin of the UART. + */ + pins_uart0_alt: pins_uart0_alt { + pinmux = ; + + pins_uart6_rx { + pinmux = ; + bias-pull-up; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt index 70659c917bdc4..7734ab6fec449 100644 --- a/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt +++ b/Documentation/devicetree/bindings/pinctrl/samsung-pinctrl.txt @@ -65,7 +65,7 @@ Required Properties: - Pin mux/config groups as child nodes: The pin mux (selecting pin function mode) and pin config (pull up/down, driver strength) settings are represented - as child nodes of the pin-controller node. There should be atleast one + as child nodes of the pin-controller node. There should be at least one child node and there is no limit on the count of these child nodes. It is also possible for a child node to consist of several further child nodes to allow grouping multiple pinctrl groups into one. The format of second @@ -75,7 +75,7 @@ Required Properties: The child node should contain a list of pin(s) on which a particular pin function selection or pin configuration (or both) have to applied. This list of pins is specified using the property name "samsung,pins". There - should be atleast one pin specfied for this property and there is no upper + should be at least one pin specified for this property and there is no upper limit on the count of pins that can be specified. The pins are specified using pin names which are derived from the hardware manual of the SoC. As an example, the pins in GPA0 bank of the pin controller can be represented @@ -107,7 +107,7 @@ Required Properties: hardware manual and these values are programmed as-is into the pin pull up/down and driver strength register of the pin-controller. - Note: A child should include atleast a pin function selection property or + Note: A child should include at least a pin function selection property or pin configuration property (one or more) or both. The client nodes that require a particular pin function selection and/or diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml index f8a93d8680f9a..502480a19f495 100644 --- a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml @@ -28,6 +28,8 @@ properties: required: - compatible +additionalProperties: false + examples: - | // The UniPhier pinctrl should be a subnode of a "syscon" compatible node. diff --git a/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml new file mode 100644 index 0000000000000..d0d1a01140ea7 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/toshiba,visconti-pinctrl.yaml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/toshiba,visconti-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Toshiba Visconti TMPV770x pin mux/config controller + +maintainers: + - Nobuhiro Iwamatsu + +description: + Toshiba's Visconti ARM SoC a pin mux/config controller. + +properties: + compatible: + enum: + - toshiba,tmpv7708-pinctrl + + reg: + maxItems: 1 + +required: + - compatible + - reg + +patternProperties: + '-pins$': + type: object + description: | + A pinctrl node should contain at least one subnodes representing the + pinctrl groups available on the machine. Each subnode will list the + pins it needs, and how they should be configured, with regard to muxer + configuration, pullups, drive strength. + $ref: "pinmux-node.yaml" + + properties: + function: + description: + Function to mux. + $ref: "/schemas/types.yaml#/definitions/string" + enum: [i2c0, i2c1, i2c2, i2c3, i2c4, i2c5, i2c6, i2c7, i2c8, + spi0, spi1, spi2, spi3, spi4, spi5, spi6, + uart0, uart1, uart2, uart3, pwm, pcmif_out, pcmif_in] + + groups: + description: + Name of the pin group to use for the functions. + $ref: "/schemas/types.yaml#/definitions/string" + enum: [i2c0_grp, i2c1_grp, i2c2_grp, i2c3_grp, i2c4_grp, + i2c5_grp, i2c6_grp, i2c7_grp, i2c8_grp, + spi0_grp, spi0_cs0_grp, spi0_cs1_grp, spi0_cs2_grp, + spi1_grp, spi2_grp, spi3_grp, spi4_grp, spi5_grp, spi6_grp, + uart0_grp, uart1_grp, uart2_grp, uart3_grp, + pwm0_gpio4_grp, pwm0_gpio8_grp, pwm0_gpio12_grp, + pwm0_gpio16_grp, pwm1_gpio5_grp, pwm1_gpio9_grp, + pwm1_gpio13_grp, pwm1_gpio17_grp, pwm2_gpio6_grp, + pwm2_gpio10_grp, pwm2_gpio14_grp, pwm2_gpio18_grp, + pwm3_gpio7_grp, pwm3_gpio11_grp, pwm3_gpio15_grp, + pwm3_gpio19_grp, pcmif_out_grp, pcmif_in_grp] + + drive-strength: + enum: [2, 4, 6, 8, 16, 24, 32] + default: 2 + description: + Selects the drive strength for the specified pins, in mA. + + bias-pull-up: true + + bias-pull-down: true + + bias-disable: true + +additionalProperties: false + +examples: + # Pinmux controller node + - | + soc { + #address-cells = <2>; + #size-cells = <2>; + + pmux: pmux@24190000 { + compatible = "toshiba,tmpv7708-pinctrl"; + reg = <0 0x24190000 0 0x10000>; + + spi0_pins: spi0-pins { + function = "spi0"; + groups = "spi0_grp"; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml index 4f524f822e842..d30f85cc395e9 100644 --- a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml +++ b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml @@ -27,6 +27,7 @@ properties: - amlogic,meson8b-pwrc - amlogic,meson8m2-pwrc - amlogic,meson-gxbb-pwrc + - amlogic,meson-axg-pwrc - amlogic,meson-g12a-pwrc - amlogic,meson-sm1-pwrc @@ -42,11 +43,11 @@ properties: - const: vapb resets: - minItems: 11 + minItems: 5 maxItems: 12 reset-names: - minItems: 11 + minItems: 5 maxItems: 12 "#power-domain-cells": @@ -107,6 +108,24 @@ allOf: - resets - reset-names + - if: + properties: + compatible: + enum: + - amlogic,meson-axg-pwrc + then: + properties: + reset-names: + items: + - const: viu + - const: venc + - const: vcbus + - const: vencl + - const: vid_lock + required: + - resets + - reset-names + - if: properties: compatible: diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml index bc4e037f3f73f..5dae04d2936c2 100644 --- a/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml +++ b/Documentation/devicetree/bindings/power/amlogic,meson-sec-pwrc.yaml @@ -27,6 +27,8 @@ required: - compatible - "#power-domain-cells" +additionalProperties: false + examples: - | secure-monitor { diff --git a/Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml b/Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml new file mode 100644 index 0000000000000..63b15ac6dde4b --- /dev/null +++ b/Documentation/devicetree/bindings/power/brcm,bcm63xx-power.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/power/brcm,bcm63xx-power.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: BCM63xx power domain driver + +maintainers: + - Álvaro Fernández Rojas + +description: | + BCM6318, BCM6328, BCM6362 and BCM63268 SoCs have a power domain controller + to enable/disable certain components in order to save power. + +properties: + compatible: + items: + - enum: + - brcm,bcm6318-power-controller + - brcm,bcm6328-power-controller + - brcm,bcm6362-power-controller + - brcm,bcm63268-power-controller + + reg: + maxItems: 1 + + "#power-domain-cells": + const: 1 + +required: + - compatible + - reg + - "#power-domain-cells" + +additionalProperties: false + +examples: + - | + periph_pwr: power-controller@10001848 { + compatible = "brcm,bcm6328-power-controller"; + reg = <0x10001848 0x4>; + #power-domain-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/power/domain-idle-state.yaml b/Documentation/devicetree/bindings/power/domain-idle-state.yaml index dfba1af9abe55..6a12efdf436af 100644 --- a/Documentation/devicetree/bindings/power/domain-idle-state.yaml +++ b/Documentation/devicetree/bindings/power/domain-idle-state.yaml @@ -50,6 +50,8 @@ patternProperties: - exit-latency-us - min-residency-us +additionalProperties: false + examples: - | diff --git a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml index bde09a0b2da3c..a96e6dbf18588 100644 --- a/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml +++ b/Documentation/devicetree/bindings/power/fsl,imx-gpcv2.yaml @@ -33,6 +33,10 @@ properties: interrupts: maxItems: 1 + interrupt-controller: true + '#interrupt-cells': + const: 3 + pgc: type: object description: list of power domains provided by this controller. diff --git a/Documentation/devicetree/bindings/power/mti,mips-cpc.yaml b/Documentation/devicetree/bindings/power/mti,mips-cpc.yaml index ccdeaece169e0..be447ccfdcb8d 100644 --- a/Documentation/devicetree/bindings/power/mti,mips-cpc.yaml +++ b/Documentation/devicetree/bindings/power/mti,mips-cpc.yaml @@ -26,6 +26,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | cpc@1bde0000 { diff --git a/Documentation/devicetree/bindings/power/pd-samsung.yaml b/Documentation/devicetree/bindings/power/pd-samsung.yaml index 09bdd96c1ec17..9c2c511334571 100644 --- a/Documentation/devicetree/bindings/power/pd-samsung.yaml +++ b/Documentation/devicetree/bindings/power/pd-samsung.yaml @@ -49,6 +49,8 @@ required: - "#power-domain-cells" - reg +unevaluatedProperties: false + examples: - | lcd0_pd: power-domain@10023c80 { diff --git a/Documentation/devicetree/bindings/power/power-domain.yaml b/Documentation/devicetree/bindings/power/power-domain.yaml index dd564349aa53b..aed51e9dcb11f 100644 --- a/Documentation/devicetree/bindings/power/power-domain.yaml +++ b/Documentation/devicetree/bindings/power/power-domain.yaml @@ -69,6 +69,8 @@ properties: required: - "#power-domain-cells" +additionalProperties: true + examples: - | power: power-controller@12340000 { diff --git a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml index ec2aaeee78dc3..99e8042ac111d 100644 --- a/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml +++ b/Documentation/devicetree/bindings/power/renesas,rcar-sysc.yaml @@ -40,6 +40,7 @@ properties: - renesas,r8a77980-sysc # R-Car V3H - renesas,r8a77990-sysc # R-Car E3 - renesas,r8a77995-sysc # R-Car D3 + - renesas,r8a779a0-sysc # R-Car V3U reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt index 1b4213eb34731..4d530d8154848 100644 --- a/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt +++ b/Documentation/devicetree/bindings/power/reset/ocelot-reset.txt @@ -1,10 +1,13 @@ Microsemi Ocelot reset controller The DEVCPU_GCB:CHIP_REGS have a SOFT_RST register that can be used to reset the -SoC MIPS core. +SoC core. + +The reset registers are both present in the MSCC vcoreiii MIPS and +microchip Sparx5 armv8 SoC's. Required Properties: - - compatible: "mscc,ocelot-chip-reset" + - compatible: "mscc,ocelot-chip-reset" or "microchip,sparx5-chip-reset" Example: reset@1070008 { diff --git a/Documentation/devicetree/bindings/power/reset/reboot-mode.txt b/Documentation/devicetree/bindings/power/reset/reboot-mode.txt deleted file mode 100644 index de34f27d509ee..0000000000000 --- a/Documentation/devicetree/bindings/power/reset/reboot-mode.txt +++ /dev/null @@ -1,25 +0,0 @@ -Generic reboot mode core map driver - -This driver get reboot mode arguments and call the write -interface to store the magic value in special register -or ram. Then the bootloader can read it and take different -action according to the argument stored. - -All mode properties are vendor specific, it is a indication to tell -the bootloader what to do when the system reboots, and should be named -as mode-xxx = (xxx is mode name, magic should be a none-zero value). - -For example modes common on Android platform: -- mode-normal: Normal reboot mode, system reboot with command "reboot". -- mode-recovery: Android Recovery mode, it is a mode to format the device or update a new image. -- mode-bootloader: Android fastboot mode, it's a mode to re-flash partitions on the Android based device. -- mode-loader: A bootloader mode, it's a mode used to download image on Rockchip platform, - usually used in development. - -Example: - reboot-mode { - mode-normal = ; - mode-recovery = ; - mode-bootloader = ; - mode-loader = ; - } diff --git a/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml b/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml new file mode 100644 index 0000000000000..a6c91026d4ccd --- /dev/null +++ b/Documentation/devicetree/bindings/power/reset/reboot-mode.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/power/reset/reboot-mode.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Generic reboot mode core map + +maintainers: + - Andy Yan + +description: | + This driver get reboot mode arguments and call the write + interface to store the magic value in special register + or ram. Then the bootloader can read it and take different + action according to the argument stored. + + All mode properties are vendor specific, it is a indication to tell + the bootloader what to do when the system reboots, and should be named + as mode-xxx = (xxx is mode name, magic should be a non-zero value). + + For example, modes common Android platform are: + - normal: Normal reboot mode, system reboot with command "reboot". + - recovery: Android Recovery mode, it is a mode to format the device or update a new image. + - bootloader: Android fastboot mode, it's a mode to re-flash partitions on the Android based device. + - loader: A bootloader mode, it's a mode used to download image on Rockchip platform, + usually used in development. + +properties: + mode-normal: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Default value to set on a reboot if no command was provided. + +patternProperties: + "^mode-.*$": + $ref: /schemas/types.yaml#/definitions/uint32 + +examples: + - | + reboot-mode { + mode-normal = <0>; + mode-recovery = <1>; + mode-bootloader = <2>; + mode-loader = <3>; + }; +... diff --git a/Documentation/devicetree/bindings/power/supply/act8945a-charger.txt b/Documentation/devicetree/bindings/power/supply/act8945a-charger.txt index c7dfb7cecf404..cb737a9e1f16b 100644 --- a/Documentation/devicetree/bindings/power/supply/act8945a-charger.txt +++ b/Documentation/devicetree/bindings/power/supply/act8945a-charger.txt @@ -33,7 +33,7 @@ Example: pinctrl-names = "default"; pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>; interrupt-parent = <&pioA>; - interrupts = <45 GPIO_ACTIVE_LOW>; + interrupts = <45 IRQ_TYPE_LEVEL_LOW>; active-semi,chglev-gpios = <&pioA 12 GPIO_ACTIVE_HIGH>; active-semi,lbo-gpios = <&pioA 72 GPIO_ACTIVE_LOW>; diff --git a/Documentation/devicetree/bindings/power/supply/battery.yaml b/Documentation/devicetree/bindings/power/supply/battery.yaml index 932b736ce5c01..0c7e2e44793ba 100644 --- a/Documentation/devicetree/bindings/power/supply/battery.yaml +++ b/Documentation/devicetree/bindings/power/supply/battery.yaml @@ -82,6 +82,27 @@ properties: An array containing the temperature in degree Celsius, for each of the battery capacity lookup table. + operating-range-celsius: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: operating temperature range of a battery + items: + - description: minimum temperature at which battery can operate + - description: maximum temperature at which battery can operate + + ambient-celsius: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: safe range of ambient temperature + items: + - description: alert when ambient temperature is lower than this value + - description: alert when ambient temperature is higher than this value + + alert-celsius: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: safe range of battery temperature + items: + - description: alert when battery temperature is lower than this value + - description: alert when battery temperature is higher than this value + required: - compatible @@ -130,6 +151,9 @@ examples: /* table for 10 degree Celsius */ ocv-capacity-table-2 = <4250000 100>, <4200000 95>, <4185000 90>; resistance-temp-table = <20 100>, <10 90>, <0 80>, <(-10) 60>; + operating-range-celsius = <(-30) 50>; + ambient-celsius = <(-5) 50>; + alert-celsius = <0 40>; }; charger@11 { diff --git a/Documentation/devicetree/bindings/power/supply/bq25890.txt b/Documentation/devicetree/bindings/power/supply/bq25890.txt index 3b4c69a7fa705..805040c6fff95 100644 --- a/Documentation/devicetree/bindings/power/supply/bq25890.txt +++ b/Documentation/devicetree/bindings/power/supply/bq25890.txt @@ -33,6 +33,10 @@ Optional properties: - ti,thermal-regulation-threshold: integer, temperature above which the charge current is lowered, to avoid overheating (in degrees Celsius). If omitted, the default setting will be used (120 degrees); +- ti,ibatcomp-micro-ohms: integer, value of a resistor in series with + the battery; +- ti,ibatcomp-clamp-microvolt: integer, maximum charging voltage adjustment due + to expected voltage drop on in-series resistor; Example: diff --git a/Documentation/devicetree/bindings/power/supply/bq25980.yaml b/Documentation/devicetree/bindings/power/supply/bq25980.yaml new file mode 100644 index 0000000000000..f6b3dd4093caa --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/bq25980.yaml @@ -0,0 +1,114 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2020 Texas Instruments Incorporated +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/power/supply/bq25980.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: TI BQ25980 Flash Charger + +maintainers: + - Dan Murphy + - Ricardo Rivera-Matos + +description: | + The BQ25980, BQ25975, and BQ25960 are a series of flash chargers intended + for use in high-power density portable electronics. These inductorless + switching chargers can provide over 97% efficiency by making use of the + switched capacitor architecture. + +allOf: + - $ref: power-supply.yaml# + +properties: + compatible: + enum: + - ti,bq25980 + - ti,bq25975 + - ti,bq25960 + + reg: + maxItems: 1 + + ti,watchdog-timeout-ms: + description: | + Watchdog timer in milli seconds. 0 disables the watchdog. + default: 0 + minimum: 0 + maximum: 300000 + enum: [ 0, 5000, 10000, 50000, 300000] + + ti,sc-ovp-limit-microvolt: + description: | + Minimum input voltage limit in micro volts with a when the charger is in + switch cap mode. 100000 micro volt step. + default: 17800000 + minimum: 14000000 + maximum: 22000000 + + ti,sc-ocp-limit-microamp: + description: | + Maximum input current limit in micro amps with a 100000 micro amp step. + minimum: 100000 + maximum: 3300000 + + ti,bypass-ovp-limit-microvolt: + description: | + Minimum input voltage limit in micro volts with a when the charger is in + switch cap mode. 50000 micro volt step. + minimum: 7000000 + maximum: 12750000 + + ti,bypass-ocp-limit-microamp: + description: | + Maximum input current limit in micro amps with a 100000 micro amp step. + minimum: 100000 + maximum: 3300000 + + ti,bypass-enable: + type: boolean + description: Enables bypass mode at boot time + + interrupts: + description: | + Indicates that the device state has changed. + + monitored-battery: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle to the battery node being monitored + +required: + - compatible + - reg + - monitored-battery + +unevaluatedProperties: false + +examples: + - | + bat: battery { + compatible = "simple-battery"; + constant-charge-current-max-microamp = <4000000>; + constant-charge-voltage-max-microvolt = <8400000>; + precharge-current-microamp = <160000>; + charge-term-current-microamp = <160000>; + }; + #include + #include + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + bq25980: charger@65 { + compatible = "ti,bq25980"; + reg = <0x65>; + interrupt-parent = <&gpio1>; + interrupts = <16 IRQ_TYPE_EDGE_FALLING>; + ti,watchdog-timer = <0>; + ti,sc-ocp-limit-microamp = <2000000>; + ti,sc-ovp-limit-microvolt = <17800000>; + monitored-battery = <&bat>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml b/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml index 82f682705f449..45beefccf31ad 100644 --- a/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml +++ b/Documentation/devicetree/bindings/power/supply/bq27xxx.yaml @@ -51,6 +51,7 @@ properties: - ti,bq27621 - ti,bq27z561 - ti,bq28z610 + - ti,bq34z100 reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/power/supply/charger-manager.txt b/Documentation/devicetree/bindings/power/supply/charger-manager.txt index ec4fe9de31373..b5ae9061b7a09 100644 --- a/Documentation/devicetree/bindings/power/supply/charger-manager.txt +++ b/Documentation/devicetree/bindings/power/supply/charger-manager.txt @@ -3,24 +3,32 @@ charger-manager bindings Required properties : - compatible : "charger-manager" - - <>-supply : for regulator consumer - - cm-num-chargers : number of chargers + - <>-supply : for regulator consumer, named according to cm-regulator-name - cm-chargers : name of chargers - cm-fuel-gauge : name of battery fuel gauge - subnode : - cm-regulator-name : name of charger regulator - subnode : - - cm-cable-name : name of charger cable + - cm-cable-name : name of charger cable - one of USB, USB-HOST, + SDP, DCP, CDP, ACA, FAST-CHARGER, SLOW-CHARGER, WPT, + PD, DOCK, JIG, or MECHANICAL - cm-cable-extcon : name of extcon dev (optional) - cm-cable-min : minimum current of cable (optional) - cm-cable-max : maximum current of cable Optional properties : - cm-name : charger manager's name (default : "battery") - - cm-poll-mode : polling mode (enum polling_modes) - - cm-poll-interval : polling interval - - cm-battery-stat : battery status (enum data_source) - - cm-fullbatt-* : data for full battery checking + - cm-poll-mode : polling mode - 0 for disabled, 1 for always, 2 for when + external power is connected, or 3 for when charging. If not present, + then polling is disabled + - cm-poll-interval : polling interval (in ms) + - cm-battery-stat : battery status - 0 for battery always present, 1 for no + battery, 2 to check presence via fuel gauge, or 3 to check presence + via charger + - cm-fullbatt-vchkdrop-volt : voltage drop (in uV) before restarting charging + - cm-fullbatt-voltage : voltage (in uV) of full battery + - cm-fullbatt-soc : state of charge to consider as full battery + - cm-fullbatt-capacity : capcity (in uAh) to consider as full battery - cm-thermal-zone : name of external thermometer's thermal zone - cm-battery-* : threshold battery temperature for charging -cold : critical cold temperature of battery for charging @@ -29,6 +37,10 @@ Optional properties : -temp-diff : temperature difference to allow recharging - cm-dis/charging-max = limits of charging duration +Deprecated properties: + - cm-num-chargers + - cm-fullbatt-vchkdrop-ms + Example : charger-manager@0 { compatible = "charger-manager"; @@ -39,13 +51,11 @@ Example : cm-poll-mode = <1>; cm-poll-interval = <30000>; - cm-fullbatt-vchkdrop-ms = <30000>; cm-fullbatt-vchkdrop-volt = <150000>; cm-fullbatt-soc = <100>; cm-battery-stat = <3>; - cm-num-chargers = <3>; cm-chargers = "charger0", "charger1", "charger2"; cm-fuel-gauge = "fuelgauge0"; @@ -71,7 +81,7 @@ Example : cm-cable-max = <500000>; }; cable@1 { - cm-cable-name = "TA"; + cm-cable-name = "SDP"; cm-cable-extcon = "extcon-dev.0"; cm-cable-min = <650000>; cm-cable-max = <675000>; diff --git a/Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml b/Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml index 2036977ecc2f4..ee92e6a076ac8 100644 --- a/Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml +++ b/Documentation/devicetree/bindings/power/supply/cw2015_battery.yaml @@ -52,6 +52,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/power/supply/gpio-charger.yaml b/Documentation/devicetree/bindings/power/supply/gpio-charger.yaml index 6244b8ee94020..89f8e2bcb2d78 100644 --- a/Documentation/devicetree/bindings/power/supply/gpio-charger.yaml +++ b/Documentation/devicetree/bindings/power/supply/gpio-charger.yaml @@ -39,6 +39,25 @@ properties: maxItems: 1 description: GPIO indicating the charging status + charge-current-limit-gpios: + minItems: 1 + maxItems: 32 + description: GPIOs used for current limiting + + charge-current-limit-mapping: + description: List of tuples with current in uA and a GPIO bitmap (in + this order). The tuples must be provided in descending order of the + current limit. + $ref: /schemas/types.yaml#/definitions/uint32-matrix + items: + items: + - description: + Current limit in uA + - description: + Encoded GPIO setting. Bit 0 represents last GPIO from the + charge-current-limit-gpios property. Bit 1 second to last + GPIO and so on. + required: - compatible @@ -47,6 +66,12 @@ anyOf: - gpios - required: - charge-status-gpios + - required: + - charge-current-limit-gpios + +dependencies: + charge-current-limit-gpios: [ charge-current-limit-mapping ] + charge-current-limit-mapping: [ charge-current-limit-gpios ] additionalProperties: false @@ -60,4 +85,10 @@ examples: gpios = <&gpd 28 GPIO_ACTIVE_LOW>; charge-status-gpios = <&gpc 27 GPIO_ACTIVE_LOW>; + + charge-current-limit-gpios = <&gpioA 11 GPIO_ACTIVE_HIGH>, + <&gpioA 12 GPIO_ACTIVE_HIGH>; + charge-current-limit-mapping = <2500000 0x00>, // 2.5 A => both GPIOs low + <700000 0x01>, // 700 mA => GPIO A.12 high + <0 0x02>; // 0 mA => GPIO A.11 high }; diff --git a/Documentation/devicetree/bindings/power/supply/ingenic,battery.txt b/Documentation/devicetree/bindings/power/supply/ingenic,battery.txt deleted file mode 100644 index 66430bf738151..0000000000000 --- a/Documentation/devicetree/bindings/power/supply/ingenic,battery.txt +++ /dev/null @@ -1,31 +0,0 @@ -* Ingenic JZ47xx battery bindings - -Required properties: - -- compatible: Must be "ingenic,jz4740-battery". -- io-channels: phandle and IIO specifier pair to the IIO device. - Format described in iio-bindings.txt. -- monitored-battery: phandle to a "simple-battery" compatible node. - -The "monitored-battery" property must be a phandle to a node using the format -described in battery.txt, with the following properties being required: - -- voltage-min-design-microvolt: Drained battery voltage. -- voltage-max-design-microvolt: Fully charged battery voltage. - -Example: - -#include - -simple_battery: battery { - compatible = "simple-battery"; - voltage-min-design-microvolt = <3600000>; - voltage-max-design-microvolt = <4200000>; -}; - -ingenic_battery { - compatible = "ingenic,jz4740-battery"; - io-channels = <&adc INGENIC_ADC_BATTERY>; - io-channel-names = "battery"; - monitored-battery = <&simple_battery>; -}; diff --git a/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml b/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml new file mode 100644 index 0000000000000..867e3e6b7e80f --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/ingenic,battery.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019-2020 Artur Rojek +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/power/supply/ingenic,battery.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Ingenic JZ47xx battery bindings + +maintainers: + - Artur Rojek + +properties: + compatible: + oneOf: + - const: ingenic,jz4740-battery + - items: + - enum: + - ingenic,jz4725b-battery + - ingenic,jz4770-battery + - const: ingenic,jz4740-battery + + io-channels: + maxItems: 1 + + io-channel-names: + const: battery + + monitored-battery: + description: > + phandle to a "simple-battery" compatible node. + + This property must be a phandle to a node using the format described + in battery.yaml, with the following properties being required: + - voltage-min-design-microvolt: drained battery voltage, + - voltage-max-design-microvolt: fully charged battery voltage. + +required: + - compatible + - io-channels + - io-channel-names + - monitored-battery + +additionalProperties: false + +examples: + - | + #include + + simple_battery: battery { + compatible = "simple-battery"; + voltage-min-design-microvolt = <3600000>; + voltage-max-design-microvolt = <4200000>; + }; + + ingenic-battery { + compatible = "ingenic,jz4740-battery"; + io-channels = <&adc INGENIC_ADC_BATTERY>; + io-channel-names = "battery"; + monitored-battery = <&simple_battery>; + }; diff --git a/Documentation/devicetree/bindings/power/supply/max17040_battery.txt b/Documentation/devicetree/bindings/power/supply/max17040_battery.txt index 4e0186b8380fa..c802f664b5085 100644 --- a/Documentation/devicetree/bindings/power/supply/max17040_battery.txt +++ b/Documentation/devicetree/bindings/power/supply/max17040_battery.txt @@ -2,7 +2,9 @@ max17040_battery ~~~~~~~~~~~~~~~~ Required properties : - - compatible : "maxim,max17040" or "maxim,max77836-battery" + - compatible : "maxim,max17040", "maxim,max17041", "maxim,max17043", + "maxim,max17044", "maxim,max17048", "maxim,max17049", + "maxim,max17058", "maxim,max17059" or "maxim,max77836-battery" - reg: i2c slave address Optional properties : @@ -11,6 +13,15 @@ Optional properties : generated. Can be configured from 1 up to 32 (%). If skipped the power up default value of 4 (%) will be used. +- maxim,double-soc : Certain devices return double the capacity. + Specify this boolean property to divide the + reported value in 2 and thus normalize it. + SOC == State of Charge == Capacity. +- maxim,rcomp : A value to compensate readings for various + battery chemistries and operating temperatures. + max17040,41 have 2 byte rcomp, default to + 0x97 0x00. All other devices have one byte + rcomp, default to 0x97. - interrupts : Interrupt line see Documentation/devicetree/ bindings/interrupt-controller/interrupts.txt - wakeup-source : This device has wakeup capabilities. Use this @@ -31,3 +42,11 @@ Example: interrupts = <2 IRQ_TYPE_EDGE_FALLING>; wakeup-source; }; + + battery-fuel-gauge@36 { + compatible = "maxim,max17048"; + reg = <0x36>; + maxim,rcomp = /bits/ 8 <0x56>; + maxim,alert-low-soc-level = <10>; + maxim,double-soc; + }; diff --git a/Documentation/devicetree/bindings/power/supply/power-supply.yaml b/Documentation/devicetree/bindings/power/supply/power-supply.yaml index 3bb02bb3a2d8b..c5c55f6272517 100644 --- a/Documentation/devicetree/bindings/power/supply/power-supply.yaml +++ b/Documentation/devicetree/bindings/power/supply/power-supply.yaml @@ -16,6 +16,8 @@ properties: This property is added to a supply in order to list the devices which supply it power, referenced by their phandles. +additionalProperties: true + examples: - | power { diff --git a/Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml b/Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml index 7e0f73a898c7c..9852d2febf651 100644 --- a/Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml +++ b/Documentation/devicetree/bindings/power/supply/rohm,bd99954.yaml @@ -112,6 +112,12 @@ properties: # threshold, and the current is below this setting (7 in above chart) # See also Documentation/devicetree/bindings/power/supply/battery.txt + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + monitored-battery: description: phandle of battery characteristics devicetree node @@ -137,6 +143,8 @@ properties: required: - compatible +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml b/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml new file mode 100644 index 0000000000000..193a23af2007b --- /dev/null +++ b/Documentation/devicetree/bindings/power/supply/summit,smb347-charger.yaml @@ -0,0 +1,152 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/power/supply/summit,smb347-charger.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Battery charger driver for SMB345, SMB347 and SMB358 + +maintainers: + - David Heidelberg + - Dmitry Osipenko + +properties: + compatible: + enum: + - summit,smb345 + - summit,smb347 + - summit,smb358 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + monitored-battery: + description: phandle to the battery node + $ref: /schemas/types.yaml#/definitions/phandle + + summit,enable-usb-charging: + type: boolean + description: Enable charging through USB. + + summit,enable-otg-charging: + type: boolean + description: Provide power for USB OTG + + summit,enable-mains-charging: + type: boolean + description: Enable charging through mains + + summit,enable-charge-control: + description: Enable charging control + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # SMB3XX_CHG_ENABLE_SW SW (I2C interface) + - 1 # SMB3XX_CHG_ENABLE_PIN_ACTIVE_LOW Pin control (Active Low) + - 2 # SMB3XX_CHG_ENABLE_PIN_ACTIVE_HIGH Pin control (Active High) + + summit,fast-voltage-threshold-microvolt: + description: Voltage threshold to transit to fast charge mode (in uV) + minimum: 2400000 + maximum: 3000000 + + summit,mains-current-limit-microamp: + description: Maximum input current from AC/DC input (in uA) + + summit,usb-current-limit-microamp: + description: Maximum input current from USB input (in uA) + + summit,charge-current-compensation-microamp: + description: Charge current compensation (in uA) + + summit,chip-temperature-threshold-celsius: + description: Chip temperature for thermal regulation in °C. + enum: [100, 110, 120, 130] + + summit,soft-compensation-method: + description: Soft temperature limit compensation method + $ref: /schemas/types.yaml#/definitions/uint32 + enum: + - 0 # SMB3XX_SOFT_TEMP_COMPENSATE_NONE Compensation none + - 1 # SMB3XX_SOFT_TEMP_COMPENSATE_CURRENT Current compensation + - 2 # SMB3XX_SOFT_TEMP_COMPENSATE_VOLTAGE Voltage compensation + +allOf: + - if: + properties: + compatible: + enum: + - summit,smb345 + - summit,smb358 + + then: + properties: + summit,mains-current-limit-microamp: + enum: [ 300000, 500000, 700000, 1000000, + 1500000, 1800000, 2000000] + + summit,usb-current-limit-microamp: + enum: [ 300000, 500000, 700000, 1000000, + 1500000, 1800000, 2000000] + + summit,charge-current-compensation-microamp: + enum: [200000, 450000, 600000, 900000] + + else: + properties: + summit,mains-current-limit-microamp: + enum: [ 300000, 500000, 700000, 900000, 1200000, + 1500000, 1800000, 2000000, 2200000, 2500000] + + summit,usb-current-limit-microamp: + enum: [ 300000, 500000, 700000, 900000, 1200000, + 1500000, 1800000, 2000000, 2200000, 2500000] + + summit,charge-current-compensation-microamp: + enum: [250000, 700000, 900000, 1200000] + +required: + - compatible + - reg + +anyOf: + - required: + - summit,enable-usb-charging + - required: + - summit,enable-otg-charging + - required: + - summit,enable-mains-charging + +additionalProperties: false + +examples: + - | + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + charger@7f { + compatible = "summit,smb347"; + reg = <0x7f>; + + summit,enable-charge-control = ; + summit,chip-temperature-threshold-celsius = <110>; + summit,mains-current-limit-microamp = <2000000>; + summit,usb-current-limit-microamp = <500000>; + summit,enable-usb-charging; + summit,enable-mains-charging; + + monitored-battery = <&battery>; + }; + }; + + battery: battery-cell { + compatible = "simple-battery"; + constant-charge-current-max-microamp = <1800000>; + operating-range-celsius = <0 45>; + alert-celsius = <3 42>; + }; diff --git a/Documentation/devicetree/bindings/powerpc/sleep.yaml b/Documentation/devicetree/bindings/powerpc/sleep.yaml new file mode 100644 index 0000000000000..6494c7d08b93a --- /dev/null +++ b/Documentation/devicetree/bindings/powerpc/sleep.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/powerpc/sleep.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PowerPC sleep property + +maintainers: + - Rob Herring + +description: | + Devices on SOCs often have mechanisms for placing devices into low-power + states that are decoupled from the devices' own register blocks. Sometimes, + this information is more complicated than a cell-index property can + reasonably describe. Thus, each device controlled in such a manner + may contain a "sleep" property which describes these connections. + + The sleep property consists of one or more sleep resources, each of + which consists of a phandle to a sleep controller, followed by a + controller-specific sleep specifier of zero or more cells. + + The semantics of what type of low power modes are possible are defined + by the sleep controller. Some examples of the types of low power modes + that may be supported are: + + - Dynamic: The device may be disabled or enabled at any time. + - System Suspend: The device may request to be disabled or remain + awake during system suspend, but will not be disabled until then. + - Permanent: The device is disabled permanently (until the next hard + reset). + + Some devices may share a clock domain with each other, such that they should + only be suspended when none of the devices are in use. Where reasonable, + such nodes should be placed on a virtual bus, where the bus has the sleep + property. If the clock domain is shared among devices that cannot be + reasonably grouped in this manner, then create a virtual sleep controller + (similar to an interrupt nexus, except that defining a standardized + sleep-map should wait until its necessity is demonstrated). + +select: true + +properties: + sleep: + $ref: /schemas/types.yaml#definitions/phandle-array + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/ptp/ptp-qoriq.txt b/Documentation/devicetree/bindings/ptp/ptp-qoriq.txt index d48f9eb3636eb..743eda754e65c 100644 --- a/Documentation/devicetree/bindings/ptp/ptp-qoriq.txt +++ b/Documentation/devicetree/bindings/ptp/ptp-qoriq.txt @@ -18,6 +18,8 @@ Clock Properties: - fsl,tmr-add Frequency compensation value. - fsl,tmr-fiper1 Fixed interval period pulse generator. - fsl,tmr-fiper2 Fixed interval period pulse generator. + - fsl,tmr-fiper3 Fixed interval period pulse generator. + Supported only on DPAA2 and ENETC hardware. - fsl,max-adj Maximum frequency adjustment in parts per billion. - fsl,extts-fifo The presence of this property indicates hardware support for the external trigger stamp FIFO. diff --git a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml index 41ece1d853152..4cfbffd8414a5 100644 --- a/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/google,cros-ec-pwm.yaml @@ -14,7 +14,7 @@ description: | Google's ChromeOS EC PWM is a simple PWM attached to the Embedded Controller (EC) and controlled via a host-command interface. An EC PWM node should be only found as a sub-node of the EC node (see - Documentation/devicetree/bindings/mfd/cros-ec.txt). + Documentation/devicetree/bindings/mfd/google,cros-ec.yaml). properties: compatible: diff --git a/Documentation/devicetree/bindings/pwm/imx-pwm.yaml b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml index 01df06777cba4..379d693889f63 100644 --- a/Documentation/devicetree/bindings/pwm/imx-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/imx-pwm.yaml @@ -19,9 +19,28 @@ properties: - 3 compatible: - enum: - - fsl,imx1-pwm - - fsl,imx27-pwm + oneOf: + - enum: + - fsl,imx1-pwm + - fsl,imx27-pwm + - items: + - enum: + - fsl,imx25-pwm + - fsl,imx31-pwm + - fsl,imx50-pwm + - fsl,imx51-pwm + - fsl,imx53-pwm + - fsl,imx6q-pwm + - fsl,imx6sl-pwm + - fsl,imx6sll-pwm + - fsl,imx6sx-pwm + - fsl,imx6ul-pwm + - fsl,imx7d-pwm + - fsl,imx8mm-pwm + - fsl,imx8mn-pwm + - fsl,imx8mp-pwm + - fsl,imx8mq-pwm + - const: fsl,imx27-pwm reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml b/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml new file mode 100644 index 0000000000000..981cfec53f372 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/kontron,sl28cpld-pwm.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/kontron,sl28cpld-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PWM driver for the sl28cpld board management controller + +maintainers: + - Michael Walle + +description: | + This module is part of the sl28cpld multi-function device. For more + details see ../mfd/kontron,sl28cpld.yaml. + + The controller supports one PWM channel and supports only four distinct + frequencies (250Hz, 500Hz, 1kHz, 2kHz). + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + const: kontron,sl28cpld-pwm + + reg: + maxItems: 1 + + "#pwm-cells": + const: 2 + +required: + - compatible + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.txt b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt deleted file mode 100644 index 3d1dd7b06efc3..0000000000000 --- a/Documentation/devicetree/bindings/pwm/pwm-sifive.txt +++ /dev/null @@ -1,33 +0,0 @@ -SiFive PWM controller - -Unlike most other PWM controllers, the SiFive PWM controller currently only -supports one period for all channels in the PWM. All PWMs need to run at -the same period. The period also has significant restrictions on the values -it can achieve, which the driver rounds to the nearest achievable period. -PWM RTL that corresponds to the IP block version numbers can be found -here: - -https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm - -Required properties: -- compatible: Should be "sifive,-pwm" and "sifive,pwm". - Supported compatible strings are: "sifive,fu540-c000-pwm" for the SiFive - PWM v0 as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the - SiFive PWM v0 IP block with no chip integration tweaks. - Please refer to sifive-blocks-ip-versioning.txt for details. -- reg: physical base address and length of the controller's registers -- clocks: Should contain a clock identifier for the PWM's parent clock. -- #pwm-cells: Should be 3. See pwm.yaml in this directory - for a description of the cell format. -- interrupts: one interrupt per PWM channel - -Examples: - -pwm: pwm@10020000 { - compatible = "sifive,fu540-c000-pwm", "sifive,pwm0"; - reg = <0x0 0x10020000 0x0 0x1000>; - clocks = <&tlclk>; - interrupt-parent = <&plic>; - interrupts = <42 43 44 45>; - #pwm-cells = <3>; -}; diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml new file mode 100644 index 0000000000000..5ac25275d8bff --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2020 SiFive, Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SiFive PWM controller + +maintainers: + - Yash Shah + - Sagar Kadam + - Paul Walmsley + +description: + Unlike most other PWM controllers, the SiFive PWM controller currently + only supports one period for all channels in the PWM. All PWMs need to + run at the same period. The period also has significant restrictions on + the values it can achieve, which the driver rounds to the nearest + achievable period. PWM RTL that corresponds to the IP block version + numbers can be found here - + + https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm + +properties: + compatible: + items: + - const: sifive,fu540-c000-pwm + - const: sifive,pwm0 + description: + Should be "sifive,-pwm" and "sifive,pwm". Supported + compatible strings are "sifive,fu540-c000-pwm" for the SiFive PWM v0 + as integrated onto the SiFive FU540 chip, and "sifive,pwm0" for the + SiFive PWM v0 IP block with no chip integration tweaks. + Please refer to sifive-blocks-ip-versioning.txt for details. + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + "#pwm-cells": + const: 3 + + interrupts: + maxItems: 4 + description: + Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator. + +required: + - compatible + - reg + - clocks + - "#pwm-cells" + - interrupts + +additionalProperties: false + +examples: + - | + pwm: pwm@10020000 { + compatible = "sifive,fu540-c000-pwm", "sifive,pwm0"; + reg = <0x10020000 0x1000>; + clocks = <&tlclk>; + interrupt-parent = <&plic>; + interrupts = <42>, <43>, <44>, <45>; + #pwm-cells = <3>; + }; diff --git a/Documentation/devicetree/bindings/pwm/pwm.yaml b/Documentation/devicetree/bindings/pwm/pwm.yaml index fa4f9de920909..7d1f687cee9cd 100644 --- a/Documentation/devicetree/bindings/pwm/pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm.yaml @@ -20,6 +20,8 @@ properties: required: - "#pwm-cells" +additionalProperties: true + examples: - | pwm: pwm@7000a000 { diff --git a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml index daadde9ff9c4f..3c2fa2e93d1b1 100644 --- a/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml +++ b/Documentation/devicetree/bindings/pwm/renesas,pwm-rcar.yaml @@ -13,6 +13,7 @@ properties: compatible: items: - enum: + - renesas,pwm-r8a7742 # RZ/G1H - renesas,pwm-r8a7743 # RZ/G1M - renesas,pwm-r8a7744 # RZ/G1N - renesas,pwm-r8a7745 # RZ/G1E @@ -20,6 +21,7 @@ properties: - renesas,pwm-r8a774a1 # RZ/G2M - renesas,pwm-r8a774b1 # RZ/G2N - renesas,pwm-r8a774c0 # RZ/G2E + - renesas,pwm-r8a774e1 # RZ/G2H - renesas,pwm-r8a7778 # R-Car M1A - renesas,pwm-r8a7779 # R-Car H1 - renesas,pwm-r8a7790 # R-Car H2 diff --git a/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml b/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml index 4bf62a3d5bba8..aa9a4570c9068 100644 --- a/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/renesas,tpu-pwm.yaml @@ -15,6 +15,7 @@ properties: - enum: - renesas,tpu-r8a73a4 # R-Mobile APE6 - renesas,tpu-r8a7740 # R-Mobile A1 + - renesas,tpu-r8a7742 # RZ/G1H - renesas,tpu-r8a7743 # RZ/G1M - renesas,tpu-r8a7744 # RZ/G1N - renesas,tpu-r8a7745 # RZ/G1E diff --git a/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml b/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml index 3dbb9cf86f159..92211f2b3b0c0 100644 --- a/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/fixed-regulator.yaml @@ -73,6 +73,8 @@ required: - compatible - regulator-name +unevaluatedProperties: false + examples: - | reg_1v8: regulator-1v8 { diff --git a/Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml b/Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml index c9453d7ce227b..69e5402da7612 100644 --- a/Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/google,cros-ec-regulator.yaml @@ -28,6 +28,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | spi0 { diff --git a/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml b/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml index 605590384b48f..f7e3d8fd3bf35 100644 --- a/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/gpio-regulator.yaml @@ -91,6 +91,8 @@ required: - gpios - states +unevaluatedProperties: false + examples: - | gpio-regulator { diff --git a/Documentation/devicetree/bindings/regulator/mp886x.txt b/Documentation/devicetree/bindings/regulator/mp886x.txt deleted file mode 100644 index 551867829459f..0000000000000 --- a/Documentation/devicetree/bindings/regulator/mp886x.txt +++ /dev/null @@ -1,27 +0,0 @@ -Monolithic Power Systems MP8867/MP8869 voltage regulator - -Required properties: -- compatible: Must be one of the following. - "mps,mp8867" - "mps,mp8869" -- reg: I2C slave address. -- enable-gpios: enable gpios. -- mps,fb-voltage-divider: An array of two integers containing the resistor - values R1 and R2 of the feedback voltage divider in kilo ohms. - -Any property defined as part of the core regulator binding, defined in -./regulator.txt, can also be used. - -Example: - - vcpu: regulator@62 { - compatible = "mps,mp8869"; - regulator-name = "vcpu"; - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <850000>; - regulator-always-on; - regulator-boot-on; - enable-gpios = <&porta 1 GPIO_ACTIVE_LOW>; - mps,fb-voltage-divider = <80 240>; - reg = <0x62>; - }; diff --git a/Documentation/devicetree/bindings/regulator/mps,mp886x.yaml b/Documentation/devicetree/bindings/regulator/mps,mp886x.yaml new file mode 100644 index 0000000000000..ba175b30f4686 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mps,mp886x.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mps,mp886x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Monolithic Power Systems MP8867/MP8869 voltage regulator + +maintainers: + - Jisheng Zhang + +allOf: + - $ref: regulator.yaml# + +properties: + compatible: + enum: + - mps,mp8867 + - mps,mp8869 + + reg: + maxItems: 1 + + enable-gpios: + description: GPIO to enable/disable the regulator. + maxItems: 1 + + mps,fb-voltage-divider: + description: An array of two integers containing the resistor + values R1 and R2 of the feedback voltage divider in kilo ohms. + $ref: "/schemas/types.yaml#/definitions/uint32-array" + maxItems: 2 + + mps,switch-frequency-hz: + description: The valid switch frequency in Hertz. + enum: [500000, 750000, 1000000, 1250000, 1500000] + +required: + - compatible + - reg + - enable-gpios + - mps,fb-voltage-divider + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + regulator@62 { + compatible = "mps,mp8869"; + regulator-name = "vcpu"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + enable-gpios = <&porta 1 GPIO_ACTIVE_LOW>; + mps,fb-voltage-divider = <80 240>; + reg = <0x62>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml b/Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml new file mode 100644 index 0000000000000..a462d99a25cc6 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mt6360-regulator.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mt6360-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MT6360 Regulator from MediaTek Integrated + +maintainers: + - Gene Chen + +description: | + list of regulators provided by this controller, must be named + after their hardware counterparts buck1/2 or ldo1/2/3/5/6/7 + +properties: + compatible: + const: mediatek,mt6360-regulator + + LDO_VIN1-supply: + description: Input supply phandle(s) for LDO1/2/3 + LDO_VIN2-supply: + description: Input supply phandle(s) for LDO5 + LDO_VIN3-supply: + description: Input supply phandle(s) for LDO6/7 + +patternProperties: + "^buck[12]$": + $ref: "regulator.yaml#" + + "^ldo[123567]$": + $ref: "regulator.yaml#" + +required: + - compatible + +additionalProperties: false + +examples: + - | + #include + #include + regulator { + compatible = "mediatek,mt6360-regulator"; + LDO_VIN3-supply = <&BUCK2>; + buck1 { + regulator-compatible = "BUCK1"; + regulator-name = "mt6360,buck1"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1300000>; + regulator-allowed-modes = ; + }; + BUCK2: buck2 { + regulator-compatible = "BUCK2"; + regulator-name = "mt6360,buck2"; + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1300000>; + regulator-allowed-modes = ; + }; + ldo6 { + regulator-compatible = "LDO6"; + regulator-name = "mt6360,ldo6"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2100000>; + regulator-allowed-modes = ; + }; + ldo7 { + regulator-compatible = "LDO7"; + regulator-name = "mt6360,ldo7"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <2100000>; + regulator-allowed-modes = ; + }; + ldo1 { + regulator-compatible = "LDO1"; + regulator-name = "mt6360,ldo1"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-allowed-modes = ; + }; + ldo2 { + regulator-compatible = "LDO2"; + regulator-name = "mt6360,ldo2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-allowed-modes = ; + }; + ldo3 { + regulator-compatible = "LDO3"; + regulator-name = "mt6360,ldo3"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <3600000>; + regulator-allowed-modes = ; + }; + ldo5 { + regulator-compatible = "LDO5"; + regulator-name = "mt6360,ldo5"; + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3600000>; + regulator-allowed-modes = ; + }; + }; +... diff --git a/Documentation/devicetree/bindings/regulator/pfuze100.txt b/Documentation/devicetree/bindings/regulator/pfuze100.txt deleted file mode 100644 index 4d3b12b92cb3c..0000000000000 --- a/Documentation/devicetree/bindings/regulator/pfuze100.txt +++ /dev/null @@ -1,394 +0,0 @@ -PFUZE100 family of regulators - -Required properties: -- compatible: "fsl,pfuze100", "fsl,pfuze200", "fsl,pfuze3000", "fsl,pfuze3001" -- reg: I2C slave address - -Optional properties: -- fsl,pfuze-support-disable-sw: Boolean, if present disable all unused switch - regulators to save power consumption. Attention, ensure that all important - regulators (e.g. DDR ref, DDR supply) has set the "regulator-always-on" - property. If not present, the switched regulators are always on and can't be - disabled. This binding is a workaround to keep backward compatibility with - old dtb's which rely on the fact that the switched regulators are always on - and don't mark them explicit as "regulator-always-on". -- fsl,pmic-stby-poweroff: if present, configure the PMIC to shutdown all - power rails when PMIC_STBY_REQ line is asserted during the power off sequence. - Use this option if the SoC should be powered off by external power - management IC (PMIC) on PMIC_STBY_REQ signal. - As opposite to PMIC_STBY_REQ boards can implement PMIC_ON_REQ signal. - -Required child node: -- regulators: This is the list of child nodes that specify the regulator - initialization data for defined regulators. Please refer to below doc - Documentation/devicetree/bindings/regulator/regulator.txt. - - The valid names for regulators are: - --PFUZE100 - sw1ab,sw1c,sw2,sw3a,sw3b,sw4,swbst,vsnvs,vrefddr,vgen1~vgen6 - --PFUZE200 - sw1ab,sw2,sw3a,sw3b,swbst,vsnvs,vrefddr,vgen1~vgen6,coin - --PFUZE3000 - sw1a,sw1b,sw2,sw3,swbst,vsnvs,vrefddr,vldo1,vldo2,vccsd,v33,vldo3,vldo4 - --PFUZE3001 - sw1,sw2,sw3,vsnvs,vldo1,vldo2,vccsd,v33,vldo3,vldo4 - -Each regulator is defined using the standard binding for regulators. - -Example 1: PFUZE100 - - pfuze100: pmic@8 { - compatible = "fsl,pfuze100"; - reg = <0x08>; - - regulators { - sw1a_reg: sw1ab { - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1875000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <6250>; - }; - - sw1c_reg: sw1c { - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1875000>; - regulator-boot-on; - regulator-always-on; - }; - - sw2_reg: sw2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3a_reg: sw3a { - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <1975000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3b_reg: sw3b { - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <1975000>; - regulator-boot-on; - regulator-always-on; - }; - - sw4_reg: sw4 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3300000>; - }; - - swbst_reg: swbst { - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5150000>; - }; - - snvs_reg: vsnvs { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3000000>; - regulator-boot-on; - regulator-always-on; - }; - - vref_reg: vrefddr { - regulator-boot-on; - regulator-always-on; - }; - - vgen1_reg: vgen1 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - }; - - vgen2_reg: vgen2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - }; - - vgen3_reg: vgen3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - - vgen4_reg: vgen4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen5_reg: vgen5 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen6_reg: vgen6 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - }; - }; - - -Example 2: PFUZE200 - - pfuze200: pmic@8 { - compatible = "fsl,pfuze200"; - reg = <0x08>; - - regulators { - sw1a_reg: sw1ab { - regulator-min-microvolt = <300000>; - regulator-max-microvolt = <1875000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <6250>; - }; - - sw2_reg: sw2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3a_reg: sw3a { - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <1975000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3b_reg: sw3b { - regulator-min-microvolt = <400000>; - regulator-max-microvolt = <1975000>; - regulator-boot-on; - regulator-always-on; - }; - - swbst_reg: swbst { - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5150000>; - }; - - snvs_reg: vsnvs { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3000000>; - regulator-boot-on; - regulator-always-on; - }; - - vref_reg: vrefddr { - regulator-boot-on; - regulator-always-on; - }; - - vgen1_reg: vgen1 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - }; - - vgen2_reg: vgen2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - }; - - vgen3_reg: vgen3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - }; - - vgen4_reg: vgen4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen5_reg: vgen5 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen6_reg: vgen6 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - coin_reg: coin { - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - }; - }; - -Example 3: PFUZE3000 - - pfuze3000: pmic@8 { - compatible = "fsl,pfuze3000"; - reg = <0x08>; - - regulators { - sw1a_reg: sw1a { - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1475000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <6250>; - }; - /* use sw1c_reg to align with pfuze100/pfuze200 */ - sw1c_reg: sw1b { - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1475000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <6250>; - }; - - sw2_reg: sw2 { - regulator-min-microvolt = <2500000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3a_reg: sw3 { - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1650000>; - regulator-boot-on; - regulator-always-on; - }; - - swbst_reg: swbst { - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5150000>; - }; - - snvs_reg: vsnvs { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3000000>; - regulator-boot-on; - regulator-always-on; - }; - - vref_reg: vrefddr { - regulator-boot-on; - regulator-always-on; - }; - - vgen1_reg: vldo1 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen2_reg: vldo2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - }; - - vgen3_reg: vccsd { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen4_reg: v33 { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <3300000>; - }; - - vgen5_reg: vldo3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen6_reg: vldo4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - }; - }; - -Example 4: PFUZE 3001 - - pfuze3001: pmic@8 { - compatible = "fsl,pfuze3001"; - reg = <0x08>; - - regulators { - sw1_reg: sw1 { - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - sw2_reg: sw2 { - regulator-min-microvolt = <1500000>; - regulator-max-microvolt = <3300000>; - regulator-boot-on; - regulator-always-on; - }; - - sw3_reg: sw3 { - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <1650000>; - regulator-boot-on; - regulator-always-on; - }; - - snvs_reg: vsnvs { - regulator-min-microvolt = <1000000>; - regulator-max-microvolt = <3000000>; - regulator-boot-on; - regulator-always-on; - }; - - vgen1_reg: vldo1 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen2_reg: vldo2 { - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1550000>; - regulator-always-on; - }; - - vgen3_reg: vccsd { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen4_reg: v33 { - regulator-min-microvolt = <2850000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen5_reg: vldo3 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - - vgen6_reg: vldo4 { - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - regulator-always-on; - }; - }; - }; diff --git a/Documentation/devicetree/bindings/regulator/pfuze100.yaml b/Documentation/devicetree/bindings/regulator/pfuze100.yaml new file mode 100644 index 0000000000000..c6de49685db7f --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/pfuze100.yaml @@ -0,0 +1,186 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/pfuze100.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: PFUZE100 family of regulators + +maintainers: + - Robin Gong + +description: | + The valid names for regulators are: + --PFUZE100 + sw1ab,sw1c,sw2,sw3a,sw3b,sw4,swbst,vsnvs,vrefddr,vgen1~vgen6 + --PFUZE200 + sw1ab,sw2,sw3a,sw3b,swbst,vsnvs,vrefddr,vgen1~vgen6,coin + --PFUZE3000 + sw1a,sw1b,sw2,sw3,swbst,vsnvs,vrefddr,vldo1,vldo2,vccsd,v33,vldo3,vldo4 + --PFUZE3001 + sw1,sw2,sw3,vsnvs,vldo1,vldo2,vccsd,v33,vldo3,vldo4 + + Each regulator is defined using the standard binding for regulators. + +properties: + $nodename: + pattern: "^pmic@[0-9]$" + + compatible: + enum: + - fsl,pfuze100 + - fsl,pfuze200 + - fsl,pfuze3000 + - fsl,pfuze3001 + + reg: + maxItems: 1 + + fsl,pfuze-support-disable-sw: + $ref: /schemas/types.yaml#/definitions/flag + description: | + Boolean, if present disable all unused switch regulators to save power + consumption. Attention, ensure that all important regulators + (e.g. DDR ref, DDR supply) has set the "regulator-always-on" property. + If not present, the switched regulators are always on and can't be + disabled. This binding is a workaround to keep backward compatibility + with old dtb's which rely on the fact that the switched regulators are + always on and don't mark them explicit as "regulator-always-on". + + fsl,pmic-stby-poweroff: + $ref: /schemas/types.yaml#/definitions/flag + description: | + if present, configure the PMIC to shutdown all + power rails when PMIC_STBY_REQ line is asserted during the power off sequence. + Use this option if the SoC should be powered off by external power management + IC (PMIC) on PMIC_STBY_REQ signal. + As opposite to PMIC_STBY_REQ boards can implement PMIC_ON_REQ signal. + + regulators: + type: object + description: | + list of regulators provided by this controller. + + patternProperties: + "^sw([1-4]|[1-4][a-c]|[1-4][a-c][a-c])$": + $ref: "regulator.yaml#" + type: object + + "^vgen[1-6]$": + $ref: "regulator.yaml#" + type: object + + "^(vsnvs|vref|vrefddr|swbst|coin)$": + $ref: "regulator.yaml#" + type: object + + additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@8 { + compatible = "fsl,pfuze100"; + reg = <0x08>; + + regulators { + sw1a_reg: sw1ab { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + regulator-ramp-delay = <6250>; + }; + + sw1c_reg: sw1c { + regulator-min-microvolt = <300000>; + regulator-max-microvolt = <1875000>; + regulator-boot-on; + regulator-always-on; + }; + + sw2_reg: sw2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3a_reg: sw3a { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw3b_reg: sw3b { + regulator-min-microvolt = <400000>; + regulator-max-microvolt = <1975000>; + regulator-boot-on; + regulator-always-on; + }; + + sw4_reg: sw4 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <3300000>; + }; + + swbst_reg: swbst { + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5150000>; + }; + + snvs_reg: vsnvs { + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <3000000>; + regulator-boot-on; + regulator-always-on; + }; + + vref_reg: vrefddr { + regulator-boot-on; + regulator-always-on; + }; + + vgen1_reg: vgen1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen2_reg: vgen2 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1550000>; + }; + + vgen3_reg: vgen3 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + }; + + vgen4_reg: vgen4 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen5_reg: vgen5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + vgen6_reg: vgen6 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml index c0d7700afee75..a35c6cb9bf972 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,smd-rpm-regulator.yaml @@ -33,6 +33,10 @@ description: l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, lvs1, lvs2, lvs3, 5vs1, 5vs2 + For pm8950 and pm8953, s1, s2, s3, s4, s5, s6, s7, l1, l2, l3, l4, l5, l6, + l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, + l23 + For pm8994, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, l26, l27, l28, l29, l30, l31, l32, lvs1, lvs2 @@ -41,6 +45,11 @@ description: l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, l26, l27, l28, lvs1, lvs2 + For pm660, s1, s2, s3, s4, s5, s6, l1, l2, l3, l5, l6, l7, l8, l9, l10, l22, + l12, l13, l14, l15, l16, l17, l18, l19 + + For pm660l s1, s2, s3, s5, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, bob + For pma8084, s1, s2, s3, s4, s5, s6, s7, s8, s9, s10, s11, s12, l1, l2, l3, l4, l5, l6, l7, l8, l9, l10, l11, l12, l13, l14, l15, l16, l17, l18, l19, l20, l21, l22, l23, l24, l25, l26, l27, lvs1, lvs2, lvs3, lvs4, 5vs1 @@ -63,8 +72,11 @@ properties: - qcom,rpm-pm8916-regulators - qcom,rpm-pm8941-regulators - qcom,rpm-pm8950-regulators + - qcom,rpm-pm8953-regulators - qcom,rpm-pm8994-regulators - qcom,rpm-pm8998-regulators + - qcom,rpm-pm660-regulators + - qcom,rpm-pm660l-regulators - qcom,rpm-pma8084-regulators - qcom,rpm-pmi8994-regulators - qcom,rpm-pmi8998-regulators diff --git a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt index 8b005192f6e89..2b544059e029d 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt +++ b/Documentation/devicetree/bindings/regulator/qcom,spmi-regulator.txt @@ -12,6 +12,8 @@ Qualcomm SPMI Regulators "qcom,pm8950-regulators" "qcom,pm8994-regulators" "qcom,pmi8994-regulators" + "qcom,pm660-regulators" + "qcom,pm660l-regulators" "qcom,pms405-regulators" - interrupts: @@ -134,6 +136,35 @@ Qualcomm SPMI Regulators Definition: Reference to regulator supplying the input pin, as described in the data sheet. +- vdd_l1_l6_l7-supply: +- vdd_l2_l3-supply: +- vdd_l5-supply: +- vdd_l8_l9_l10_l11_l12_l13_l14-supply: +- vdd_l15_l16_l17_l18_l19-supply: +- vdd_s1-supply: +- vdd_s2-supply: +- vdd_s3-supply: +- vdd_s5-supply: +- vdd_s6-supply: + Usage: optional (pm660 only) + Value type: + Definition: Reference to regulator supplying the input pin, as + described in the data sheet. + +- vdd_l1_l9_l10-supply: +- vdd_l2-supply: +- vdd_l3_l5_l7_l8-supply: +- vdd_l4_l6-supply: +- vdd_s1-supply: +- vdd_s2-supply: +- vdd_s3-supply: +- vdd_s4-supply: +- vdd_s5-supply: + Usage: optional (pm660l only) + Value type: + Definition: Reference to regulator supplying the input pin, as + described in the data sheet. + - vdd_l1_l2-supply: - vdd_l3_l8-supply: - vdd_l4-supply: diff --git a/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml index fb111e2d5b99c..53853ec20fe24 100644 --- a/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom-labibb-regulator.yaml @@ -47,7 +47,7 @@ properties: required: - compatible -unevaluatedProperties: false +additionalProperties: false examples: - | diff --git a/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml b/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml new file mode 100644 index 0000000000000..0ae25d119b6f7 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml @@ -0,0 +1,44 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/raspberrypi,7inch-touchscreen-panel-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RaspberryPi 7" display ATTINY88-based regulator/backlight controller + +maintainers: + - Marek Vasut + +description: | + The RaspberryPi 7" display has an ATTINY88-based regulator/backlight + controller on the PCB, which is used to turn the display unit on/off + and control the backlight. + +allOf: + - $ref: "regulator.yaml#" + +properties: + compatible: + const: raspberrypi,7inch-touchscreen-panel-regulator + + reg: + maxItems: 1 + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + regulator@45 { + compatible = "raspberrypi,7inch-touchscreen-panel-regulator"; + reg = <0x45>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/regulator/regulator.yaml b/Documentation/devicetree/bindings/regulator/regulator.yaml index ec505dbbf87c0..6d0bc9cd40403 100644 --- a/Documentation/devicetree/bindings/regulator/regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/regulator.yaml @@ -188,6 +188,8 @@ patternProperties: additionalProperties: false +additionalProperties: true + examples: - | xyzreg: regulator { diff --git a/Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml new file mode 100644 index 0000000000000..235e593b3b2c0 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/richtek,rt4801-regulator.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/richtek,rt4801-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RT4801 Display Bias regulators + +maintainers: + - ChiYuan Huang + +description: | + Regulator nodes should be named to DSVP and DSVN. The + definition for each of these nodes is defined using the standard + binding for regulators at + Documentation/devicetree/bindings/regulator/regulator.txt. + Datasheet is available at + https://www.richtek.com/assets/product_file/RT4801H/DS4801H-00.pdf + +#The valid names for RT4801 regulator nodes are: +#DSVP, DSVN + +properties: + compatible: + enum: + - richtek,rt4801 + + reg: + maxItems: 1 + + enable-gpios: + description: GPIOs to use to enable DSVP/DSVN regulator. + The first one is ENP to enable DSVP, and second one is ENM to enable DSVN. + Number of GPIO in the array list could be 1 or 2. + If only one gpio is specified, only one gpio used to control ENP/ENM. + Else both are spefied, DSVP/DSVN could be controlled individually. + Othersie, this property not specified. treat both as always-on regulator. + minItems: 1 + maxItems: 2 + +patternProperties: + "^DSV(P|N)$": + type: object + $ref: regulator.yaml# + description: + Properties for single display bias regulator. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rt4801@73 { + compatible = "richtek,rt4801"; + reg = <0x73>; + enable-gpios = <&gpio26 2 0>, <&gpio26 3 0>; + + dsvp: DSVP { + regulator-name = "rt4801,dsvp"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <6000000>; + regulator-boot-on; + }; + dsvn: DSVN { + regulator-name = "rt4801,dsvn"; + regulator-min-microvolt = <4000000>; + regulator-max-microvolt = <6000000>; + regulator-boot-on; + }; + + }; + }; diff --git a/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml b/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml new file mode 100644 index 0000000000000..a8ccb5cb8d771 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/richtek,rtmv20-regulator.yaml @@ -0,0 +1,159 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Richtek RTMV20 laser diode regulator + +maintainers: + - ChiYuan Huang + +description: | + Richtek RTMV20 is a load switch current regulator that can supply up to 6A. + It is used to drive laser diode. There're two signals for chip controls + (Enable/Fail), Enable pin to turn chip on, and Fail pin as fault indication. + There're still four pins for camera control, two inputs (strobe and vsync), + the others for outputs (fsin1 and fsin2). Strobe input to start the current + supply, vsync input from IR camera, and fsin1/fsin2 output for the optional. + +properties: + compatible: + const: richtek,rtmv20 + + reg: + maxItems: 1 + + wakeup-source: true + + interrupts: + maxItems: 1 + + enable-gpios: + description: A connection of the 'enable' gpio line. + maxItems: 1 + + richtek,ld-pulse-delay-us: + description: | + load current pulse delay in microsecond after strobe pin pulse high. + minimum: 0 + maximum: 100000 + default: 0 + + richtek,ld-pulse-width-us: + description: | + Load current pulse width in microsecond after strobe pin pulse high. + minimum: 0 + maximum: 10000 + default: 1200 + + richtek,fsin1-delay-us: + description: | + Fsin1 pulse high delay in microsecond after vsync signal pulse high. + minimum: 0 + maximum: 100000 + default: 23000 + + richtek,fsin1-width-us: + description: | + Fsin1 pulse high width in microsecond after vsync signal pulse high. + minimum: 40 + maximum: 10000 + default: 160 + + richtek,fsin2-delay-us: + description: | + Fsin2 pulse high delay in microsecond after vsync signal pulse high. + minimum: 0 + maximum: 100000 + default: 23000 + + richtek,fsin2-width-us: + description: | + Fsin2 pulse high width in microsecond after vsync signal pulse high. + minimum: 40 + maximum: 10000 + default: 160 + + richtek,es-pulse-width-us: + description: Eye safety function pulse width limit in microsecond. + minimum: 0 + maximum: 10000 + default: 1200 + + richtek,es-ld-current-microamp: + description: Eye safety function load current limit in microamp. + minimum: 0 + maximum: 6000000 + default: 3000000 + + richtek,lbp-level-microvolt: + description: Low battery protection level in microvolt. + minimum: 2400000 + maximum: 3700000 + default: 2700000 + + richtek,lbp-enable: + description: Low battery protection function enable control. + type: boolean + + richtek,strobe-polarity-high: + description: Strobe pin active polarity control. + type: boolean + + richtek,vsync-polarity-high: + description: Vsync pin active polarity control. + type: boolean + + richtek,fsin-enable: + description: Fsin function enable control. + type: boolean + + richtek,fsin-output: + description: Fsin function output control. + type: boolean + + richtek,es-enable: + description: Eye safety function enable control. + type: boolean + + lsw: + description: load switch current regulator description. + type: object + $ref: "regulator.yaml#" + +required: + - compatible + - reg + - wakeup-source + - interrupts + - enable-gpios + - lsw + +additionalProperties: false + +examples: + - | + #include + i2c { + #address-cells = <1>; + #size-cells = <0>; + + rtmv20@34 { + compatible = "richtek,rtmv20"; + reg = <0x34>; + wakeup-source; + interrupts-extended = <&gpio26 2 IRQ_TYPE_LEVEL_LOW>; + enable-gpios = <&gpio26 3 0>; + + richtek,strobe-polarity-high; + richtek,vsync-polarity-high; + + lsw { + regulator-name = "rtmv20,lsw"; + regulator-min-microamp = <0>; + regulator-max-microamp = <6000000>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml index 19d9408d9c3b3..f5e31196a6466 100644 --- a/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/rohm,bd71837-regulator.yaml @@ -93,6 +93,17 @@ patternProperties: # ---------------------------------------------------------------- # rest | not supported | not supported | not supported + # BD71837 power outputs can either be controlled by the PMIC internal + # hardware state machine or by software. If you need regulators to be + # turned ON/OFF for example based on PMIC_STBY_REQ line (which toggles + # PMIC HW state machine) - then you should set this property. + # Tradeoff is that then SW can't control the ON/OFF state for this + # regulator (other than invoking a PMIC state change). + rohm,no-regulator-enable-control: + description: | + Enable/Disable control of this regulator must be left to the + PMIC hardware state machine. + type: boolean required: - regulator-name diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml index 07256a4b50b93..eeac32cd15d6f 100644 --- a/Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/rohm,bd71847-regulator.yaml @@ -88,6 +88,17 @@ patternProperties: # ---------------------------------------------------------------- # rest | not supported | not supported | not supported + # BD718(47/50) power outputs can either be controlled by the PMIC internal + # hardware state machine or by software. If you need regulators to be + # turned ON/OFF for example based on PMIC_STBY_REQ line (which toggles + # PMIC HW state machine) - then you should set this property. + # Tradeoff is that then SW can't control the ON/OFF state for this + # regulator (other than invoking a PMIC state change). + rohm,no-regulator-enable-control: + description: | + Enable/Disable control of this regulator must be left to the + PMIC hardware state machine. + type: boolean required: - regulator-name diff --git a/Documentation/devicetree/bindings/regulator/rohm,bd9576-regulator.yaml b/Documentation/devicetree/bindings/regulator/rohm,bd9576-regulator.yaml new file mode 100644 index 0000000000000..b6515a0cee629 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/rohm,bd9576-regulator.yaml @@ -0,0 +1,34 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/rohm,bd9576-regulator.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ROHM BD9576 and BD9573 Power Management Integrated Circuit regulators + +maintainers: + - Matti Vaittinen + +description: | + This module is part of the ROHM BD9576 MFD device. For more details + see Documentation/devicetree/bindings/mfd/rohm,bd9576-pmic.yaml. + + The regulator controller is represented as a sub-node of the PMIC node + on the device tree. + + The valid names for BD9576 regulator nodes are + regulator-vd50, regulator-vd18, regulator-vdddr, regulator-vd10, + regulator-voutl1, regulator-vouts1 + +patternProperties: + "regulator-.+": + type: object + description: + Properties for single regulator. + $ref: "regulator.yaml#" + + required: + - regulator-name + + unevaluatedProperties: false +additionalProperties: false diff --git a/Documentation/devicetree/bindings/regulator/silergy,sy8824x.yaml b/Documentation/devicetree/bindings/regulator/silergy,sy8824x.yaml new file mode 100644 index 0000000000000..82af4d6561770 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/silergy,sy8824x.yaml @@ -0,0 +1,45 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/silergy,sy8824x.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: silergy sy8824c,sy8824e,sy20276 and sy20278 PMIC + +maintainers: + - Jisheng Zhang + +allOf: + - $ref: regulator.yaml# + +properties: + compatible: + enum: + - silergy,sy8824c + - silergy,sy8824e + - silergy,sy20276 + - silergy,sy20278 + + reg: + maxItems: 1 + +required: + - compatible + - reg + +unevaluatedProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + regulator@60 { + compatible = "silergy,sy8824c"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <1150000>; + reg = <0x60>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/regulator/silergy,sy8827n.yaml b/Documentation/devicetree/bindings/regulator/silergy,sy8827n.yaml index 15983cdc7c28e..b222adabc7b49 100644 --- a/Documentation/devicetree/bindings/regulator/silergy,sy8827n.yaml +++ b/Documentation/devicetree/bindings/regulator/silergy,sy8827n.yaml @@ -31,6 +31,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | i2c { diff --git a/Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml b/Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml index cb336b2c16afd..9f1c70381b826 100644 --- a/Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml +++ b/Documentation/devicetree/bindings/regulator/st,stm32-booster.yaml @@ -34,6 +34,8 @@ required: - st,syscfg - vdda-supply +unevaluatedProperties: false + examples: - | regulator-booster { diff --git a/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml b/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml index 33cdaeb25aeeb..3cd4a254e4cba 100644 --- a/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml +++ b/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.yaml @@ -36,6 +36,8 @@ required: - clocks - vdda-supply +unevaluatedProperties: false + examples: - | #include diff --git a/Documentation/devicetree/bindings/regulator/sy8824x.txt b/Documentation/devicetree/bindings/regulator/sy8824x.txt deleted file mode 100644 index c5e95850c4277..0000000000000 --- a/Documentation/devicetree/bindings/regulator/sy8824x.txt +++ /dev/null @@ -1,24 +0,0 @@ -SY8824C/SY8824E/SY20276 Voltage regulator - -Required properties: -- compatible: Must be one of the following. - "silergy,sy8824c" - "silergy,sy8824e" - "silergy,sy20276" - "silergy,sy20278" -- reg: I2C slave address - -Any property defined as part of the core regulator binding, defined in -./regulator.txt, can also be used. - -Example: - - vcore: regulator@00 { - compatible = "silergy,sy8824c"; - reg = <0x66>; - regulator-name = "vcore"; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-boot-on; - regulator-always-on; - }; diff --git a/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml b/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml index d1a79d2ffa1ee..6f45582c914e2 100644 --- a/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/vqmmc-ipq4019-regulator.yaml @@ -28,6 +28,8 @@ required: - compatible - reg +unevaluatedProperties: false + examples: - | regulator@1948000 { diff --git a/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml b/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml index a0aea73bf4122..7b4ae5d233512 100644 --- a/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml +++ b/Documentation/devicetree/bindings/regulator/wlf,arizona.yaml @@ -35,3 +35,5 @@ properties: Initial data for the MICVDD regulator. $ref: "regulator.yaml#" type: object + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml index 87c52316ddbd6..9282837d64ba5 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,pil-info.yaml @@ -25,6 +25,8 @@ required: - compatible - reg +additionalProperties: false + examples: - | imem@146bf000 { diff --git a/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml b/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml new file mode 100644 index 0000000000000..4069f0f5e8fa6 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/ti,k3-r5f-rproc.yaml @@ -0,0 +1,281 @@ +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/ti,k3-r5f-rproc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI K3 R5F processor subsystems + +maintainers: + - Suman Anna + +description: | + The TI K3 family of SoCs usually have one or more dual-core Arm Cortex R5F + processor subsystems/clusters (R5FSS). The dual core cluster can be used + either in a LockStep mode providing safety/fault tolerance features or in a + Split mode providing two individual compute cores for doubling the compute + capacity. These are used together with other processors present on the SoC + to achieve various system level goals. + + Each Dual-Core R5F sub-system is represented as a single DTS node + representing the cluster, with a pair of child DT nodes representing + the individual R5F cores. Each node has a number of required or optional + properties that enable the OS running on the host processor to perform + the device management of the remote processor and to communicate with the + remote processor. + +properties: + $nodename: + pattern: "^r5fss(@.*)?" + + compatible: + enum: + - ti,am654-r5fss + - ti,j721e-r5fss + + power-domains: + description: | + Should contain a phandle to a PM domain provider node and an args + specifier containing the R5FSS device id value. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: + description: | + Standard ranges definition providing address translations for + local R5F TCM address spaces to bus addresses. + +# Optional properties: +# -------------------- + + ti,cluster-mode: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + Configuration Mode for the Dual R5F cores within the R5F cluster. + Should be either a value of 1 (LockStep mode) or 0 (Split mode), + default is LockStep mode if omitted. + +# R5F Processor Child Nodes: +# ========================== + +patternProperties: + "^r5f@[a-f0-9]+$": + type: object + description: | + The R5F Sub-System device node should define two R5F child nodes, each + node representing a TI instantiation of the Arm Cortex R5F core. There + are some specific integration differences for the IP like the usage of + a Region Address Translator (RAT) for translating the larger SoC bus + addresses into a 32-bit address space for the processor. + + Each R5F core has an associated 64 KB of Tightly-Coupled Memory (TCM) + internal memories split between two banks - TCMA and TCMB (further + interleaved into two banks TCMB0 and TCMB1). These memories (also called + ATCM and BTCM) provide read/write performance on par with the core's L1 + caches. Each of the TCMs can be enabled or disabled independently and + either of them can be configured to appear at that R5F's address 0x0. + + The cores do not use an MMU, but has a Region Address Translater + (RAT) module that is accessible only from the R5Fs for providing + translations between 32-bit CPU addresses into larger system bus + addresses. Cache and memory access settings are provided through a + Memory Protection Unit (MPU), programmable only from the R5Fs. + + allOf: + - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# + + properties: + compatible: + enum: + - ti,am654-r5f + - ti,j721e-r5f + + reg: + items: + - description: Address and Size of the ATCM internal memory region + - description: Address and Size of the BTCM internal memory region + + reg-names: + items: + - const: atcm + - const: btcm + + resets: + description: | + Should contain the phandle to the reset controller node managing the + local resets for this device, and a reset specifier. + maxItems: 1 + + firmware-name: + description: | + Should contain the name of the default firmware image + file located on the firmware search path + +# The following properties are mandatory for R5F Core0 in both LockStep and Split +# modes, and are mandatory for R5F Core1 _only_ in Split mode. They are unused for +# R5F Core1 in LockStep mode: + + mboxes: + description: | + OMAP Mailbox specifier denoting the sub-mailbox, to be used for + communication with the remote processor. This property should match + with the sub-mailbox node used in the firmware image. + maxItems: 1 + + memory-region: + description: | + phandle to the reserved memory nodes to be associated with the + remoteproc device. There should be at least two reserved memory nodes + defined. The reserved memory nodes should be carveout nodes, and + should be defined with a "no-map" property as per the bindings in + Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt + minItems: 2 + maxItems: 8 + items: + - description: region used for dynamic DMA allocations like vrings and + vring buffers + - description: region reserved for firmware image sections + additionalItems: true + + +# Optional properties: +# -------------------- +# The following properties are optional properties for each of the R5F cores: + + ti,atcm-enable: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + R5F core configuration mode dictating if ATCM should be enabled. The + R5F address of ATCM is dictated by ti,loczrama property. Should be + either a value of 1 (enabled) or 0 (disabled), default is disabled + if omitted. Recommended to enable it for maximizing TCMs. + + ti,btcm-enable: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + R5F core configuration mode dictating if BTCM should be enabled. The + R5F address of BTCM is dictated by ti,loczrama property. Should be + either a value of 1 (enabled) or 0 (disabled), default is enabled if + omitted. + + ti,loczrama: + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + description: | + R5F core configuration mode dictating which TCM should appear at + address 0 (from core's view). Should be either a value of 1 (ATCM + at 0x0) or 0 (BTCM at 0x0), default value is 1 if omitted. + + sram: + $ref: /schemas/types.yaml#/definitions/phandle-array + minItems: 1 + maxItems: 4 + description: | + phandles to one or more reserved on-chip SRAM regions. The regions + should be defined as child nodes of the respective SRAM node, and + should be defined as per the generic bindings in, + Documentation/devicetree/bindings/sram/sram.yaml + + required: + - compatible + - reg + - reg-names + - ti,sci + - ti,sci-dev-id + - ti,sci-proc-ids + - resets + - firmware-name + + unevaluatedProperties: false + +required: + - compatible + - power-domains + - "#address-cells" + - "#size-cells" + - ranges + +additionalProperties: false + +examples: + - | + / { + model = "Texas Instruments K3 AM654 SoC"; + compatible = "ti,am654-evm", "ti,am654"; + #address-cells = <2>; + #size-cells = <2>; + + bus@100000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */ + <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, + <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, + <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>; + + bus@28380000 { + compatible = "simple-bus"; + #address-cells = <2>; + #size-cells = <2>; + ranges = <0x00 0x28380000 0x00 0x28380000 0x00 0x03880000>, /* MCU NAVSS */ + <0x00 0x41000000 0x00 0x41000000 0x00 0x00020000>, /* MCU R5F Core0 */ + <0x00 0x41400000 0x00 0x41400000 0x00 0x00020000>, /* MCU R5F Core1 */ + <0x00 0x41c00000 0x00 0x41c00000 0x00 0x00080000>; /* MCU SRAM */ + + /* AM65x MCU R5FSS node */ + mcu_r5fss0: r5fss@41000000 { + compatible = "ti,am654-r5fss"; + power-domains = <&k3_pds 129>; + ti,cluster-mode = <1>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x41000000 0x00 0x41000000 0x20000>, + <0x41400000 0x00 0x41400000 0x20000>; + + mcu_r5f0: r5f@41000000 { + compatible = "ti,am654-r5f"; + reg = <0x41000000 0x00008000>, + <0x41010000 0x00008000>; + reg-names = "atcm", "btcm"; + ti,sci = <&dmsc>; + ti,sci-dev-id = <159>; + ti,sci-proc-ids = <0x01 0xFF>; + resets = <&k3_reset 159 1>; + firmware-name = "am65x-mcu-r5f0_0-fw"; + ti,atcm-enable = <1>; + ti,btcm-enable = <1>; + ti,loczrama = <1>; + mboxes = <&mailbox0 &mbox_mcu_r5fss0_core0>; + memory-region = <&mcu_r5fss0_core0_dma_memory_region>, + <&mcu_r5fss0_core0_memory_region>; + sram = <&mcu_r5fss0_core0_sram>; + }; + + mcu_r5f1: r5f@41400000 { + compatible = "ti,am654-r5f"; + reg = <0x41400000 0x00008000>, + <0x41410000 0x00008000>; + reg-names = "atcm", "btcm"; + ti,sci = <&dmsc>; + ti,sci-dev-id = <245>; + ti,sci-proc-ids = <0x02 0xFF>; + resets = <&k3_reset 245 1>; + firmware-name = "am65x-mcu-r5f0_1-fw"; + ti,atcm-enable = <1>; + ti,btcm-enable = <1>; + ti,loczrama = <1>; + mboxes = <&mailbox1 &mbox_mcu_r5fss0_core1>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt index 4dd20de6977f3..e8d3096d922c3 100644 --- a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt +++ b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt @@ -64,6 +64,9 @@ reusable (optional) - empty property system can use that region to store volatile or cached data that can be otherwise regenerated or migrated elsewhere. +A node must not carry both the no-map and the reusable property as these are +logically contradictory. + Linux implementation note: - If a "linux,cma-default" property is present, then Linux will use the region for the default pool of the contiguous memory allocator. diff --git a/Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml b/Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml index 569cd3bd3a70b..00430e2eabc87 100644 --- a/Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml +++ b/Documentation/devicetree/bindings/reset/fsl,imx7-src.yaml @@ -22,12 +22,19 @@ description: | properties: compatible: - items: - - enum: - - fsl,imx7d-src - - fsl,imx8mq-src - - fsl,imx8mp-src - - const: syscon + oneOf: + - items: + - enum: + - fsl,imx7d-src + - fsl,imx8mq-src + - fsl,imx8mp-src + - const: syscon + - items: + - enum: + - fsl,imx8mm-src + - fsl,imx8mn-src + - const: fsl,imx8mq-src + - const: syscon reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt index 6e802703af604..17b7a6a43a29f 100644 --- a/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt +++ b/Documentation/devicetree/bindings/reset/nuvoton,npcm-reset.txt @@ -9,7 +9,7 @@ Optional property: - nuvoton,sw-reset-number - Contains the software reset number to restart the SoC. NPCM7xx contain four software reset that represent numbers 1 to 4. - If 'nuvoton,sw-reset-number' is not specfied software reset is disabled. + If 'nuvoton,sw-reset-number' is not specified software reset is disabled. Example: rstc: rstc@f0801000 { diff --git a/Documentation/devicetree/bindings/reset/renesas,rst.yaml b/Documentation/devicetree/bindings/reset/renesas,rst.yaml index 2849ce45703c7..620cd0538bbe9 100644 --- a/Documentation/devicetree/bindings/reset/renesas,rst.yaml +++ b/Documentation/devicetree/bindings/reset/renesas,rst.yaml @@ -47,6 +47,7 @@ properties: - renesas,r8a77980-rst # R-Car V3H - renesas,r8a77990-rst # R-Car E3 - renesas,r8a77995-rst # R-Car D3 + - renesas,r8a779a0-rst # R-Car V3U reg: maxItems: 1 diff --git a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt index 27a45fe5ecf17..ed836868dbf18 100644 --- a/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt +++ b/Documentation/devicetree/bindings/reset/xlnx,zynqmp-reset.txt @@ -1,7 +1,7 @@ -------------------------------------------------------------------------- - = Zynq UltraScale+ MPSoC reset driver binding = + = Zynq UltraScale+ MPSoC and Versal reset driver binding = -------------------------------------------------------------------------- -The Zynq UltraScale+ MPSoC has several different resets. +The Zynq UltraScale+ MPSoC and Versal has several different resets. See Chapter 36 of the Zynq UltraScale+ MPSoC TRM (UG) for more information about zynqmp resets. @@ -10,7 +10,8 @@ Please also refer to reset.txt in this directory for common reset controller binding usage. Required Properties: -- compatible: "xlnx,zynqmp-reset" +- compatible: "xlnx,zynqmp-reset" for Zynq UltraScale+ MPSoC platform + "xlnx,versal-reset" for Versal platform - #reset-cells: Specifies the number of cells needed to encode reset line, should be 1 @@ -37,8 +38,10 @@ Device nodes that need access to reset lines should specify them as a reset phandle in their corresponding node as specified in reset.txt. -For list of all valid reset indicies see +For list of all valid reset indices for Zynq UltraScale+ MPSoC see +For list of all valid reset indices for Versal see + Example: diff --git a/Documentation/devicetree/bindings/riscv/cpus.yaml b/Documentation/devicetree/bindings/riscv/cpus.yaml index f80ba2c66f716..c6925e0b16e46 100644 --- a/Documentation/devicetree/bindings/riscv/cpus.yaml +++ b/Documentation/devicetree/bindings/riscv/cpus.yaml @@ -91,6 +91,8 @@ required: - riscv,isa - interrupt-controller +additionalProperties: true + examples: - | // Example 1: SiFive Freedom U540G Development Kit diff --git a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt deleted file mode 100644 index 73d8f19c3bd9c..0000000000000 --- a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.txt +++ /dev/null @@ -1,51 +0,0 @@ -SiFive L2 Cache Controller --------------------------- -The SiFive Level 2 Cache Controller is used to provide access to fast copies -of memory for masters in a Core Complex. The Level 2 Cache Controller also -acts as directory-based coherency manager. -All the properties in ePAPR/DeviceTree specification applies for this platform - -Required Properties: --------------------- -- compatible: Should be "sifive,fu540-c000-ccache" and "cache" - -- cache-block-size: Specifies the block size in bytes of the cache. - Should be 64 - -- cache-level: Should be set to 2 for a level 2 cache - -- cache-sets: Specifies the number of associativity sets of the cache. - Should be 1024 - -- cache-size: Specifies the size in bytes of the cache. Should be 2097152 - -- cache-unified: Specifies the cache is a unified cache - -- interrupts: Must contain 3 entries (DirError, DataError and DataFail signals) - -- reg: Physical base address and size of L2 cache controller registers map - -Optional Properties: --------------------- -- next-level-cache: phandle to the next level cache if present. - -- memory-region: reference to the reserved-memory for the L2 Loosely Integrated - Memory region. The reserved memory node should be defined as per the bindings - in reserved-memory.txt - - -Example: - - cache-controller@2010000 { - compatible = "sifive,fu540-c000-ccache", "cache"; - cache-block-size = <64>; - cache-level = <2>; - cache-sets = <1024>; - cache-size = <2097152>; - cache-unified; - interrupt-parent = <&plic0>; - interrupts = <1 2 3>; - reg = <0x0 0x2010000 0x0 0x1000>; - next-level-cache = <&L25 &L40 &L36>; - memory-region = <&l2_lim>; - }; diff --git a/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml new file mode 100644 index 0000000000000..3f4a1939554d5 --- /dev/null +++ b/Documentation/devicetree/bindings/riscv/sifive-l2-cache.yaml @@ -0,0 +1,98 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright (C) 2020 SiFive, Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/riscv/sifive-l2-cache.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: SiFive L2 Cache Controller + +maintainers: + - Sagar Kadam + - Yash Shah + - Paul Walmsley + +description: + The SiFive Level 2 Cache Controller is used to provide access to fast copies + of memory for masters in a Core Complex. The Level 2 Cache Controller also + acts as directory-based coherency manager. + All the properties in ePAPR/DeviceTree specification applies for this platform. + +allOf: + - $ref: /schemas/cache-controller.yaml# + +select: + properties: + compatible: + items: + - enum: + - sifive,fu540-c000-ccache + + required: + - compatible + +properties: + compatible: + items: + - const: sifive,fu540-c000-ccache + - const: cache + + cache-block-size: + const: 64 + + cache-level: + const: 2 + + cache-sets: + const: 1024 + + cache-size: + const: 2097152 + + cache-unified: true + + interrupts: + description: | + Must contain entries for DirError, DataError and DataFail signals. + minItems: 3 + maxItems: 3 + + reg: + maxItems: 1 + + next-level-cache: true + + memory-region: + description: | + The reference to the reserved-memory for the L2 Loosely Integrated Memory region. + The reserved memory node should be defined as per the bindings in reserved-memory.txt. + +additionalProperties: false + +required: + - compatible + - cache-block-size + - cache-level + - cache-sets + - cache-size + - cache-unified + - interrupts + - reg + +examples: + - | + cache-controller@2010000 { + compatible = "sifive,fu540-c000-ccache", "cache"; + cache-block-size = <64>; + cache-level = <2>; + cache-sets = <1024>; + cache-size = <2097152>; + cache-unified; + reg = <0x2010000 0x1000>; + interrupt-parent = <&plic0>; + interrupts = <1>, + <2>, + <3>; + next-level-cache = <&L25>; + memory-region = <&l2_lim>; + }; diff --git a/Documentation/devicetree/bindings/rng/imx-rng.txt b/Documentation/devicetree/bindings/rng/imx-rng.txt deleted file mode 100644 index 659d4efdd6641..0000000000000 --- a/Documentation/devicetree/bindings/rng/imx-rng.txt +++ /dev/null @@ -1,23 +0,0 @@ -Freescale RNGA/RNGB/RNGC (Random Number Generator Versions A, B and C) - -Required properties: -- compatible : should be one of - "fsl,imx21-rnga" - "fsl,imx31-rnga" (backward compatible with "fsl,imx21-rnga") - "fsl,imx25-rngb" - "fsl,imx6sl-rngb" (backward compatible with "fsl,imx25-rngb") - "fsl,imx6sll-rngb" (backward compatible with "fsl,imx25-rngb") - "fsl,imx6ull-rngb" (backward compatible with "fsl,imx25-rngb") - "fsl,imx35-rngc" -- reg : offset and length of the register set of this block -- interrupts : the interrupt number for the RNG block -- clocks : the RNG clk source - -Example: - -rng@53fb0000 { - compatible = "fsl,imx25-rngb"; - reg = <0x53fb0000 0x4000>; - interrupts = <22>; - clocks = <&trng_clk>; -}; diff --git a/Documentation/devicetree/bindings/rng/imx-rng.yaml b/Documentation/devicetree/bindings/rng/imx-rng.yaml new file mode 100644 index 0000000000000..4ad1e456a8012 --- /dev/null +++ b/Documentation/devicetree/bindings/rng/imx-rng.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rng/imx-rng.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale RNGA/RNGB/RNGC (Random Number Generator Versions A, B and C) + +maintainers: + - Vladimir Zapolskiy + +properties: + compatible: + oneOf: + - const: fsl,imx21-rnga + - const: fsl,imx25-rngb + - items: + - const: fsl,imx31-rnga + - const: fsl,imx21-rnga + - items: + - enum: + - fsl,imx6sl-rngb + - fsl,imx6sll-rngb + - fsl,imx6ull-rngb + - const: fsl,imx25-rngb + - const: fsl,imx35-rngc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + +additionalProperties: false + +examples: + - | + rngb@53fb0000 { + compatible = "fsl,imx25-rngb"; + reg = <0x53fb0000 0x4000>; + clocks = <&clks 109>; + interrupts = <22>; + }; diff --git a/Documentation/devicetree/bindings/rng/ingenic,trng.yaml b/Documentation/devicetree/bindings/rng/ingenic,trng.yaml new file mode 100644 index 0000000